[DirectX backend] Fix build and test error caused by out of sync with upstream change.

[python3kgae]

Summary

Fix build and test error caused by
https://github.com/llvm/llvm-project/commit/a2620e00ffa232a406de3a1d8634beeda86956fd#
and
https://github.com/llvm/llvm-project/commit/304f1d59ca41872c094def3aee0a8689df6aa398

[python3kgae]

Fix missing clang-format arc missed.

[python3kgae]

Keep memory attribute and translate it into readnone/readonly/argmemonly.

[python3kgae]

Add memory(none) in test.

[tex3d]

I think we need to add MemoryEffects DXIL canonicalization to translate from attribute values with more nuance to conservative versions for DXIL serialization - see comment on DXILPrepare.cpp. Otherwise, we could have duplicate attribute sets once these are translated in DXILBitcodeWriter, which would result in bitcode differences between equivalent DXIL IR. In other words, if you round-trip the DXIL output from here, the bitcode would change.

We could use some unit tests for how we sanitize and translate different MemoryEffects combinations as well.

llvm/lib/Target/DirectX/DXILPrepare.cpp

57

I think merely allowing this through is insufficient. We should canonicalize the MemoryEffects attribute to a few conservative values for DXIL to avoid duplicate attribute sets once these are translated during serialization.

llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp

946

If function only reads from arg mem, won't ME.onlyReadsMemory() be true, leading to both attributes: readonly and argmemonly? I think in this case you only want argmemonly.

I think instead, we need something like:

if (ME.onlyAccessesArgPointees()) {
  ...
} else if (ME.onlyReadsMemory()) {
  ...
}

952

Should we have unit tests to ensure proper translation of different/interesting MemoryEffects combinations?

[tex3d]

llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp

946

Then again, I do see some other case with both these attributes, so maybe this behavior is desirable.

[python3kgae]

llvm/lib/Target/DirectX/DXILPrepare.cpp

57

Created https://github.com/llvm/llvm-project/issues/58950 to track this.

llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp

946

It is OK for a function has both readnone argmemonly attribute.

952

We could always add tests.
But this PR is just supposed to fix the build and test, so no one is blocked.

[python3kgae]

Use Attribute::getMemoryEffects directly.

[python3kgae]

Add tracking issue for DIAssignID.

[beanz]

LGTM

[python3kgae]

Rebase and fix build error.

llvm/lib/Target/DirectX/DXILPrepare.cpp

return is_contained({Attribute::Alignment,
                        Attribute::NoCapture,
                        Attribute::NoDuplicate,
                        Attribute::NoImplicitFloat,
                        Attribute::NoInline,
                        Attribute::NonLazyBind,
                        Attribute::NonNull,
                        Attribute::Dereferenceable,
                        Attribute::DereferenceableOrNull,
                        Attribute::NoRedZone,
                        Attribute::NoReturn,
                        Attribute::NoUnwind,
                        Attribute::OptimizeForSize,
                        Attribute::OptimizeNone,
                        Attribute::ReadNone,
                        Attribute::ReadOnly,
-                       Attribute::ArgMemOnly,
                        Attribute::Returned,
                        Attribute::ReturnsTwice,
                        Attribute::SExt,
                        Attribute::StackAlignment,
                        Attribute::StackProtect,
                        Attribute::StackProtectReq,
                        Attribute::StackProtectStrong,
                        Attribute::SafeStack,

llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp

private:
   void writeDIMacroFile(const DIMacroFile *N, SmallVectorImpl<uint64_t> &Record,
                         unsigned Abbrev) {
     llvm_unreachable("DXIL cannot contain DIMacroFile Nodes");
   }
   void writeDIArgList(const DIArgList *N, SmallVectorImpl<uint64_t> &Record,
                       unsigned Abbrev) {
     llvm_unreachable("DXIL cannot contain DIArgList Nodes");
   }
+  void writeDIAssignID(const DIAssignID *N, SmallVectorImpl<uint64_t> &Record,
+                      unsigned Abbrev) {
+    llvm_unreachable("DXIL cannot contain DIAssignID Nodes");
+  }
   void writeDIModule(const DIModule *N, SmallVectorImpl<uint64_t> &Record,
                      unsigned Abbrev);
   void writeDITemplateTypeParameter(const DITemplateTypeParameter *N,
                                     SmallVectorImpl<uint64_t> &Record,
                                     unsigned Abbrev);
   void writeDITemplateValueParameter(const DITemplateValueParameter *N,
                                      SmallVectorImpl<uint64_t> &Record,
                                      unsigned Abbrev);

 }
 
 uint64_t DXILBitcodeWriter::getAttrKindEncoding(Attribute::AttrKind Kind) {
   switch (Kind) {
   case Attribute::Alignment:
     return bitc::ATTR_KIND_ALIGNMENT;
   case Attribute::AlwaysInline:
     return bitc::ATTR_KIND_ALWAYS_INLINE;
-  case Attribute::ArgMemOnly:
-    return bitc::ATTR_KIND_ARGMEMONLY;
   case Attribute::Builtin:
     return bitc::ATTR_KIND_BUILTIN;
   case Attribute::ByVal:
     return bitc::ATTR_KIND_BY_VAL;
   case Attribute::Convergent:
     return bitc::ATTR_KIND_CONVERGENT;
   case Attribute::InAlloca:
     return bitc::ATTR_KIND_IN_ALLOCA;
for (Attribute Attr : AS) {
         Record.push_back(Val);
         Record.push_back(Attr.getValueAsInt());
       } else {
         StringRef Kind = Attr.getKindAsString();
         StringRef Val = Attr.getValueAsString();
 
         Record.push_back(Val.empty() ? 3 : 4);
         Record.append(Kind.begin(), Kind.end());
         Record.push_back(0);
         if (!Val.empty()) {
           Record.append(Val.begin(), Val.end());
           Record.push_back(0);
         }
       }
     }
 
     Stream.EmitRecord(bitc::PARAMATTR_GRP_CODE_ENTRY, Record);
     Record.clear();
   }
 
   Stream.ExitBlock();
 }
 

llvm/test/CodeGen/DirectX/strip-fn-attrs.ll

 ; RUN: llc %s --filetype=asm -o - | FileCheck %s
 target triple = "dxil-unknown-shadermodel6.7-library"
 
-; CHECK: Function Attrs: nounwind readnone
+; CHECK: Function Attrs: nounwind
 ; Function Attrs: norecurse nounwind readnone willreturn
 define dso_local float @fma(float %0, float %1, float %2) local_unnamed_addr #0 {
   %4 = fmul float %0, %1
   %5 = fadd float %4, %2
   ret float %5
 }
 
-; CHECK: Function Attrs: nounwind readnone
+; CHECK: Function Attrs: nounwind
 ; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
 
-; CHECK: attributes #0 = { nounwind readnone }
+; CHECK: attributes #0 = { nounwind }
 ; CHECK-NOT attributes #
 
 attributes #0 = { norecurse nounwind readnone willreturn }
 attributes #1 = { nofree nosync nounwind readnone speculatable willreturn }

llvm/test/tools/dxil-dis/attribute-filter.ll

 ; RUN: llc %s --filetype=obj -o - | dxil-dis -o - | FileCheck %s
 
 ; CHECK: target triple = "dxil-ms-dx"
 target triple = "dxil-unknown-shadermodel6.7-library"
 
-; CHECK: Function Attrs: nounwind readnone
+; CHECK: Function Attrs: nounwind
 ; Function Attrs: norecurse nounwind readnone willreturn
 define float @fma(float %0, float %1, float %2) #0 {
   %4 = fmul float %0, %1
   %5 = fadd float %4, %2
   ret float %5
 }
 
-; CHECK: attributes #0 = { nounwind readnone "disable-tail-calls"="false" }
+; CHECK: attributes #0 = { nounwind "disable-tail-calls"="false" }
 attributes #0 = { norecurse nounwind readnone willreturn "disable-tail-calls"="false" }