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Differential D137551

[WebAssembly] Use default attributes for intrinsics
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Authored by nikic on Nov 7 2022, 7:00 AM.

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tlively
asb
pmatos
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rGd35fcf0e97e7: [WebAssembly] Use default attributes for intrinsics
Summary

This switches wasm intrinsics to use default attributes, i.e. nofree, nosync, nocallback and willreturn. Especially willreturn is required to avoid optimization regressions in the future.

The attributes are omitted from the trapping fptoi intrinsics (where I assume trapping is considered well-defined, and as such these aren't willreturn) and the atomic intrinsics, which aren't nosync

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nikic created this revision.Nov 7 2022, 7:00 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 7 2022, 7:00 AM
Herald added subscribers: StephenFan, ecnelises, sunfish and 3 others. · View Herald Transcript
nikic requested review of this revision.Nov 7 2022, 7:00 AM
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tlively accepted this revision.Nov 7 2022, 7:15 AM

LGTM % comment. Thanks!

llvm/include/llvm/IR/IntrinsicsWebAssembly.td
112–113

These won't return, either.

This revision is now accepted and ready to land.Nov 7 2022, 7:15 AM
nikic updated this revision to Diff 473660.Nov 7 2022, 7:20 AM

Don't use default attributes for wasm.throw.

nikic marked an inline comment as done.Nov 7 2022, 7:21 AM
nikic added inline comments.
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
112–113

Ooops, fixed.

tlively accepted this revision.Nov 7 2022, 7:44 AM
Harbormaster completed remote builds in B196476: Diff 473660.Nov 7 2022, 8:00 AM
This revision was landed with ongoing or failed builds.Nov 7 2022, 8:09 AM
Closed by commit rGd35fcf0e97e7: [WebAssembly] Use default attributes for intrinsics (authored by nikic). · Explain Why
This revision was automatically updated to reflect the committed changes.
nikic marked an inline comment as done.
nikic added a commit: rGd35fcf0e97e7: [WebAssembly] Use default attributes for intrinsics.

Revision Contents

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llvm/
include/
llvm/
IR/
335 lines
test/
CodeGen/
WebAssembly/
2 lines

Diff 473685

llvm/include/llvm/IR/IntrinsicsWebAssembly.td

Show All 13 Lines
// Type definition for a table in an intrinsic // Type definition for a table in an intrinsic
def llvm_table_ty : LLVMQualPointerType<llvm_i8_ty, 1>; def llvm_table_ty : LLVMQualPointerType<llvm_i8_ty, 1>;
let TargetPrefix = "wasm" in { // All intrinsics start with "llvm.wasm.". let TargetPrefix = "wasm" in { // All intrinsics start with "llvm.wasm.".
// Query the current memory size, and increase the current memory size. // Query the current memory size, and increase the current memory size.
// Note that memory.size is not IntrNoMem because it must be sequenced with // Note that memory.size is not IntrNoMem because it must be sequenced with
// respect to memory.grow calls. // respect to memory.grow calls.
def int_wasm_memory_size : Intrinsic<[llvm_anyint_ty], def int_wasm_memory_size :
[llvm_i32_ty], DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_i32_ty], [IntrReadMem]>;
[IntrReadMem]>; def int_wasm_memory_grow :
def int_wasm_memory_grow : Intrinsic<[llvm_anyint_ty], DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_i32_ty, LLVMMatchType<0>], []>;
[llvm_i32_ty, LLVMMatchType<0>],
[]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// ref.null intrinsics // ref.null intrinsics
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def int_wasm_ref_null_extern : Intrinsic<[llvm_externref_ty], [], [IntrNoMem]>; def int_wasm_ref_null_extern :
def int_wasm_ref_null_func : Intrinsic<[llvm_funcref_ty], [], [IntrNoMem]>; DefaultAttrsIntrinsic<[llvm_externref_ty], [], [IntrNoMem]>;
def int_wasm_ref_is_null_extern : Intrinsic<[llvm_i32_ty], [llvm_externref_ty], def int_wasm_ref_null_func :
[IntrNoMem], "llvm.wasm.ref.is_null.extern">; DefaultAttrsIntrinsic<[llvm_funcref_ty], [], [IntrNoMem]>;
def int_wasm_ref_is_null_func : Intrinsic<[llvm_i32_ty], [llvm_funcref_ty], def int_wasm_ref_is_null_extern :
DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_externref_ty], [IntrNoMem],
"llvm.wasm.ref.is_null.extern">;
def int_wasm_ref_is_null_func :
DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_funcref_ty],
[IntrNoMem], "llvm.wasm.ref.is_null.func">; [IntrNoMem], "llvm.wasm.ref.is_null.func">;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Table intrinsics // Table intrinsics
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def int_wasm_table_set_externref : Intrinsic<[], def int_wasm_table_set_externref :
[llvm_table_ty, llvm_i32_ty, llvm_externref_ty], DefaultAttrsIntrinsic<[], [llvm_table_ty, llvm_i32_ty, llvm_externref_ty],
[IntrWriteMem]>; [IntrWriteMem]>;
def int_wasm_table_set_funcref : Intrinsic<[], def int_wasm_table_set_funcref :
[llvm_table_ty, llvm_i32_ty, llvm_funcref_ty], DefaultAttrsIntrinsic<[], [llvm_table_ty, llvm_i32_ty, llvm_funcref_ty],
[IntrWriteMem]>; [IntrWriteMem]>;
def int_wasm_table_get_externref : Intrinsic<[llvm_externref_ty], def int_wasm_table_get_externref :
[llvm_table_ty, llvm_i32_ty], DefaultAttrsIntrinsic<[llvm_externref_ty], [llvm_table_ty, llvm_i32_ty],
[IntrReadMem]>; [IntrReadMem]>;
def int_wasm_table_get_funcref : Intrinsic<[llvm_funcref_ty], def int_wasm_table_get_funcref :
[llvm_table_ty, llvm_i32_ty], DefaultAttrsIntrinsic<[llvm_funcref_ty], [llvm_table_ty, llvm_i32_ty],
[IntrReadMem]>; [IntrReadMem]>;
// Query the current table size, and increase the current table size. // Query the current table size, and increase the current table size.
def int_wasm_table_size : Intrinsic<[llvm_i32_ty], def int_wasm_table_size :
[llvm_table_ty], DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_table_ty], [IntrReadMem]>;
[IntrReadMem]>; def int_wasm_table_copy :
def int_wasm_table_copy : Intrinsic<[], DefaultAttrsIntrinsic<[],
[llvm_table_ty, llvm_table_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [llvm_table_ty, llvm_table_ty, llvm_i32_ty, llvm_i32_ty,
[]>; llvm_i32_ty], []>;
def int_wasm_table_grow_externref : Intrinsic<[llvm_i32_ty], def int_wasm_table_grow_externref :
[llvm_table_ty, llvm_externref_ty, llvm_i32_ty], DefaultAttrsIntrinsic<[llvm_i32_ty],
[]>; [llvm_table_ty, llvm_externref_ty, llvm_i32_ty], []>;
def int_wasm_table_grow_funcref : Intrinsic<[llvm_i32_ty], def int_wasm_table_grow_funcref :
[llvm_table_ty, llvm_funcref_ty, llvm_i32_ty], DefaultAttrsIntrinsic<[llvm_i32_ty],
[]>; [llvm_table_ty, llvm_funcref_ty, llvm_i32_ty], []>;
def int_wasm_table_fill_externref : Intrinsic<[], def int_wasm_table_fill_externref :
[llvm_table_ty, llvm_i32_ty, llvm_externref_ty, llvm_i32_ty], DefaultAttrsIntrinsic<[],
[]>; [llvm_table_ty, llvm_i32_ty, llvm_externref_ty,
def int_wasm_table_fill_funcref : Intrinsic<[], llvm_i32_ty], []>;
[llvm_table_ty, llvm_i32_ty, llvm_funcref_ty, llvm_i32_ty], def int_wasm_table_fill_funcref :
[]>; DefaultAttrsIntrinsic<[],
[llvm_table_ty, llvm_i32_ty, llvm_funcref_ty,
llvm_i32_ty], []>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Trapping float-to-int conversions // Trapping float-to-int conversions
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// These don't use default attributes, because they are not willreturn.
def int_wasm_trunc_signed : Intrinsic<[llvm_anyint_ty], def int_wasm_trunc_signed : Intrinsic<[llvm_anyint_ty],
[llvm_anyfloat_ty], [llvm_anyfloat_ty],
[IntrNoMem]>; [IntrNoMem]>;
def int_wasm_trunc_unsigned : Intrinsic<[llvm_anyint_ty], def int_wasm_trunc_unsigned : Intrinsic<[llvm_anyint_ty],
[llvm_anyfloat_ty], [llvm_anyfloat_ty],
[IntrNoMem]>; [IntrNoMem]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Saturating float-to-int conversions // Saturating float-to-int conversions
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def int_wasm_trunc_saturate_signed : Intrinsic<[llvm_anyint_ty], def int_wasm_trunc_saturate_signed :
[llvm_anyfloat_ty], DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_trunc_saturate_unsigned : Intrinsic<[llvm_anyint_ty], def int_wasm_trunc_saturate_unsigned :
[llvm_anyfloat_ty], DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Exception handling intrinsics // Exception handling intrinsics
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// throw / rethrow // throw / rethrow
// The first immediate argument is an index to a tag, which is 0 for C++ // The first immediate argument is an index to a tag, which is 0 for C++
// exception. The second argument is the thrown exception pointer. // exception. The second argument is the thrown exception pointer.
def int_wasm_throw : Intrinsic<[], [llvm_i32_ty, llvm_ptr_ty], def int_wasm_throw : Intrinsic<[], [llvm_i32_ty, llvm_ptr_ty],
[Throws, IntrNoReturn, ImmArg<ArgIndex<0>>]>; [Throws, IntrNoReturn, ImmArg<ArgIndex<0>>]>;
def int_wasm_rethrow : Intrinsic<[], [], [Throws, IntrNoReturn]>; def int_wasm_rethrow : Intrinsic<[], [], [Throws, IntrNoReturn]>;
tlivelyUnsubmitted
Done
ReplyInline Actions

These won't return, either.

tlively: These won't return, either.
nikicAuthorUnsubmitted
Done
ReplyInline Actions

Ooops, fixed.

nikic: Ooops, fixed.
// Since wasm does not use landingpad instructions, these instructions return // Since wasm does not use landingpad instructions, these instructions return
// exception pointer and selector values until we lower them in WasmEHPrepare. // exception pointer and selector values until we lower them in WasmEHPrepare.
def int_wasm_get_exception : Intrinsic<[llvm_ptr_ty], [llvm_token_ty], def int_wasm_get_exception :
[IntrHasSideEffects]>; DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_token_ty], [IntrHasSideEffects]>;
def int_wasm_get_ehselector : Intrinsic<[llvm_i32_ty], [llvm_token_ty], def int_wasm_get_ehselector :
[IntrHasSideEffects]>; DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_token_ty], [IntrHasSideEffects]>;
// wasm.catch returns the pointer to the exception object caught by wasm 'catch' // wasm.catch returns the pointer to the exception object caught by wasm 'catch'
// instruction. This returns a single pointer, which is the case for C++ // instruction. This returns a single pointer, which is the case for C++
// exceptions. The immediate argument is an index to for a tag, which is 0 for // exceptions. The immediate argument is an index to for a tag, which is 0 for
// C++ exceptions. // C++ exceptions.
def int_wasm_catch : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], def int_wasm_catch :
DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_i32_ty],
[IntrHasSideEffects, ImmArg<ArgIndex<0>>]>; [IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
// WebAssembly EH must maintain the landingpads in the order assigned to them // WebAssembly EH must maintain the landingpads in the order assigned to them
// by WasmEHPrepare pass to generate landingpad table in EHStreamer. This is // by WasmEHPrepare pass to generate landingpad table in EHStreamer. This is
// used in order to give them the indices in WasmEHPrepare. // used in order to give them the indices in WasmEHPrepare.
def int_wasm_landingpad_index: Intrinsic<[], [llvm_token_ty, llvm_i32_ty], def int_wasm_landingpad_index :
DefaultAttrsIntrinsic<[], [llvm_token_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<1>>]>; [IntrNoMem, ImmArg<ArgIndex<1>>]>;
// Returns LSDA address of the current function. // Returns LSDA address of the current function.
def int_wasm_lsda : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>; def int_wasm_lsda : DefaultAttrsIntrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Atomic intrinsics // Atomic intrinsics
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// wait / notify // wait / notify
// These don't use default attributes, because they are not nosync.
def int_wasm_memory_atomic_wait32 : def int_wasm_memory_atomic_wait32 :
Intrinsic<[llvm_i32_ty], Intrinsic<[llvm_i32_ty],
[LLVMPointerType<llvm_i32_ty>, llvm_i32_ty, llvm_i64_ty], [LLVMPointerType<llvm_i32_ty>, llvm_i32_ty, llvm_i64_ty],
[IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>, [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
NoCapture<ArgIndex<0>>, IntrHasSideEffects], NoCapture<ArgIndex<0>>, IntrHasSideEffects],
"", [SDNPMemOperand]>; "", [SDNPMemOperand]>;
def int_wasm_memory_atomic_wait64 : def int_wasm_memory_atomic_wait64 :
Intrinsic<[llvm_i32_ty], Intrinsic<[llvm_i32_ty],
[LLVMPointerType<llvm_i64_ty>, llvm_i64_ty, llvm_i64_ty], [LLVMPointerType<llvm_i64_ty>, llvm_i64_ty, llvm_i64_ty],
[IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>, [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
NoCapture<ArgIndex<0>>, IntrHasSideEffects], NoCapture<ArgIndex<0>>, IntrHasSideEffects],
"", [SDNPMemOperand]>; "", [SDNPMemOperand]>;
def int_wasm_memory_atomic_notify: def int_wasm_memory_atomic_notify:
Intrinsic<[llvm_i32_ty], [LLVMPointerType<llvm_i32_ty>, llvm_i32_ty], Intrinsic<[llvm_i32_ty], [LLVMPointerType<llvm_i32_ty>, llvm_i32_ty],
[IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>, [IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>,
IntrHasSideEffects], IntrHasSideEffects],
"", [SDNPMemOperand]>; "", [SDNPMemOperand]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// SIMD intrinsics // SIMD intrinsics
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def int_wasm_swizzle : def int_wasm_swizzle :
Intrinsic<[llvm_v16i8_ty], DefaultAttrsIntrinsic<[llvm_v16i8_ty],
[llvm_v16i8_ty, llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_shuffle : def int_wasm_shuffle :
Intrinsic<[llvm_v16i8_ty], DefaultAttrsIntrinsic<[llvm_v16i8_ty],
[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty, llvm_i32_ty, [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_sub_sat_signed : def int_wasm_sub_sat_signed :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>], [LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_sub_sat_unsigned : def int_wasm_sub_sat_unsigned :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>], [LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_avgr_unsigned : def int_wasm_avgr_unsigned :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>], [LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_bitselect : def int_wasm_bitselect :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_anytrue : def int_wasm_anytrue :
Intrinsic<[llvm_i32_ty], DefaultAttrsIntrinsic<[llvm_i32_ty],
[llvm_anyvector_ty], [llvm_anyvector_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_alltrue : def int_wasm_alltrue :
Intrinsic<[llvm_i32_ty], DefaultAttrsIntrinsic<[llvm_i32_ty],
[llvm_anyvector_ty], [llvm_anyvector_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_bitmask : def int_wasm_bitmask :
Intrinsic<[llvm_i32_ty], DefaultAttrsIntrinsic<[llvm_i32_ty],
[llvm_anyvector_ty], [llvm_anyvector_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_dot : def int_wasm_dot :
Intrinsic<[llvm_v4i32_ty], DefaultAttrsIntrinsic<[llvm_v4i32_ty],
[llvm_v8i16_ty, llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_narrow_signed : def int_wasm_narrow_signed :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[llvm_anyvector_ty, LLVMMatchType<1>], [llvm_anyvector_ty, LLVMMatchType<1>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_narrow_unsigned : def int_wasm_narrow_unsigned :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[llvm_anyvector_ty, LLVMMatchType<1>], [llvm_anyvector_ty, LLVMMatchType<1>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_q15mulr_sat_signed : def int_wasm_q15mulr_sat_signed :
Intrinsic<[llvm_v8i16_ty], DefaultAttrsIntrinsic<[llvm_v8i16_ty],
[llvm_v8i16_ty, llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_pmin : def int_wasm_pmin :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>], [LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_pmax : def int_wasm_pmax :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>], [LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_extadd_pairwise_signed : def int_wasm_extadd_pairwise_signed :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMSubdivide2VectorType<0>], [LLVMSubdivide2VectorType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_extadd_pairwise_unsigned : def int_wasm_extadd_pairwise_unsigned :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMSubdivide2VectorType<0>], [LLVMSubdivide2VectorType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Relaxed SIMD intrinsics (experimental) // Relaxed SIMD intrinsics (experimental)
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def int_wasm_fma : def int_wasm_fma :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_fms : def int_wasm_fms :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_laneselect : def int_wasm_laneselect :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_swizzle : def int_wasm_relaxed_swizzle :
Intrinsic<[llvm_v16i8_ty], DefaultAttrsIntrinsic<[llvm_v16i8_ty],
[llvm_v16i8_ty, llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_min : def int_wasm_relaxed_min :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>], [LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_max : def int_wasm_relaxed_max :
Intrinsic<[llvm_anyvector_ty], DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[LLVMMatchType<0>, LLVMMatchType<0>], [LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_trunc_signed: def int_wasm_relaxed_trunc_signed:
Intrinsic<[llvm_v4i32_ty], DefaultAttrsIntrinsic<[llvm_v4i32_ty],
[llvm_v4f32_ty], [llvm_v4f32_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_trunc_unsigned: def int_wasm_relaxed_trunc_unsigned:
Intrinsic<[llvm_v4i32_ty], DefaultAttrsIntrinsic<[llvm_v4i32_ty],
[llvm_v4f32_ty], [llvm_v4f32_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_trunc_signed_zero: def int_wasm_relaxed_trunc_signed_zero:
Intrinsic<[llvm_v4i32_ty], DefaultAttrsIntrinsic<[llvm_v4i32_ty],
[llvm_v2f64_ty], [llvm_v2f64_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_trunc_unsigned_zero: def int_wasm_relaxed_trunc_unsigned_zero:
Intrinsic<[llvm_v4i32_ty], DefaultAttrsIntrinsic<[llvm_v4i32_ty],
[llvm_v2f64_ty], [llvm_v2f64_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_q15mulr_signed: def int_wasm_relaxed_q15mulr_signed:
Intrinsic<[llvm_v8i16_ty], DefaultAttrsIntrinsic<[llvm_v8i16_ty],
[llvm_v8i16_ty, llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_dot_i8x16_i7x16_signed: def int_wasm_dot_i8x16_i7x16_signed:
Intrinsic<[llvm_v8i16_ty], DefaultAttrsIntrinsic<[llvm_v8i16_ty],
[llvm_v16i8_ty, llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_dot_i8x16_i7x16_add_signed: def int_wasm_dot_i8x16_i7x16_add_signed:
Intrinsic<[llvm_v4i32_ty], DefaultAttrsIntrinsic<[llvm_v4i32_ty],
[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v4i32_ty], [llvm_v16i8_ty, llvm_v16i8_ty, llvm_v4i32_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_dot_bf16x8_add_f32: def int_wasm_relaxed_dot_bf16x8_add_f32:
Intrinsic<[llvm_v4f32_ty], DefaultAttrsIntrinsic<[llvm_v4f32_ty],
[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4f32_ty], [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4f32_ty],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Thread-local storage intrinsics // Thread-local storage intrinsics
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def int_wasm_tls_size : def int_wasm_tls_size :
Intrinsic<[llvm_anyint_ty], DefaultAttrsIntrinsic<[llvm_anyint_ty],
[], [],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_tls_align : def int_wasm_tls_align :
Intrinsic<[llvm_anyint_ty], DefaultAttrsIntrinsic<[llvm_anyint_ty],
[], [],
[IntrNoMem, IntrSpeculatable]>; [IntrNoMem, IntrSpeculatable]>;
def int_wasm_tls_base : def int_wasm_tls_base :
Intrinsic<[llvm_ptr_ty], DefaultAttrsIntrinsic<[llvm_ptr_ty],
[], [],
[IntrReadMem]>; [IntrReadMem]>;
} // TargetPrefix = "wasm" } // TargetPrefix = "wasm"

llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll

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catch: ; preds = %catch.start catch: ; preds = %catch.start
%exn = load i8*, i8** %exn.slot, align 4 %exn = load i8*, i8** %exn.slot, align 4
%5 = call i8* @__cxa_begin_catch(i8* %exn) #2 [ "funclet"(token %2) ] %5 = call i8* @__cxa_begin_catch(i8* %exn) #2 [ "funclet"(token %2) ]
call void @__cxa_end_catch() [ "funclet"(token %2) ] call void @__cxa_end_catch() [ "funclet"(token %2) ]
catchret from %2 to label %catchret.dest catchret from %2 to label %catchret.dest
; CHECK: catch: ; preds = %catch.start ; CHECK: catch: ; preds = %catch.start
; CHECK-NEXT: %exn = load i8*, i8** %exn.slot15, align 4 ; CHECK-NEXT: %exn = load i8*, i8** %exn.slot15, align 4
; CHECK-NEXT: %5 = call i8* @__cxa_begin_catch(i8* %exn) #2 [ "funclet"(token %2) ] ; CHECK-NEXT: %5 = call i8* @__cxa_begin_catch(i8* %exn) #7 [ "funclet"(token %2) ]
; CHECK-NEXT: invoke void @__cxa_end_catch() [ "funclet"(token %2) ] ; CHECK-NEXT: invoke void @__cxa_end_catch() [ "funclet"(token %2) ]
; CHECK-NEXT: to label %.noexc unwind label %catch.dispatch.longjmp ; CHECK-NEXT: to label %.noexc unwind label %catch.dispatch.longjmp
catchret.dest: ; preds = %catch catchret.dest: ; preds = %catch
br label %try.cont br label %try.cont
try.cont: ; preds = %invoke.cont2, %catchret.dest, %if.then try.cont: ; preds = %invoke.cont2, %catchret.dest, %if.then
ret void ret void
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