[AArch64InstPrinter] Print TargetAddress as an uint64_t

[holio0]

Summary

Outputs readable addresses by printed 'TargetAddress' as an uint64_t
value.

bl -0x37efd56628 => bl 0xffffffc8102a99d8

[holio0]

[AArch64InstPrinter] Print TargetAddress as an uint64_t

Outputs readable addresses by printed 'TargetAddress' as an uint64_t
value.

bl -0x37efd56628 => bl 0xffffffc8102a99d8

Differential Revision: https://reviews.llvm.org/D137260

[holio0]

Fix coding style

[dmgreen]

Seems reasonable, and matches what other architectures do. Can you add a test case?

[holio0]

In D137260#3911657, @dmgreen wrote:

Seems reasonable, and matches what other architectures do. Can you add a test case?

No problem, I will study it.

[holio0]

Add a test case

[holio0]

Remove an unused variable

[dmgreen]

Thanks. I was expecting a test using objdump or llc, but the new test looks good. It may be possible to replace StringStream, but otherwise LGTM.

llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp

36

Could this use raw_string_ostream?

[holio0]

Replace StringStream with raw_string_ostream

llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp

if (Op.isImm()) {
     return;
   }
 
   // If the branch target is simply an address then print it in hex.
   const MCConstantExpr *BranchTarget =
       dyn_cast<MCConstantExpr>(MI->getOperand(OpNum).getExpr());
   int64_t TargetAddress;
   if (BranchTarget && BranchTarget->evaluateAsAbsolute(TargetAddress)) {
-    O << formatHex(TargetAddress);
+    O << formatHex((uint64_t)TargetAddress);
   } else {
     // Otherwise, just print the expression.
     MI->getOperand(OpNum).getExpr()->print(O, &MAI);
   }
 }
 
 void AArch64InstPrinter::printAdrpLabel(const MCInst *MI, uint64_t Address,
                                         unsigned OpNum,

llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp

+//===- AArch64InstPrinterTest.cpp - AArch64InstPrinter unit tests----------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCInstrInfo.h"
+#include "llvm/MC/MCRegisterInfo.h"
+#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/Support/raw_ostream.h"
+
+#include "MCTargetDesc/AArch64InstPrinter.h"
+
+#include "gtest/gtest.h"
+
+using namespace llvm;
+
+class AArch64InstPrinterTest : public AArch64InstPrinter {
+public:
+  AArch64InstPrinterTest(const MCAsmInfo &MAI, const MCInstrInfo &MII,
+                         const MCRegisterInfo &MRI)
+      : AArch64InstPrinter(MAI, MII, MRI) {}
+  void printAlignedLabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
+                         const MCSubtargetInfo &STI, raw_ostream &O) {
+    AArch64InstPrinter::printAlignedLabel(MI, Address, OpNum, STI, O);
+  }
+};
+
+static std::string AArch64InstPrinterTestPrintAlignedLabel(uint64_t value) {
+  MCAsmInfo MAI;
+  MCInstrInfo MII;
+  MCRegisterInfo MRI;
+  MCSubtargetInfo STI(Triple(""), "", "", "",
+                      makeArrayRef((SubtargetFeatureKV *)NULL, 0),
+                      makeArrayRef((SubtargetSubTypeKV *)NULL, 0), NULL, NULL,
+                      NULL, NULL, NULL, NULL);
+  MCContext Ctx(Triple(""), &MAI, &MRI, &STI);
+  MCInst MI;
+
+  MI.addOperand(MCOperand::createExpr(MCConstantExpr::create(value, Ctx)));
+
+  std::string str;
+  raw_string_ostream O(str);
+  AArch64InstPrinterTest(MAI, MII, MRI).printAlignedLabel(&MI, 0, 0, STI, O);
+  return str;
+}
+
+TEST(AArch64InstPrinterTest, PrintAlignedLabel) {
+  EXPECT_EQ(AArch64InstPrinterTestPrintAlignedLabel(0x0), "0x0");
+  EXPECT_EQ(AArch64InstPrinterTestPrintAlignedLabel(0xffffffff001200eb),
+            "0xffffffff001200eb");
+  EXPECT_EQ(AArch64InstPrinterTestPrintAlignedLabel(0x7c01445bcc10f),
+            "0x7c01445bcc10f");
+}

llvm/unittests/Target/AArch64/CMakeLists.txt

set(LLVM_LINK_COMPONENTS
   MC
   MIRParser
   SelectionDAG
   Support
   Target
   )
 
 add_llvm_target_unittest(AArch64Tests
-  InstSizes.cpp
+  AArch64InstPrinterTest.cpp
   DecomposeStackOffsetTest.cpp
+  InstSizes.cpp
   MatrixRegisterAliasing.cpp
   SMEAttributesTest.cpp
   )
 
 set_property(TARGET AArch64Tests PROPERTY FOLDER "Tests/UnitTests/TargetTests")

llvm/utils/gn/secondary/llvm/unittests/Target/AArch64/BUILD.gn

deps = [
     "//llvm/lib/Target",
     "//llvm/lib/Target/AArch64:LLVMAArch64CodeGen",
     "//llvm/lib/Target/AArch64/MCTargetDesc",
     "//llvm/lib/Target/AArch64/TargetInfo",
     "//llvm/lib/Target/AArch64/Utils",
   ]
   include_dirs = [ "//llvm/lib/Target/AArch64" ]
   sources = [
+    "AArch64InstPrinterTest.cpp",
     "DecomposeStackOffsetTest.cpp",
     "InstSizes.cpp",
     "MatrixRegisterAliasing.cpp",
     "SMEAttributesTest.cpp",
   ]
 }