[libunwind] Fix compile error with CROSS_UNWINDING

[fmayer]

format

[mgorny]

Thanks. I can confirm that it fixes the build.

[MaskRay]

Phabricator doesn't work like other review systems where you use WANT_LGTM=all. There is usually no need to remove a reviewer except a few cases, e.g. a reviewer is apparently not involved in llvm-project for a long time, a reviewer removes themselves from the reviewer list.
Not for this case: sometimes removing a reviewer can be perceived negatively, e.g. whether the patch author wants to bypass someone's opinion.

[fmayer]

In D134969#3827883, @MaskRay wrote:

Phabricator doesn't work like other review systems where you use WANT_LGTM=all. There is usually no need to remove a reviewer except a few cases, e.g. a reviewer is apparently not involved in llvm-project for a long time, a reviewer removes themselves from the reviewer list.
Not for this case: sometimes removing a reviewer can be perceived negatively, e.g. whether the patch author wants to bypass someone's opinion.

This was meant as a signal that I am no longer waiting for or expecting approval from compnerd@

libunwind/src/DwarfInstructions.hpp

if (CFI_Parser<A>::decodeFDE(addressSpace, fdeStart, &fdeInfo,
                                &cieInfo) == NULL) {
     PrologInfo prolog;
     if (CFI_Parser<A>::parseFDEInstructions(addressSpace, fdeInfo, cieInfo, pc,
                                             R::getArch(), &prolog)) {
       // get pointer to cfa (architecture specific)
       pint_t cfa = getCFA(addressSpace, prolog, registers);
 
       (void)stage2;
-#if defined(_LIBUNWIND_TARGET_AARCH64)
+      // __unw_step_stage2 is not used for cross unwinding, so we use
+      // __aarch64__ rather than LIBUNWIND_TARGET_AARCH64 to make sure we are
+      // building for AArch64 natively.
+#if defined(__aarch64__)
       if (stage2 && cieInfo.mteTaggedFrame) {
         pint_t sp = registers.getSP();
         pint_t p = sp;
         // AArch64 doesn't require the value of SP to be 16-byte aligned at
         // all times, only at memory accesses and public interfaces [1]. Thus,
         // a signal could arrive at a point where SP is not aligned properly.
         // In that case, the kernel fixes up [2] the signal frame, but we
         // still have a misaligned SP in the previous frame. If that signal