[LLDB] Switch to RegisterInfo& for EmulateInstruction::WriteRegister

[DavidSpickett]

Summary

WriteRegister and WriteRegisterUnsigned were never pased nullptr,
and only one of them appeared to handle it. Switch to ref to make
the intent clear.

Depends on D134962

[DavidSpickett]

ping!

lldb/include/lldb/Core/EmulateInstruction.h

 //===-- EmulateInstruction.h ------------------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
static const char *TranslateRegister(lldb::RegisterKind reg_kind,
                                        uint32_t reg_num, std::string &reg_name);
 
   // RegisterInfo variants
   bool ReadRegister(const RegisterInfo &reg_info, RegisterValue &reg_value);
 
   uint64_t ReadRegisterUnsigned(const RegisterInfo &reg_info,
                                 uint64_t fail_value, bool *success_ptr);
 
-  bool WriteRegister(const Context &context, const RegisterInfo *ref_info,
+  bool WriteRegister(const Context &context, const RegisterInfo &ref_info,
                      const RegisterValue &reg_value);
 
   bool WriteRegisterUnsigned(const Context &context,
-                             const RegisterInfo *reg_info, uint64_t reg_value);
+                             const RegisterInfo &reg_info, uint64_t reg_value);
 
   // Register kind and number variants
   bool ReadRegister(lldb::RegisterKind reg_kind, uint32_t reg_num,
                     RegisterValue &reg_value);
 
   bool WriteRegister(const Context &context, lldb::RegisterKind reg_kind,
                      uint32_t reg_num, const RegisterValue &reg_value);
 

lldb/source/Core/EmulateInstruction.cpp

 //===-- EmulateInstruction.cpp --------------------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
uint64_t EmulateInstruction::ReadRegisterUnsigned(const RegisterInfo &reg_info,
   if (ReadRegister(reg_info, reg_value))
     return reg_value.GetAsUInt64(fail_value, success_ptr);
   if (success_ptr)
     *success_ptr = false;
   return fail_value;
 }
 
 bool EmulateInstruction::WriteRegister(const Context &context,
-                                       const RegisterInfo *reg_info,
+                                       const RegisterInfo &reg_info,
                                        const RegisterValue &reg_value) {
   if (m_write_reg_callback != nullptr)
-    return m_write_reg_callback(this, m_baton, context, reg_info, reg_value);
+    return m_write_reg_callback(this, m_baton, context, &reg_info, reg_value);
   return false;
 }
 
 bool EmulateInstruction::WriteRegister(const Context &context,
                                        lldb::RegisterKind reg_kind,
                                        uint32_t reg_num,
                                        const RegisterValue &reg_value) {
   llvm::Optional<RegisterInfo> reg_info = GetRegisterInfo(reg_kind, reg_num);
   if (reg_info)
-    return WriteRegister(context, &(*reg_info), reg_value);
+    return WriteRegister(context, *reg_info, reg_value);
   return false;
 }
 
 bool EmulateInstruction::WriteRegisterUnsigned(const Context &context,
                                                lldb::RegisterKind reg_kind,
                                                uint32_t reg_num,
                                                uint64_t uint_value) {
   llvm::Optional<RegisterInfo> reg_info = GetRegisterInfo(reg_kind, reg_num);
   if (reg_info) {
     RegisterValue reg_value;
     if (reg_value.SetUInt(uint_value, reg_info->byte_size))
-      return WriteRegister(context, &(*reg_info), reg_value);
+      return WriteRegister(context, *reg_info, reg_value);
   }
   return false;
 }
 
 bool EmulateInstruction::WriteRegisterUnsigned(const Context &context,
-                                               const RegisterInfo *reg_info,
+                                               const RegisterInfo &reg_info,
                                                uint64_t uint_value) {
-  if (reg_info != nullptr) {
-    RegisterValue reg_value;
-    if (reg_value.SetUInt(uint_value, reg_info->byte_size))
-      return WriteRegister(context, reg_info, reg_value);
-  }
+  if (reg_value.SetUInt(uint_value, reg_info.byte_size))
   return false;
 }
 
 size_t EmulateInstruction::ReadMemory(const Context &context, lldb::addr_t addr,
                                       void *dst, size_t dst_len) {
   if (m_read_mem_callback != nullptr)
     return m_read_mem_callback(this, m_baton, context, addr, dst, dst_len) ==
            dst_len;

lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

 //===-- EmulateInstructionARM.cpp -----------------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
if (ConditionPassed(opcode)) {
 
     for (i = 0; i < regs; ++i) {
       llvm::Optional<RegisterInfo> dwarf_reg =
           GetRegisterInfo(eRegisterKindDWARF, start_reg + d + i);
       context.SetAddress(addr);
       data = MemARead(context, addr, reg_byte_size, 0, &success);
       if (!success)
         return false;
-      if (!WriteRegisterUnsigned(context, &(*dwarf_reg), data))
+      if (!WriteRegisterUnsigned(context, *dwarf_reg, data))
         return false;
       addr += reg_byte_size;
     }
 
     context.type = EmulateInstruction::eContextAdjustStackPointer;
     context.SetImmediateSigned(sp_offset);
 
     if (!WriteRegisterUnsigned(context, eRegisterKindGeneric,

lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp

 //===-- EmulateInstructionARM64.cpp ---------------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
case MemOp_LOAD: {
     if (data_Rt.SetFromMemoryData(&(*reg_info_Rt), buffer,
                                   reg_info_Rt->byte_size, eByteOrderLittle,
                                   error) == 0)
       return false;
 
     if (!vector && is_signed && !data_Rt.SignExtend(datasize))
       return false;
 
-    if (!WriteRegister(context_t, &(*reg_info_Rt), data_Rt))
+    if (!WriteRegister(context_t, *reg_info_Rt, data_Rt))
       return false;
 
     if (!rt_unknown) {
       if (!ReadMemory(context_t2, address + size, buffer,
                       reg_info_Rt2->byte_size))
         return false;
     }
 
     if (data_Rt2.SetFromMemoryData(&(*reg_info_Rt2), buffer,
                                    reg_info_Rt2->byte_size, eByteOrderLittle,
                                    error) == 0)
       return false;
 
     if (!vector && is_signed && !data_Rt2.SignExtend(datasize))
       return false;
 
-    if (!WriteRegister(context_t2, &(*reg_info_Rt2), data_Rt2))
+    if (!WriteRegister(context_t2, *reg_info_Rt2, data_Rt2))
       return false;
   } break;
 
   default:
     break;
   }
 
   if (wback) {
     if (wb_unknown)
       wb_address = LLDB_INVALID_ADDRESS;
     Context context;
     context.SetImmediateSigned(idx);
     if (n == 31)
       context.type = eContextAdjustStackPointer;
     else
       context.type = eContextAdjustBaseRegister;
-    WriteRegisterUnsigned(context, &(*reg_info_base), wb_address);
+    WriteRegisterUnsigned(context, *reg_info_base, wb_address);
   }
   return true;
 }
 
 template <EmulateInstructionARM64::AddrMode a_mode>
 bool EmulateInstructionARM64::EmulateLDRSTRImm(const uint32_t opcode) {
   uint32_t size = Bits32(opcode, 31, 30);
   uint32_t opc = Bits32(opcode, 23, 22);
case MemOp_LOAD:
     if (!ReadMemory(context, address, buffer, reg_info_Rt->byte_size))
       return false;
 
     if (data_Rt.SetFromMemoryData(&(*reg_info_Rt), buffer,
                                   reg_info_Rt->byte_size, eByteOrderLittle,
                                   error) == 0)
       return false;
 
-    if (!WriteRegister(context, &(*reg_info_Rt), data_Rt))
+    if (!WriteRegister(context, *reg_info_Rt, data_Rt))
       return false;
     break;
   default:
     return false;
   }
 
   if (wback) {
     if (postindex)
       address += offset;
 
     if (n == 31)
       context.type = eContextAdjustStackPointer;
     else
       context.type = eContextAdjustBaseRegister;
     context.SetImmediateSigned(offset);
 
-    if (!WriteRegisterUnsigned(context, &(*reg_info_base), address))
+    if (!WriteRegisterUnsigned(context, *reg_info_base, address))
       return false;
   }
   return true;
 }
 
 bool EmulateInstructionARM64::EmulateB(const uint32_t opcode) {
 #if 0
     // ARM64 pseudo code...

lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp

 //===-- EmulateInstructionMIPS.cpp ----------------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
llvm::Optional<RegisterInfo> reg_info_src =
         GetRegisterInfo(eRegisterKindDWARF, dwarf_zero_mips + src);
     if (!reg_info_src)
       return false;
 
     Context context;
     context.type = eContextPopRegisterOffStack;
     context.SetAddress(address);
 
-    return WriteRegister(context, &(*reg_info_src), data_src);
+    return WriteRegister(context, *reg_info_src, data_src);
   }
 
   return false;
 }
 
 bool EmulateInstructionMIPS::Emulate_SUBU_ADDU(llvm::MCInst &insn) {
   // SUBU sp, <src>, <rt>
   // ADDU sp, <src>, <rt>
llvm::Optional<RegisterInfo> reg_info_src =
         GetRegisterInfo(eRegisterKindDWARF, dwarf_zero_mips + src);
     if (!reg_info_src)
       return false;
 
     Context context;
     context.type = eContextPopRegisterOffStack;
     context.SetAddress(base_address);
 
-    return WriteRegister(context, &(*reg_info_src), data_src);
+    return WriteRegister(context, *reg_info_src, data_src);
   }
 
   return false;
 }
 
 /* Emulate LWM16, LWM32 and LWP instructions.
 
    LWM16 always has stack pointer as a base register (but it is still available
llvm::Optional<RegisterInfo> reg_info_dst =
         GetRegisterInfo(eRegisterKindDWARF, dwarf_zero_mips + dst);
     if (!reg_info_dst)
       return false;
 
     Context context;
     context.type = eContextPopRegisterOffStack;
     context.SetAddress(base_address + (i * 4));
 
-    if (!WriteRegister(context, &(*reg_info_dst), data_dst))
+    if (!WriteRegister(context, *reg_info_dst, data_dst))
       return false;
   }
 
   return true;
 }
 
 bool EmulateInstructionMIPS::Emulate_JRADDIUSP(llvm::MCInst &insn) {
   bool success = false;

lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp

 //===-- EmulateInstructionMIPS64.cpp --------------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
if (nonvolatile_reg_p(src)) {
     llvm::Optional<RegisterInfo> reg_info_src =
         GetRegisterInfo(eRegisterKindDWARF, dwarf_zero_mips64 + src);
     if (!reg_info_src)
       return false;
 
     Context context;
     context.type = eContextRegisterLoad;
 
-    return WriteRegister(context, &(*reg_info_src), data_src);
+    return WriteRegister(context, *reg_info_src, data_src);
   }
 
   return false;
 }
 
 bool EmulateInstructionMIPS64::Emulate_LUI(llvm::MCInst &insn) {
   // LUI rt, immediate
   // GPR[rt] <- sign_extend(immediate << 16)