[AMDGPU] Move SIModeRegisterDefaults to SI MFI

[rampitec]

Summary

It does not belong to a general AMDGPU MFI.

[arsenm]

I think r600 does actually have these options, it's just not wired up

[vitalybuka]

This breaks
https://lab.llvm.org/buildbot/#/builders/5/builds/27754
https://lab.llvm.org/buildbot/#/builders/74/builds/13820

******************** TEST 'LLVM :: CodeGen/AMDGPU/sdivrem24.ll' FAILED ********************
Script:
--
: 'RUN: at line 1';   /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm_build_msan_track_origins/bin/llc -march=amdgcn < /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/test/CodeGen/AMDGPU/sdivrem24.ll | /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm_build_msan_track_origins/bin/FileCheck -check-prefix=SI -check-prefix=FUNC /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/test/CodeGen/AMDGPU/sdivrem24.ll
: 'RUN: at line 2';   /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm_build_msan_track_origins/bin/llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global < /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/test/CodeGen/AMDGPU/sdivrem24.ll | /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm_build_msan_track_origins/bin/FileCheck -check-prefix=SI -check-prefix=FUNC /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/test/CodeGen/AMDGPU/sdivrem24.ll
: 'RUN: at line 3';   /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm_build_msan_track_origins/bin/llc -march=r600 -mcpu=redwood < /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/test/CodeGen/AMDGPU/sdivrem24.ll | /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm_build_msan_track_origins/bin/FileCheck -check-prefix=EG -check-prefix=FUNC /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/test/CodeGen/AMDGPU/sdivrem24.ll
--
Exit Code: 2

Command Output (stderr):
--
==3187040==WARNING: MemorySanitizer: use-of-uninitialized-value
    #0 0x55c8b8ac7870 in llvm::AMDGPUTargetLowering::LowerDIVREM24(llvm::SDValue, llvm::SelectionDAG&, bool) const /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:1641:20
    #1 0x55c8b8a9e21d in llvm::AMDGPUTargetLowering::LowerSDIVREM(llvm::SDValue, llvm::SelectionDAG&) const /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:1965:23
    #2 0x55c8b91a6d2b in llvm::R600TargetLowering::LowerOperation(llvm::SDValue, llvm::SelectionDAG&) const /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp:398:41
    #3 0x55c8c09706e2 in (anonymous namespace)::SelectionDAGLegalize::LegalizeOp(llvm::SDNode*) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1292:29
    #4 0x55c8c096cb97 in llvm::SelectionDAG::Legalize() /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:5098:19
    #5 0x55c8c0db7298 in llvm::SelectionDAGISel::CodeGenAndEmitDAG() /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:891:13
    #6 0x55c8c0daec5b in llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1598:7
    #7 0x55c8c0da07f4 in llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:467:3
    #8 0x55c8bdf8b53e in llvm::MachineFunctionPass::runOnFunction(llvm::Function&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:91:13
    #9 0x55c8bf296ee0 in llvm::FPPassManager::runOnFunction(llvm::Function&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1430:27
    #10 0x55c8bf2b9e36 in llvm::FPPassManager::runOnModule(llvm::Module&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1476:16
    #11 0x55c8bf299f6b in runOnModule /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1545:27
    #12 0x55c8bf299f6b in llvm::legacy::PassManagerImpl::run(llvm::Module&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:535:44
    #13 0x55c8b7bc2cd9 in compileModule(char**, llvm::LLVMContext&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/tools/llc/llc.cpp:734:8
    #14 0x55c8b7bba3f2 in main /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/tools/llc/llc.cpp:418:22
    #15 0x7f9534cabd8f  (/lib/x86_64-linux-gnu/libc.so.6+0x29d8f) (BuildId: 69389d485a9793dbe873f0ea2c93e02efaa9aa3d)
    #16 0x7f9534cabe3f in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x29e3f) (BuildId: 69389d485a9793dbe873f0ea2c93e02efaa9aa3d)
    #17 0x55c8b7b250b4 in _start (/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm_build_msan_track_origins/bin/llc+0x397d0b4)

  Memory was marked as uninitialized
    #0 0x55c8b7b5a4bd in __msan_allocated_memory /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/compiler-rt/lib/msan/msan_interceptors.cpp:928:5
    #1 0x55c8b813a598 in llvm::BumpPtrAllocatorImpl<llvm::MallocAllocator, 4096ul, 4096ul, 128ul>::Allocate(unsigned long, llvm::Align) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/include/llvm/Support/Allocator.h:170:7
    #2 0x55c8b91a5ddb in Allocate /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/include/llvm/Support/Allocator.h:209:12
    #3 0x55c8b91a5ddb in Allocate /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/include/llvm/Support/AllocatorBase.h:47:43
    #4 0x55c8b91a5ddb in Allocate<llvm::R600MachineFunctionInfo> /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/include/llvm/Support/AllocatorBase.h:70:29
    #5 0x55c8b91a5ddb in create<llvm::R600MachineFunctionInfo> /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/include/llvm/CodeGen/MachineFunction.h:104:27
    #6 0x55c8b91a5ddb in getInfo<llvm::R600MachineFunctionInfo> /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/include/llvm/CodeGen/MachineFunction.h:756:16
    #7 0x55c8b91a5ddb in llvm::R600TargetLowering::LowerOperation(llvm::SDValue, llvm::SelectionDAG&) const /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp:396:37
    #8 0x55c8c0bdc1df in llvm::TargetLowering::LowerOperationWrapper(llvm::SDNode*, llvm::SmallVectorImpl<llvm::SDValue>&, llvm::SelectionDAG&) const /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:10094:17
    #9 0x55c8c0e13d7c in llvm::DAGTypeLegalizer::CustomLowerNode(llvm::SDNode*, llvm::EVT, bool) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
    #10 0x55c8c0e75822 in llvm::DAGTypeLegalizer::PromoteIntegerOperand(llvm::SDNode*, unsigned int) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:1614:7
    #11 0x55c8c0e001fa in llvm::DAGTypeLegalizer::run() /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp:326:28
    #12 0x55c8c0e1a198 in llvm::SelectionDAG::LegalizeTypes() /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp:1060:34
    #13 0x55c8c0db4e30 in llvm::SelectionDAGISel::CodeGenAndEmitDAG() /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:793:23
    #14 0x55c8c0daec5b in llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1598:7
    #15 0x55c8c0da07f4 in llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:467:3
    #16 0x55c8bdf8b53e in llvm::MachineFunctionPass::runOnFunction(llvm::Function&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:91:13
    #17 0x55c8bf296ee0 in llvm::FPPassManager::runOnFunction(llvm::Function&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1430:27
    #18 0x55c8bf2b9e36 in llvm::FPPassManager::runOnModule(llvm::Module&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1476:16
    #19 0x55c8bf299f6b in runOnModule /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1545:27
    #20 0x55c8bf299f6b in llvm::legacy::PassManagerImpl::run(llvm::Module&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:535:44
    #21 0x55c8b7bc2cd9 in compileModule(char**, llvm::LLVMContext&) /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/tools/llc/llc.cpp:734:8
    #22 0x55c8b7bba3f2 in main /b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/llvm/tools/llc/llc.cpp:418:22
    #23 0x7f9534cabd8f  (/lib/x86_64-linux-gnu/libc.so.6+0x29d8f) (BuildId: 69389d485a9793dbe873f0ea2c93e02efaa9aa3d)

[rampitec]

In D134666#3817042, @vitalybuka wrote:

This breaks
https://lab.llvm.org/buildbot/#/builders/5/builds/27754
https://lab.llvm.org/buildbot/#/builders/74/builds/13820

Thanks for taking care of this!

[rampitec]

Fixed msan failure. Turns out I should not request SI MFI and check if it is null.

[arsenm]

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

1635–1638

This shows it is used by shared code, what's the point?

[rampitec]

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

1635–1638

R600 indeed uses the same lowering for mul24 and calls this function.

[rampitec]

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

1635–1638

It's just R600 always flush as far as I understand.

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

SDValue AMDGPUTargetLowering::LowerDIVREM24(SDValue Op, SelectionDAG &DAG,
 
   // fq = trunc(fq);
   fq = DAG.getNode(ISD::FTRUNC, DL, FltVT, fq);
 
   // float fqneg = -fq;
   SDValue fqneg = DAG.getNode(ISD::FNEG, DL, FltVT, fq);
 
   MachineFunction &MF = DAG.getMachineFunction();
-  const AMDGPUMachineFunction *MFI = MF.getInfo<AMDGPUMachineFunction>();
+
+  bool UseFmadFtz = false;
+  if (Subtarget->isGCN()) {
+    const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
+    UseFmadFtz = MFI->getMode().allFP32Denormals();
+  }
 
   // float fr = mad(fqneg, fb, fa);
-  unsigned OpCode = !Subtarget->hasMadMacF32Insts() ?
-                    (unsigned)ISD::FMA :
-                    !MFI->getMode().allFP32Denormals() ?
-                    (unsigned)ISD::FMAD :
-                    (unsigned)AMDGPUISD::FMAD_FTZ;
+  unsigned OpCode = !Subtarget->hasMadMacF32Insts() ? (unsigned)ISD::FMA
+                    : UseFmadFtz ? (unsigned)AMDGPUISD::FMAD_FTZ
+                                 : (unsigned)ISD::FMAD;
   SDValue fr = DAG.getNode(OpCode, DL, FltVT, fqneg, fb, fa);
 
   // int iq = (int)fq;
   SDValue iq = DAG.getNode(ToInt, DL, IntVT, fq);
 
   // fr = fabs(fr);
   fr = DAG.getNode(ISD::FABS, DL, FltVT, fr);
 

llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h

protected:
 
   /// Align for dynamic shared memory if any. Dynamic shared memory is
   /// allocated directly after the static one, i.e., LDSSize. Need to pad
   /// LDSSize to ensure that dynamic one is aligned accordingly.
   /// The maximal alignment is updated during IR translation or lowering
   /// stages.
   Align DynLDSAlign;
 
-  // State of MODE register, assumed FP mode.
-  AMDGPU::SIModeRegisterDefaults Mode;
-
   // Kernels + shaders. i.e. functions called by the hardware and not called
   // by other functions.
   bool IsEntryFunction = false;
 
   // Entry points called by other functions instead of directly by the hardware.
   bool IsModuleEntryFunction = false;
 
   bool NoSignedZerosFPMath = false;
public:
   uint32_t getLDSSize() const {
     return LDSSize;
   }
 
   uint32_t getGDSSize() const {
     return GDSSize;
   }
 
-  AMDGPU::SIModeRegisterDefaults getMode() const {
-    return Mode;
-  }
-
   bool isEntryFunction() const {
     return IsEntryFunction;
   }
 
   bool isModuleEntryFunction() const { return IsModuleEntryFunction; }
 
   bool hasNoSignedZerosFPMath() const {
     return NoSignedZerosFPMath;

llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp

 #include "AMDGPUSubtarget.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/IR/Constants.h"
 #include "llvm/Target/TargetMachine.h"
 
 using namespace llvm;
 
 AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF)
-    : Mode(MF.getFunction()), IsEntryFunction(AMDGPU::isEntryFunctionCC(
+    : IsEntryFunction(AMDGPU::isEntryFunctionCC(
                                   MF.getFunction().getCallingConv())),
       IsModuleEntryFunction(
           AMDGPU::isModuleEntryFunctionCC(MF.getFunction().getCallingConv())),
       NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath) {
   const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(MF);
 
   // FIXME: Should initialize KernArgSize based on ExplicitKernelArgOffset,
   // except reserved size is not correctly aligned.

llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h

 
 } // end namespace yaml
 
 /// This class keeps track of the SPI_SP_INPUT_ADDR config register, which
 /// tells the hardware which interpolation parameters to load.
 class SIMachineFunctionInfo final : public AMDGPUMachineFunction {
   friend class GCNTargetMachine;
 
+  // State of MODE register, assumed FP mode.
+  AMDGPU::SIModeRegisterDefaults Mode;
+
   // Registers that may be reserved for spilling purposes. These may be the same
   // as the input registers.
   Register ScratchRSrcReg = AMDGPU::PRIVATE_RSRC_REG;
 
   // This is the the unswizzled offset from the current dispatch's scratch wave
   // base to the beginning of the current function's frame.
   Register FrameOffsetReg = AMDGPU::FP_REG;
 
bool initializeBaseYamlFields(const yaml::SIMachineFunctionInfo &YamlMFI,
                                 const MachineFunction &MF,
                                 PerFunctionMIParsingState &PFS,
                                 SMDiagnostic &Error, SMRange &SourceRange);
 
   void reserveWWMRegister(Register Reg) {
     WWMReservedRegs.insert(Reg);
   }
 
+  AMDGPU::SIModeRegisterDefaults getMode() const {
+    return Mode;
+  }
+
   ArrayRef<SIRegisterInfo::SpilledReg>
   getSGPRToVGPRSpills(int FrameIndex) const {
     auto I = SGPRToVGPRSpills.find(FrameIndex);
     return (I == SGPRToVGPRSpills.end())
                ? ArrayRef<SIRegisterInfo::SpilledReg>()
                : makeArrayRef(I->second);
   }
 

llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp

 #include <vector>
 
 #define MAX_LANES 64
 
 using namespace llvm;
 
 SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF)
   : AMDGPUMachineFunction(MF),
+    Mode(MF.getFunction()),
     BufferPSV(static_cast<const AMDGPUTargetMachine &>(MF.getTarget())),
     ImagePSV(static_cast<const AMDGPUTargetMachine &>(MF.getTarget())),
     GWSResourcePSV(static_cast<const AMDGPUTargetMachine &>(MF.getTarget())),
     PrivateSegmentBuffer(false),
     DispatchPtr(false),
     QueuePtr(false),
     KernargSegmentPtr(false),
     DispatchID(false),