This is an archive of the discontinued LLVM Phabricator instance.

llvm/test/CodeGen/AArch64/sve-vscale-combine.ll
93	nit: I think this test is redundant as it's really testing the same thing as the i64 test. Perhaps you can remove this one before landing the patch?

This revision is now accepted and ready to land.Aug 18 2022, 2:47 AM

Jimerlife added inline comments.Aug 18 2022, 2:50 AM

llvm/test/CodeGen/AArch64/sve-vscale-combine.ll
93	OK, I will remove this test. Thank you.

LGTM cheers

This revision was landed with ongoing or failed builds.Aug 18 2022, 2:58 AM

Closed by commit rGeeac8944180e: Precommit tests for D132115 (authored by Jimerlife). · Explain Why

This revision was automatically updated to reflect the committed changes.

Jimerlife added a commit: rGeeac8944180e: Precommit tests for D132115.

Harbormaster completed remote builds in B181940: Diff 453580.Aug 18 2022, 3:03 AM

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sve-vscale-combine.ll

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llvm/test/CodeGen/AArch64/sve-vscale-combine.ll

	Show First 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
	; CHECK-NEXT: asr x8, x8, #4			; CHECK-NEXT: asr x8, x8, #4
	; CHECK-NEXT: add w0, w0, w8			; CHECK-NEXT: add w0, w0, w8
	; CHECK-NEXT: ret			; CHECK-NEXT: ret
	%vscale = call i32 @llvm.vscale.i32()			%vscale = call i32 @llvm.vscale.i32()
	%sub = sub i32 %in, %vscale			%sub = sub i32 %in, %vscale
	ret i32 %sub			ret i32 %sub
	}			}

				; Tests of multiple uses of vscale when canonicalize
				; (sub X, (vscale * C)) to (add X, (vscale * -C))
				define i64 @multiple_uses_sub_vscale_i64(i64 %x, i64 %y) nounwind {
				; CHECK-LABEL: multiple_uses_sub_vscale_i64:
				; CHECK-NEXT: rdvl x8, #1
				; CHECK-NEXT: rdvl x9, #-1
				; CHECK-NEXT: lsr x8, x8, #4
				; CHECK-NEXT: asr x9, x9, #4
				; CHECK-NEXT: add x9, x0, x9
				; CHECK-NEXT: add x8, x1, x8
				; CHECK-NEXT: mul x0, x9, x8
				; CHECK-NEXT: ret
				%vscale = call i64 @llvm.vscale.i64()
				%sub = sub i64 %x, %vscale
				%add = add i64 %y, %vscale
				%res = mul i64 %sub, %add
				ret i64 %res
				}

	; Fold (shl (vscale * C0), C1) to (vscale * (C0 << C1)).			; Fold (shl (vscale * C0), C1) to (vscale * (C0 << C1)).
				david-armUnsubmitted Not Done Reply Inline Actions nit: I think this test is redundant as it's really testing the same thing as the i64 test. Perhaps you can remove this one before landing the patch? david-arm: nit: I think this test is redundant as it's really testing the same thing as the i64 test.
				JimerlifeAuthorUnsubmitted Done Reply Inline Actions OK, I will remove this test. Thank you. Jimerlife: OK, I will remove this test. Thank you.
	; C0 = 1 , C1 = 4			; C0 = 1 , C1 = 4
	; At IR level, %shl = 2^4 * VSCALE.			; At IR level, %shl = 2^4 * VSCALE.
	; At Assembly level, the output of RDVL is also 2^4 * VSCALE.			; At Assembly level, the output of RDVL is also 2^4 * VSCALE.
	; Hence, the immediate for RDVL is #1.			; Hence, the immediate for RDVL is #1.
	define i64 @combine_shl_vscale_i64() nounwind {			define i64 @combine_shl_vscale_i64() nounwind {
	; CHECK-LABEL: combine_shl_vscale_i64:			; CHECK-LABEL: combine_shl_vscale_i64:
	; CHECK-NOT: shl			; CHECK-NOT: shl
	; CHECK-NEXT: rdvl x0, #1			; CHECK-NEXT: rdvl x0, #1
	Show All 15 Lines

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