[LoongArch] Override TargetLowering::isOffsetFoldingLegal()

[wangleiat]

Summary

This patch disable GlobalAddress+Offset folding.

[xen0n]

RISCV and CSKY both do the same. This one was easy to review. Thanks for the quick fix!

[xen0n]

In D131491#3709615, @xen0n wrote:

RISCV and CSKY both do the same. This one was easy to review. Thanks for the quick fix!

Or rather, both contain the same comments ;-)

(Looking closer, CSKY doesn't have isOffsetFoldingLegal, but the core principle stays the same.)

llvm/lib/Target/LoongArch/LoongArchISelLowering.h

class LoongArchTargetLowering : public TargetLowering {
   const LoongArchSubtarget &Subtarget;
 
 public:
   explicit LoongArchTargetLowering(const TargetMachine &TM,
                                    const LoongArchSubtarget &STI);
 
   const LoongArchSubtarget &getSubtarget() const { return Subtarget; }
 
+  bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
+
   // Provide custom lowering hooks for some operations.
   SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
   void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
                           SelectionDAG &DAG) const override;
 
   SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
 
   // This method returns the name of a target specific DAG node.

llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
   const Align FunctionAlignment(4);
   setMinFunctionAlignment(FunctionAlignment);
 
   setTargetDAGCombine(ISD::AND);
   setTargetDAGCombine(ISD::OR);
   setTargetDAGCombine(ISD::SRL);
 }
 
+bool LoongArchTargetLowering::isOffsetFoldingLegal(
+    const GlobalAddressSDNode *GA) const {
+  // In order to maximise the opportunity for common subexpression elimination,
+  // keep a separate ADD node for the global address offset instead of folding
+  // it in the global address node. Later peephole optimisations may choose to
+  // fold it back in when profitable.
+  return false;
+}
+
 SDValue LoongArchTargetLowering::LowerOperation(SDValue Op,
                                                 SelectionDAG &DAG) const {
   switch (Op.getOpcode()) {
   default:
     report_fatal_error("unimplemented operand");
   case ISD::GlobalAddress:
     return lowerGlobalAddress(Op, DAG);
   case ISD::SHL_PARTS:

llvm/test/CodeGen/LoongArch/ir-instruction/load-store.ll

 ; ALL:       # %bb.0:
 
 ; LA32NOPIC-NEXT:   pcalau12i $a1, arr
 ; LA32NOPIC-NEXT:   addi.w $a2, $a1, arr
 ; LA32PIC-NEXT:     pcalau12i $a1, .Larr$local
 ; LA32PIC-NEXT:     addi.w $a2, $a1, .Larr$local
 ; LA32-NEXT:        ld.w $a1, $a2, 0
 ; LA32-NEXT:        st.w $a0, $a2, 0
-; LA32NOPIC-NEXT:   ld.w $a3, $a2, 0
-; LA32NOPIC-NEXT:   st.w $a0, $a2, 0
+; LA32NOPIC-NEXT:   ld.w $a3, $a2, 36
+; LA32NOPIC-NEXT:   st.w $a0, $a2, 36
 ; LA32PIC-NEXT:     ld.w $a3, $a2, 36
 ; LA32PIC-NEXT:     st.w $a0, $a2, 36
 
 ; LA64NOPIC-NEXT:   pcalau12i $a1, arr
 ; LA64NOPIC-NEXT:   addi.d $a2, $a1, arr
 ; LA64PIC-NEXT:     pcalau12i $a1, .Larr$local
 ; LA64PIC-NEXT:     addi.d $a2, $a1, .Larr$local
 ; LA64-NEXT:        ld.w $a1, $a2, 0
 ; LA64-NEXT:        st.w $a0, $a2, 0
-; LA64NOPIC-NEXT:   ld.w $a3, $a2, 0
-; LA64NOPIC-NEXT:   st.w $a0, $a2, 0
+; LA64NOPIC-NEXT:   ld.w $a3, $a2, 36
+; LA64NOPIC-NEXT:   st.w $a0, $a2, 36
 ; LA64PIC-NEXT:     ld.w $a3, $a2, 36
 ; LA64PIC-NEXT:     st.w $a0, $a2, 36
 
 ; ALL-NEXT:         move $a0, $a1
 ; ALL-NEXT:         ret
 
   %1 = load volatile i32, ptr @arr, align 4
   store i32 %a, ptr @arr, align 4