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[LoongArch] Add codegen support for atomicrmw xchg operation on LA32
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Authored by gonglingqin on Aug 4 2022, 7:05 PM.

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gonglingqin created this revision.Aug 4 2022, 7:05 PM
Herald added a project: Restricted Project. · View Herald TranscriptAug 4 2022, 7:05 PM
gonglingqin requested review of this revision.Aug 4 2022, 7:05 PM
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xen0n added inline comments.Aug 15 2022, 12:24 AM
llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
111

In GCC they apparently used dbar 0x700 for open-coded atomic CAS templates, that seemed to result from a hardware erratum. If in a future hardware iteration this dbar is going to become unnecessary, coding dbar 0x700 here might be a good idea.

You may confirm with the CPU designers and the GCC team for this.

llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
26

Have to rebase...

gonglingqin added inline comments.Aug 16 2022, 4:57 AM
llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
111

Thanks, this issue is being confirmed.

llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
26

Thanks for your reminding. I will rebase this patch and D131228.

gonglingqin added inline comments.Aug 28 2022, 8:37 PM
llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
111

Thank you for your reminder. After confirmation, Dbar 0x700 will be used in the subsequent CAS operation, and Dbar 0 is sufficient in the current atomic binary operation.

SixWeining accepted this revision.Sep 6 2022, 6:55 PM
This revision is now accepted and ready to land.Sep 6 2022, 6:55 PM