[LoongArch] Refactor insertDivByZeroTrap

[wangleiat]

Summary

Ensure non-terminators don't follow terminators.
This patch fixes the sdiv-udiv-srem-urem.ll test failure with
expensive check.

[MaskRay]

Some nits

llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

740–741

Keep the reference for the non-null semantics.

779

Move EndMBB operations after BreakMBB? So that the MBB modify order resembles more on the MBB placement order.

[MaskRay]

Ensure non-terminators don't follow terminators.

Ensure the non-terminator BREAK doesn't follow the terminator BNEZ.

[wangleiat]

In D130247#3674119, @MaskRay wrote:

Ensure non-terminators don't follow terminators.

Ensure the non-terminator BREAK doesn't follow the terminator BNEZ.

Thanks.

llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

740–741

Keep the reference for the non-null semantics.

740–741

Keep the reference for the non-null semantics.

Thanks, I think it's better to keep the status quo.
Firstly, it is possible to keep the same declaration as the caller, and secondly, if a reference is passed, it will increase the parameters of BuildMI.
(Seems to be irrelevant reasons ^_^)

779

Move EndMBB operations after BreakMBB? So that the MBB modify order resembles more on the MBB placement order.

Thanks, I'll re-order the basic block settings.
But transferring the remaining MBB and its successor edges to EndMBB(Maybe changing the name would be better?) is something that must be done first.

[wangleiat]

Address @MaskRay's comments.

llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

SDValue LoongArchTargetLowering::PerformDAGCombine(SDNode *N,
   case ISD::OR:
     return performORCombine(N, DAG, DCI, Subtarget);
   case ISD::SRL:
     return performSRLCombine(N, DAG, DCI, Subtarget);
   }
   return SDValue();
 }
 
 static MachineBasicBlock *insertDivByZeroTrap(MachineInstr &MI,
-                                              MachineBasicBlock &MBB,
-                                              const TargetInstrInfo &TII) {
+                                              MachineBasicBlock *MBB) {
   if (!ZeroDivCheck)
-    return &MBB;
+    return MBB;
 
   // Build instructions:
+  // MBB:
   //   div(or mod)   $dst, $dividend, $divisor
-  //   bnez          $divisor, 8
-  //   break         7
+  //   bnez          $divisor, SinkMBB
+  // BreakMBB:
+  //   break         7 // BRK_DIVZERO
+  // SinkMBB:
   //   fallthrough
+  const BasicBlock *LLVM_BB = MBB->getBasicBlock();
+  MachineFunction::iterator It = ++MBB->getIterator();
+  MachineFunction *MF = MBB->getParent();
+  auto BreakMBB = MF->CreateMachineBasicBlock(LLVM_BB);
+  auto SinkMBB = MF->CreateMachineBasicBlock(LLVM_BB);
+  MF->insert(It, BreakMBB);
+  MF->insert(It, SinkMBB);
+
+  // Transfer the remainder of MBB and its successor edges to SinkMBB.
+  SinkMBB->splice(SinkMBB->end(), MBB, std::next(MI.getIterator()), MBB->end());
+  SinkMBB->transferSuccessorsAndUpdatePHIs(MBB);
+
+  const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
+  DebugLoc DL = MI.getDebugLoc();
   MachineOperand &Divisor = MI.getOperand(2);
-  auto FallThrough = std::next(MI.getIterator());
+  Register DivisorReg = Divisor.getReg();
 
-  BuildMI(MBB, FallThrough, MI.getDebugLoc(), TII.get(LoongArch::BNEZ))
-      .addReg(Divisor.getReg(), getKillRegState(Divisor.isKill()))
-      .addImm(8);
+  // MBB:
+  BuildMI(MBB, DL, TII.get(LoongArch::BNEZ))
+      .addReg(DivisorReg, getKillRegState(Divisor.isKill()))
+      .addMBB(SinkMBB);
+  MBB->addSuccessor(BreakMBB);
+  MBB->addSuccessor(SinkMBB);
 
+  // BreakMBB:
   // See linux header file arch/loongarch/include/uapi/asm/break.h for the
   // definition of BRK_DIVZERO.
-  BuildMI(MBB, FallThrough, MI.getDebugLoc(), TII.get(LoongArch::BREAK))
-      .addImm(7/*BRK_DIVZERO*/);
+  BuildMI(BreakMBB, DL, TII.get(LoongArch::BREAK)).addImm(7 /*BRK_DIVZERO*/);
+  BreakMBB->addSuccessor(SinkMBB);
 
   // Clear Divisor's kill flag.
   Divisor.setIsKill(false);
 
-  return &MBB;
+  return SinkMBB;
 }
 
 MachineBasicBlock *LoongArchTargetLowering::EmitInstrWithCustomInserter(
     MachineInstr &MI, MachineBasicBlock *BB) const {
 
   switch (MI.getOpcode()) {
   default:
     llvm_unreachable("Unexpected instr type to insert");
   case LoongArch::DIV_W:
   case LoongArch::DIV_WU:
   case LoongArch::MOD_W:
   case LoongArch::MOD_WU:
   case LoongArch::DIV_D:
   case LoongArch::DIV_DU:
   case LoongArch::MOD_D:
   case LoongArch::MOD_DU:
-    return insertDivByZeroTrap(MI, *BB, *Subtarget.getInstrInfo());
+    return insertDivByZeroTrap(MI, BB);
     break;
   }
 }
 
 const char *LoongArchTargetLowering::getTargetNodeName(unsigned Opcode) const {
   switch ((LoongArchISD::NodeType)Opcode) {
   case LoongArchISD::FIRST_NUMBER:
     break;

llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll

 ; LA64-NEXT:    div.d $a0, $a0, $a1
 ; LA64-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA32-TRAP-LABEL: sdiv_i8:
 ; LA32-TRAP:       # %bb.0: # %entry
 ; LA32-TRAP-NEXT:    ext.w.b $a1, $a1
 ; LA32-TRAP-NEXT:    ext.w.b $a0, $a0
 ; LA32-TRAP-NEXT:    div.w $a0, $a0, $a1
-; LA32-TRAP-NEXT:    bnez $a1, 8
+; LA32-TRAP-NEXT:    bnez $a1, .LBB1_2
+; LA32-TRAP-NEXT:  # %bb.1: # %entry
 ; LA32-TRAP-NEXT:    break 7
+; LA32-TRAP-NEXT:  .LBB1_2: # %entry
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: sdiv_i8:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    ext.w.b $a1, $a1
 ; LA64-TRAP-NEXT:    ext.w.b $a0, $a0
 ; LA64-TRAP-NEXT:    div.d $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB1_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB1_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = sdiv i8 %a, %b
   ret i8 %r
 }
 
 define i16 @sdiv_i16(i16 %a, i16 %b) {
 ; LA32-LABEL: sdiv_i16:

 ; LA64-NEXT:    div.d $a0, $a0, $a1
 ; LA64-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA32-TRAP-LABEL: sdiv_i16:
 ; LA32-TRAP:       # %bb.0: # %entry
 ; LA32-TRAP-NEXT:    ext.w.h $a1, $a1
 ; LA32-TRAP-NEXT:    ext.w.h $a0, $a0
 ; LA32-TRAP-NEXT:    div.w $a0, $a0, $a1
-; LA32-TRAP-NEXT:    bnez $a1, 8
+; LA32-TRAP-NEXT:    bnez $a1, .LBB2_2
+; LA32-TRAP-NEXT:  # %bb.1: # %entry
 ; LA32-TRAP-NEXT:    break 7
+; LA32-TRAP-NEXT:  .LBB2_2: # %entry
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: sdiv_i16:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    ext.w.h $a1, $a1
 ; LA64-TRAP-NEXT:    ext.w.h $a0, $a0
 ; LA64-TRAP-NEXT:    div.d $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB2_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB2_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = sdiv i16 %a, %b
   ret i16 %r
 }
 
 define i32 @sdiv_i32(i32 %a, i32 %b) {
 ; LA32-LABEL: sdiv_i32:
 ; LA32:       # %bb.0: # %entry
 ; LA32-NEXT:    div.w $a0, $a0, $a1
 ; LA32-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-LABEL: sdiv_i32:
 ; LA64:       # %bb.0: # %entry
 ; LA64-NEXT:    addi.w $a1, $a1, 0
 ; LA64-NEXT:    addi.w $a0, $a0, 0
 ; LA64-NEXT:    div.d $a0, $a0, $a1
 ; LA64-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA32-TRAP-LABEL: sdiv_i32:
 ; LA32-TRAP:       # %bb.0: # %entry
 ; LA32-TRAP-NEXT:    div.w $a0, $a0, $a1
-; LA32-TRAP-NEXT:    bnez $a1, 8
+; LA32-TRAP-NEXT:    bnez $a1, .LBB3_2
+; LA32-TRAP-NEXT:  # %bb.1: # %entry
 ; LA32-TRAP-NEXT:    break 7
+; LA32-TRAP-NEXT:  .LBB3_2: # %entry
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: sdiv_i32:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    addi.w $a1, $a1, 0
 ; LA64-TRAP-NEXT:    addi.w $a0, $a0, 0
 ; LA64-TRAP-NEXT:    div.d $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB3_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB3_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = sdiv i32 %a, %b
   ret i32 %r
 }
 
 define i64 @sdiv_i64(i64 %a, i64 %b) {
 ; LA32-LABEL: sdiv_i64:

 ; LA32-TRAP-NEXT:    bl __divdi3
 ; LA32-TRAP-NEXT:    ld.w $ra, $sp, 12 # 4-byte Folded Reload
 ; LA32-TRAP-NEXT:    addi.w $sp, $sp, 16
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: sdiv_i64:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    div.d $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB4_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB4_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = sdiv i64 %a, %b
   ret i64 %r
 }
 
 define i1 @udiv_i1(i1 %a, i1 %b) {
 ; LA32-LABEL: udiv_i1:

 ; LA64-NEXT:    div.du $a0, $a0, $a1
 ; LA64-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA32-TRAP-LABEL: udiv_i8:
 ; LA32-TRAP:       # %bb.0: # %entry
 ; LA32-TRAP-NEXT:    andi $a1, $a1, 255
 ; LA32-TRAP-NEXT:    andi $a0, $a0, 255
 ; LA32-TRAP-NEXT:    div.wu $a0, $a0, $a1
-; LA32-TRAP-NEXT:    bnez $a1, 8
+; LA32-TRAP-NEXT:    bnez $a1, .LBB6_2
+; LA32-TRAP-NEXT:  # %bb.1: # %entry
 ; LA32-TRAP-NEXT:    break 7
+; LA32-TRAP-NEXT:  .LBB6_2: # %entry
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: udiv_i8:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    andi $a1, $a1, 255
 ; LA64-TRAP-NEXT:    andi $a0, $a0, 255
 ; LA64-TRAP-NEXT:    div.du $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB6_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB6_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = udiv i8 %a, %b
   ret i8 %r
 }
 
 define i16 @udiv_i16(i16 %a, i16 %b) {
 ; LA32-LABEL: udiv_i16:

 ; LA64-NEXT:    div.du $a0, $a0, $a1
 ; LA64-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA32-TRAP-LABEL: udiv_i16:
 ; LA32-TRAP:       # %bb.0: # %entry
 ; LA32-TRAP-NEXT:    bstrpick.w $a1, $a1, 15, 0
 ; LA32-TRAP-NEXT:    bstrpick.w $a0, $a0, 15, 0
 ; LA32-TRAP-NEXT:    div.wu $a0, $a0, $a1
-; LA32-TRAP-NEXT:    bnez $a1, 8
+; LA32-TRAP-NEXT:    bnez $a1, .LBB7_2
+; LA32-TRAP-NEXT:  # %bb.1: # %entry
 ; LA32-TRAP-NEXT:    break 7
+; LA32-TRAP-NEXT:  .LBB7_2: # %entry
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: udiv_i16:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    bstrpick.d $a1, $a1, 15, 0
 ; LA64-TRAP-NEXT:    bstrpick.d $a0, $a0, 15, 0
 ; LA64-TRAP-NEXT:    div.du $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB7_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB7_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = udiv i16 %a, %b
   ret i16 %r
 }
 
 define i32 @udiv_i32(i32 %a, i32 %b) {
 ; LA32-LABEL: udiv_i32:
 ; LA32:       # %bb.0: # %entry
 ; LA32-NEXT:    div.wu $a0, $a0, $a1
 ; LA32-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-LABEL: udiv_i32:
 ; LA64:       # %bb.0: # %entry
 ; LA64-NEXT:    bstrpick.d $a1, $a1, 31, 0
 ; LA64-NEXT:    bstrpick.d $a0, $a0, 31, 0
 ; LA64-NEXT:    div.du $a0, $a0, $a1
 ; LA64-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA32-TRAP-LABEL: udiv_i32:
 ; LA32-TRAP:       # %bb.0: # %entry
 ; LA32-TRAP-NEXT:    div.wu $a0, $a0, $a1
-; LA32-TRAP-NEXT:    bnez $a1, 8
+; LA32-TRAP-NEXT:    bnez $a1, .LBB8_2
+; LA32-TRAP-NEXT:  # %bb.1: # %entry
 ; LA32-TRAP-NEXT:    break 7
+; LA32-TRAP-NEXT:  .LBB8_2: # %entry
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: udiv_i32:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    bstrpick.d $a1, $a1, 31, 0
 ; LA64-TRAP-NEXT:    bstrpick.d $a0, $a0, 31, 0
 ; LA64-TRAP-NEXT:    div.du $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB8_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB8_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = udiv i32 %a, %b
   ret i32 %r
 }
 
 define i64 @udiv_i64(i64 %a, i64 %b) {
 ; LA32-LABEL: udiv_i64:

 ; LA32-TRAP-NEXT:    bl __udivdi3
 ; LA32-TRAP-NEXT:    ld.w $ra, $sp, 12 # 4-byte Folded Reload
 ; LA32-TRAP-NEXT:    addi.w $sp, $sp, 16
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: udiv_i64:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    div.du $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB9_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB9_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = udiv i64 %a, %b
   ret i64 %r
 }
 
 define i1 @srem_i1(i1 %a, i1 %b) {
 ; LA32-LABEL: srem_i1:

 ; LA64-NEXT:    mod.d $a0, $a0, $a1
 ; LA64-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA32-TRAP-LABEL: srem_i8:
 ; LA32-TRAP:       # %bb.0: # %entry
 ; LA32-TRAP-NEXT:    ext.w.b $a1, $a1
 ; LA32-TRAP-NEXT:    ext.w.b $a0, $a0
 ; LA32-TRAP-NEXT:    mod.w $a0, $a0, $a1
-; LA32-TRAP-NEXT:    bnez $a1, 8
+; LA32-TRAP-NEXT:    bnez $a1, .LBB11_2
+; LA32-TRAP-NEXT:  # %bb.1: # %entry
 ; LA32-TRAP-NEXT:    break 7
+; LA32-TRAP-NEXT:  .LBB11_2: # %entry
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: srem_i8:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    ext.w.b $a1, $a1
 ; LA64-TRAP-NEXT:    ext.w.b $a0, $a0
 ; LA64-TRAP-NEXT:    mod.d $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB11_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB11_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = srem i8 %a, %b
   ret i8 %r
 }
 
 define i16 @srem_i16(i16 %a, i16 %b) {
 ; LA32-LABEL: srem_i16:

 ; LA64-NEXT:    mod.d $a0, $a0, $a1
 ; LA64-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA32-TRAP-LABEL: srem_i16:
 ; LA32-TRAP:       # %bb.0: # %entry
 ; LA32-TRAP-NEXT:    ext.w.h $a1, $a1
 ; LA32-TRAP-NEXT:    ext.w.h $a0, $a0
 ; LA32-TRAP-NEXT:    mod.w $a0, $a0, $a1
-; LA32-TRAP-NEXT:    bnez $a1, 8
+; LA32-TRAP-NEXT:    bnez $a1, .LBB12_2
+; LA32-TRAP-NEXT:  # %bb.1: # %entry
 ; LA32-TRAP-NEXT:    break 7
+; LA32-TRAP-NEXT:  .LBB12_2: # %entry
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: srem_i16:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    ext.w.h $a1, $a1
 ; LA64-TRAP-NEXT:    ext.w.h $a0, $a0
 ; LA64-TRAP-NEXT:    mod.d $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB12_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB12_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = srem i16 %a, %b
   ret i16 %r
 }
 
 define i32 @srem_i32(i32 %a, i32 %b) {
 ; LA32-LABEL: srem_i32:
 ; LA32:       # %bb.0: # %entry
 ; LA32-NEXT:    mod.w $a0, $a0, $a1
 ; LA32-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-LABEL: srem_i32:
 ; LA64:       # %bb.0: # %entry
 ; LA64-NEXT:    addi.w $a1, $a1, 0
 ; LA64-NEXT:    addi.w $a0, $a0, 0
 ; LA64-NEXT:    mod.d $a0, $a0, $a1
 ; LA64-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA32-TRAP-LABEL: srem_i32:
 ; LA32-TRAP:       # %bb.0: # %entry
 ; LA32-TRAP-NEXT:    mod.w $a0, $a0, $a1
-; LA32-TRAP-NEXT:    bnez $a1, 8
+; LA32-TRAP-NEXT:    bnez $a1, .LBB13_2
+; LA32-TRAP-NEXT:  # %bb.1: # %entry
 ; LA32-TRAP-NEXT:    break 7
+; LA32-TRAP-NEXT:  .LBB13_2: # %entry
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: srem_i32:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    addi.w $a1, $a1, 0
 ; LA64-TRAP-NEXT:    addi.w $a0, $a0, 0
 ; LA64-TRAP-NEXT:    mod.d $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB13_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB13_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = srem i32 %a, %b
   ret i32 %r
 }
 
 define i64 @srem_i64(i64 %a, i64 %b) {
 ; LA32-LABEL: srem_i64:

 ; LA32-TRAP-NEXT:    bl __moddi3
 ; LA32-TRAP-NEXT:    ld.w $ra, $sp, 12 # 4-byte Folded Reload
 ; LA32-TRAP-NEXT:    addi.w $sp, $sp, 16
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: srem_i64:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    mod.d $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB14_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB14_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = srem i64 %a, %b
   ret i64 %r
 }
 
 define i1 @urem_i1(i1 %a, i1 %b) {
 ; LA32-LABEL: urem_i1:

 ; LA64-NEXT:    mod.du $a0, $a0, $a1
 ; LA64-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA32-TRAP-LABEL: urem_i8:
 ; LA32-TRAP:       # %bb.0: # %entry
 ; LA32-TRAP-NEXT:    andi $a1, $a1, 255
 ; LA32-TRAP-NEXT:    andi $a0, $a0, 255
 ; LA32-TRAP-NEXT:    mod.wu $a0, $a0, $a1
-; LA32-TRAP-NEXT:    bnez $a1, 8
+; LA32-TRAP-NEXT:    bnez $a1, .LBB16_2
+; LA32-TRAP-NEXT:  # %bb.1: # %entry
 ; LA32-TRAP-NEXT:    break 7
+; LA32-TRAP-NEXT:  .LBB16_2: # %entry
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: urem_i8:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    andi $a1, $a1, 255
 ; LA64-TRAP-NEXT:    andi $a0, $a0, 255
 ; LA64-TRAP-NEXT:    mod.du $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB16_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB16_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = urem i8 %a, %b
   ret i8 %r
 }
 
 define i16 @urem_i16(i16 %a, i16 %b) {
 ; LA32-LABEL: urem_i16:

 ; LA64-NEXT:    mod.du $a0, $a0, $a1
 ; LA64-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA32-TRAP-LABEL: urem_i16:
 ; LA32-TRAP:       # %bb.0: # %entry
 ; LA32-TRAP-NEXT:    bstrpick.w $a1, $a1, 15, 0
 ; LA32-TRAP-NEXT:    bstrpick.w $a0, $a0, 15, 0
 ; LA32-TRAP-NEXT:    mod.wu $a0, $a0, $a1
-; LA32-TRAP-NEXT:    bnez $a1, 8
+; LA32-TRAP-NEXT:    bnez $a1, .LBB17_2
+; LA32-TRAP-NEXT:  # %bb.1: # %entry
 ; LA32-TRAP-NEXT:    break 7
+; LA32-TRAP-NEXT:  .LBB17_2: # %entry
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: urem_i16:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    bstrpick.d $a1, $a1, 15, 0
 ; LA64-TRAP-NEXT:    bstrpick.d $a0, $a0, 15, 0
 ; LA64-TRAP-NEXT:    mod.du $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB17_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB17_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = urem i16 %a, %b
   ret i16 %r
 }
 
 define i32 @urem_i32(i32 %a, i32 %b) {
 ; LA32-LABEL: urem_i32:
 ; LA32:       # %bb.0: # %entry
 ; LA32-NEXT:    mod.wu $a0, $a0, $a1
 ; LA32-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-LABEL: urem_i32:
 ; LA64:       # %bb.0: # %entry
 ; LA64-NEXT:    bstrpick.d $a1, $a1, 31, 0
 ; LA64-NEXT:    bstrpick.d $a0, $a0, 31, 0
 ; LA64-NEXT:    mod.du $a0, $a0, $a1
 ; LA64-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA32-TRAP-LABEL: urem_i32:
 ; LA32-TRAP:       # %bb.0: # %entry
 ; LA32-TRAP-NEXT:    mod.wu $a0, $a0, $a1
-; LA32-TRAP-NEXT:    bnez $a1, 8
+; LA32-TRAP-NEXT:    bnez $a1, .LBB18_2
+; LA32-TRAP-NEXT:  # %bb.1: # %entry
 ; LA32-TRAP-NEXT:    break 7
+; LA32-TRAP-NEXT:  .LBB18_2: # %entry
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: urem_i32:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    bstrpick.d $a1, $a1, 31, 0
 ; LA64-TRAP-NEXT:    bstrpick.d $a0, $a0, 31, 0
 ; LA64-TRAP-NEXT:    mod.du $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB18_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB18_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = urem i32 %a, %b
   ret i32 %r
 }
 
 define i64 @urem_i64(i64 %a, i64 %b) {
 ; LA32-LABEL: urem_i64:

 ; LA32-TRAP-NEXT:    bl __umoddi3
 ; LA32-TRAP-NEXT:    ld.w $ra, $sp, 12 # 4-byte Folded Reload
 ; LA32-TRAP-NEXT:    addi.w $sp, $sp, 16
 ; LA32-TRAP-NEXT:    jirl $zero, $ra, 0
 ;
 ; LA64-TRAP-LABEL: urem_i64:
 ; LA64-TRAP:       # %bb.0: # %entry
 ; LA64-TRAP-NEXT:    mod.du $a0, $a0, $a1
-; LA64-TRAP-NEXT:    bnez $a1, 8
+; LA64-TRAP-NEXT:    bnez $a1, .LBB19_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:    break 7
+; LA64-TRAP-NEXT:  .LBB19_2: # %entry
 ; LA64-TRAP-NEXT:    jirl $zero, $ra, 0
 entry:
   %r = urem i64 %a, %b
   ret i64 %r
 }