[X86] Emit .cfi_restore after popping callee-saved-registers if no red zone

[silee]

Summary

We discovered the bug
If the function has no red zone, cfi of the popped callee-saved-registers should be invalidated with .cfi_restore instruction.
This commit will emit .cfi_restore instruction after popping callee-saved-registers if no red zone.

[silee]

ping

[thegameg]

Can you please add a test?

[silee]

I am going to add test.
This bug should be fixed?
If so, I will do that.
And, it would be okay if I add a simple test?

llvm/lib/Target/X86/X86FrameLowering.cpp

return Opc == X86::TCRETURNri || Opc == X86::TCRETURNdi ||
         Opc == X86::TCRETURNmi ||
         Opc == X86::TCRETURNri64 || Opc == X86::TCRETURNdi64 ||
         Opc == X86::TCRETURNmi64;
 }
 
 void X86FrameLowering::emitEpilogue(MachineFunction &MF,
                                     MachineBasicBlock &MBB) const {
   const MachineFrameInfo &MFI = MF.getFrameInfo();
+  MachineModuleInfo &MMI = MF.getMMI();
+  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
+  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
   X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
   MachineBasicBlock::iterator Terminator = MBB.getFirstTerminator();
   MachineBasicBlock::iterator MBBI = Terminator;
   DebugLoc DL;
   if (MBBI != MBB.end())
     DL = MBBI->getDebugLoc();
   // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
   const bool Is64BitILP32 = STI.isTarget64BitILP32();
void X86FrameLowering::emitEpilogue(MachineFunction &MF,
   // either in prologue or in epilogue.  This behavior causes a problem when a
   // call immediately precedes an epilogue, because the return address points
   // into the epilogue.  To cope with that, we insert an epilogue marker here,
   // then replace it with a 'nop' if it ends up immediately after a CALL in the
   // final emitted code.
   if (NeedsWin64CFI && MF.hasWinCFI())
     BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue));
 
-  if (!HasFP && NeedsDwarfCFI) {
+  if (NeedsDwarfCFI) {
     MBBI = FirstCSPop;
     int64_t Offset = -CSSize - SlotSize;
     // Mark callee-saved pop instruction.
     // Define the current CFA rule to use the provided offset.
     while (MBBI != MBB.end()) {
       MachineBasicBlock::iterator PI = MBBI;
       unsigned Opc = PI->getOpcode();
       ++MBBI;
-      if (Opc == X86::POP32r || Opc == X86::POP64r) {
+      if (Opc == X86::POP32r || Opc == X86::POP64r)
+        continue;
+      if (!has128ByteRedZone(MF)) {
+        Register Reg = PI->getOperand(0).getReg();
+        // Check if the poped register is callee-saved register.
+        if (std::find_if(CSI.begin(), CSI.end(),
+                         [&Reg](const CalleeSavedInfo &I) -> bool {
+                           return Reg == I.getReg();
+                         }) != CSI.end()) {
+          unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
+          BuildCFI(MBB, MBBI, DL,
+                   MCCFIInstruction::createRestore(nullptr, DwarfReg),
+                   MachineInstr::FrameDestroy);
+        }
+      }
+      if (!HasFP) {
         Offset += SlotSize;
         BuildCFI(MBB, MBBI, DL,
                  MCCFIInstruction::cfiDefCfaOffset(nullptr, -Offset),
                  MachineInstr::FrameDestroy);
       }
     }
   }