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Differential D126369

[LLVM] Add rcp.approx.ftz.f32 intrinsic
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Authored by csigg on May 25 2022, 4:42 AM.

Details

Reviewers
tra
Commits
rGc4bc416418a2: [LLVM] Add rcp.approx.ftz.f32 intrinsic
Summary

Split out from https://reviews.llvm.org/D126158.

Diff Detail

Event Timeline

csigg created this revision.May 25 2022, 4:42 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 25 2022, 4:42 AM
Herald added subscribers: mattd, gchakrabarti, asavonic and 2 others. · View Herald Transcript
csigg requested review of this revision.May 25 2022, 4:42 AM
Herald added projects: Restricted Project, Restricted Project. · View Herald TranscriptMay 25 2022, 4:42 AM
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csigg mentioned this in D126158: [MLIR][GPU] Replace fdiv on fp16 with promoted (fp32) multiplication with reciprocal plus one (conditional) Newton iteration..May 25 2022, 4:42 AM
Harbormaster completed remote builds in B166239: Diff 431941.May 25 2022, 5:24 AM
tra accepted this revision.May 25 2022, 10:32 AM

LGTM. Do you need me to land it?

This revision is now accepted and ready to land.May 25 2022, 10:32 AM
csigg added a comment.May 25 2022, 12:03 PM

Thanks Artem. I think I should be able to land it myself.

This revision was landed with ongoing or failed builds.May 25 2022, 12:05 PM
Closed by commit rGc4bc416418a2: [LLVM] Add rcp.approx.ftz.f32 intrinsic (authored by csigg). · Explain Why
This revision was automatically updated to reflect the committed changes.
csigg added a commit: rGc4bc416418a2: [LLVM] Add rcp.approx.ftz.f32 intrinsic.

Revision Contents

PathSize
clang/
include/
clang/
Basic/
2 lines
llvm/
include/
llvm/
IR/
2 lines
lib/
Target/
NVPTX/
2 lines

Diff 432073

clang/include/clang/Basic/BuiltinsNVPTX.def

Show First 20 Lines • Show All 337 Lines • ▼ Show 20 Lines
BUILTIN(__nvvm_rcp_rm_f, "ff", "") BUILTIN(__nvvm_rcp_rm_f, "ff", "")
BUILTIN(__nvvm_rcp_rp_ftz_f, "ff", "") BUILTIN(__nvvm_rcp_rp_ftz_f, "ff", "")
BUILTIN(__nvvm_rcp_rp_f, "ff", "") BUILTIN(__nvvm_rcp_rp_f, "ff", "")
BUILTIN(__nvvm_rcp_rn_d, "dd", "") BUILTIN(__nvvm_rcp_rn_d, "dd", "")
BUILTIN(__nvvm_rcp_rz_d, "dd", "") BUILTIN(__nvvm_rcp_rz_d, "dd", "")
BUILTIN(__nvvm_rcp_rm_d, "dd", "") BUILTIN(__nvvm_rcp_rm_d, "dd", "")
BUILTIN(__nvvm_rcp_rp_d, "dd", "") BUILTIN(__nvvm_rcp_rp_d, "dd", "")
BUILTIN(__nvvm_rcp_approx_ftz_f, "ff", "")
BUILTIN(__nvvm_rcp_approx_ftz_d, "dd", "") BUILTIN(__nvvm_rcp_approx_ftz_d, "dd", "")
// Sqrt // Sqrt
BUILTIN(__nvvm_sqrt_rn_ftz_f, "ff", "") BUILTIN(__nvvm_sqrt_rn_ftz_f, "ff", "")
BUILTIN(__nvvm_sqrt_rn_f, "ff", "") BUILTIN(__nvvm_sqrt_rn_f, "ff", "")
BUILTIN(__nvvm_sqrt_rz_ftz_f, "ff", "") BUILTIN(__nvvm_sqrt_rz_ftz_f, "ff", "")
BUILTIN(__nvvm_sqrt_rz_f, "ff", "") BUILTIN(__nvvm_sqrt_rz_f, "ff", "")
▲ Show 20 Lines • Show All 603 Lines • Show Last 20 Lines

llvm/include/llvm/IR/IntrinsicsNVVM.td

Show First 20 Lines • Show All 927 Lines • ▼ Show 20 Lines def int_nvvm_rcp_rn_d : GCCBuiltin<"__nvvm_rcp_rn_d">,
DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>; DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
def int_nvvm_rcp_rz_d : GCCBuiltin<"__nvvm_rcp_rz_d">, def int_nvvm_rcp_rz_d : GCCBuiltin<"__nvvm_rcp_rz_d">,
DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>; DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
def int_nvvm_rcp_rm_d : GCCBuiltin<"__nvvm_rcp_rm_d">, def int_nvvm_rcp_rm_d : GCCBuiltin<"__nvvm_rcp_rm_d">,
DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>; DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
def int_nvvm_rcp_rp_d : GCCBuiltin<"__nvvm_rcp_rp_d">, def int_nvvm_rcp_rp_d : GCCBuiltin<"__nvvm_rcp_rp_d">,
DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>; DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
def int_nvvm_rcp_approx_ftz_f : GCCBuiltin<"__nvvm_rcp_approx_ftz_f">,
DefaultAttrsIntrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>;
def int_nvvm_rcp_approx_ftz_d : GCCBuiltin<"__nvvm_rcp_approx_ftz_d">, def int_nvvm_rcp_approx_ftz_d : GCCBuiltin<"__nvvm_rcp_approx_ftz_d">,
DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>; DefaultAttrsIntrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
// //
// Sqrt // Sqrt
// //
def int_nvvm_sqrt_f : GCCBuiltin<"__nvvm_sqrt_f">, def int_nvvm_sqrt_f : GCCBuiltin<"__nvvm_sqrt_f">,
▲ Show 20 Lines • Show All 3,724 Lines • Show Last 20 Lines

llvm/lib/Target/NVPTX/NVPTXIntrinsics.td

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 1,028 Lines • ▼ Show 20 Linesdef INT_NVVM_RCP_RN_D : F_MATH_1<"rcp.rn.f64 \t$dst, $src0;", Float64Regs,
Float64Regs, int_nvvm_rcp_rn_d>; Float64Regs, int_nvvm_rcp_rn_d>;
def INT_NVVM_RCP_RZ_D : F_MATH_1<"rcp.rz.f64 \t$dst, $src0;", Float64Regs, def INT_NVVM_RCP_RZ_D : F_MATH_1<"rcp.rz.f64 \t$dst, $src0;", Float64Regs,
Float64Regs, int_nvvm_rcp_rz_d>; Float64Regs, int_nvvm_rcp_rz_d>;
def INT_NVVM_RCP_RM_D : F_MATH_1<"rcp.rm.f64 \t$dst, $src0;", Float64Regs, def INT_NVVM_RCP_RM_D : F_MATH_1<"rcp.rm.f64 \t$dst, $src0;", Float64Regs,
Float64Regs, int_nvvm_rcp_rm_d>; Float64Regs, int_nvvm_rcp_rm_d>;
def INT_NVVM_RCP_RP_D : F_MATH_1<"rcp.rp.f64 \t$dst, $src0;", Float64Regs, def INT_NVVM_RCP_RP_D : F_MATH_1<"rcp.rp.f64 \t$dst, $src0;", Float64Regs,
Float64Regs, int_nvvm_rcp_rp_d>; Float64Regs, int_nvvm_rcp_rp_d>;
def INT_NVVM_RCP_APPROX_FTZ_F : F_MATH_1<"rcp.approx.ftz.f32 \t$dst, $src0;",
Float32Regs, Float32Regs, int_nvvm_rcp_approx_ftz_f>;
def INT_NVVM_RCP_APPROX_FTZ_D : F_MATH_1<"rcp.approx.ftz.f64 \t$dst, $src0;", def INT_NVVM_RCP_APPROX_FTZ_D : F_MATH_1<"rcp.approx.ftz.f64 \t$dst, $src0;",
Float64Regs, Float64Regs, int_nvvm_rcp_approx_ftz_d>; Float64Regs, Float64Regs, int_nvvm_rcp_approx_ftz_d>;
// //
// Sqrt // Sqrt
// //
def INT_NVVM_SQRT_RN_FTZ_F : F_MATH_1<"sqrt.rn.ftz.f32 \t$dst, $src0;", def INT_NVVM_SQRT_RN_FTZ_F : F_MATH_1<"sqrt.rn.ftz.f32 \t$dst, $src0;",
▲ Show 20 Lines • Show All 5,650 Lines • Show Last 20 Lines