[ARM] Add register-mask for tail returns

[dmgreen]

Summary

The TC_RETURN/TCRETURNdi under Arm does not currently add the register-mask operand when tail folding, which leads to the register (like LR) not being 'used' by the return. This changes the code to unconditionally set the register mask on the call, as opposed to skipping it for tail calls.

I don't believe this will currently alter any codegen, but should glue things together better post-frame lowering. It matches the AArch64 code better, but I don't know this code very well.

[efriedma]

Seems to match what other targets do, so I guess it's fine. Not sure what you're planning on doing with this, though...

[dmgreen]

In D125906#3523225, @efriedma wrote:

Seems to match what other targets do, so I guess it's fine. Not sure what you're planning on doing with this, though...

Thanks - It was part of looking at all the failures from always using TII.isCopyInstr in D125335. There were a lot changes in the Arm tests that look like they are removing mov's that it shouldn't. This fixes some of them, but there were quite a few others.

llvm/lib/Target/ARM/ARMISelLowering.cpp

ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
 
   // Add argument registers to the end of the list so that they are known live
   // into the call.
   for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
     Ops.push_back(DAG.getRegister(RegsToPass[i].first,
                                   RegsToPass[i].second.getValueType()));
 
   // Add a register mask operand representing the call-preserved registers.
-  if (!isTailCall) {
-    const uint32_t *Mask;
-    const ARMBaseRegisterInfo *ARI = Subtarget->getRegisterInfo();
-    if (isThisReturn) {
-      // For 'this' returns, use the R0-preserving mask if applicable
-      Mask = ARI->getThisReturnPreservedMask(MF, CallConv);
-      if (!Mask) {
-        // Set isThisReturn to false if the calling convention is not one that
-        // allows 'returned' to be modeled in this way, so LowerCallResult does
-        // not try to pass 'this' straight through
-        isThisReturn = false;
-        Mask = ARI->getCallPreservedMask(MF, CallConv);
-      }
-    } else
-      Mask = ARI->getCallPreservedMask(MF, CallConv);
 
-    assert(Mask && "Missing call preserved mask for calling convention");
-    Ops.push_back(DAG.getRegisterMask(Mask));
-  }
 
   if (InFlag.getNode())
     Ops.push_back(InFlag);
 
   SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
   if (isTailCall) {
     MF.getFrameInfo().setHasTailCall();
     SDValue Ret = DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, Ops);

llvm/test/CodeGen/ARM/dbg-tcreturn.ll

 ; RUN: llc %s -o - -stop-after=finalize-isel -verify-machineinstrs | FileCheck %s
 
 target datalayout = "e-m:o-p:32:32-Fi8-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
 target triple = "thumbv7-apple-ios7.0.0"
 
 ; CHECK-LABEL: name: test
 ; CHECK:       body:
 ; CHECK-NEXT:   bb.0.entry:
 ; CHECK-NEXT:     liveins: $r0, $r1
 ; CHECK:          %1:gpr = COPY $r1
 ; CHECK-NEXT:     %0:gpr = COPY $r0
 ; CHECK-NEXT:     $r0 = COPY %0
 ; CHECK-NEXT:     $r1 = COPY %1
 ; CHECK-NEXT:     DBG_VALUE $noreg, $noreg, !13, !DIExpression(), debug-location !16
-; CHECK-NEXT:     TCRETURNdi &__divsi3, 0, implicit $sp, implicit $r0, implicit $r1
+; CHECK-NEXT:     TCRETURNdi &__divsi3, 0, csr_ios, implicit $sp, implicit $r0, implicit $r1
 
 define i32 @test(i32 %a1, i32 %a2) !dbg !5 {
 entry:
   %res = sdiv i32 %a1, %a2
   call void @llvm.dbg.value(metadata i32 %res, metadata !13, metadata !DIExpression()), !dbg !16
   ret i32 %res
 }
 

llvm/test/DebugInfo/ARM/instr-ref-tcreturn.ll

 
 ; CHECK-LABEL:  bb.2.entry:
 ; CHECK:        tBL {{.*}} &__stack_chk_fail,
 
 ; CHECK-LABEL:  bb.1.entry:
 ; CHECK:          $r0 = COPY %0
 ; CHECK-NEXT:     $r1 = COPY %1
 ; CHECK-NEXT:     DBG_INSTR_REF 1, 0
-; CHECK-NEXT:     TCRETURNdi &__divsi3, 0, implicit $sp, implicit $r0, implicit $r1
+; CHECK-NEXT:     TCRETURNdi &__divsi3, 0, csr_ios, implicit $sp, implicit $r0, implicit $r1
 
 declare i1 @ext()
 
 define i32 @test(i32 %a1, i32 %a2) #1 !dbg !5 {
 entry:
   %foo = alloca i32, i32 %a1
   %bool = call i1 @ext()
   %res = sdiv i32 %a1, %a2