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[ARM] Add register-mask for tail returns
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Authored by dmgreen on May 18 2022, 9:56 AM.

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Summary

The TC_RETURN/TCRETURNdi under Arm does not currently add the register-mask operand when tail folding, which leads to the register (like LR) not being 'used' by the return. This changes the code to unconditionally set the register mask on the call, as opposed to skipping it for tail calls.

I don't believe this will currently alter any codegen, but should glue things together better post-frame lowering. It matches the AArch64 code better, but I don't know this code very well.

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dmgreen created this revision.May 18 2022, 9:56 AM
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dmgreen requested review of this revision.May 18 2022, 9:56 AM
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efriedma accepted this revision.May 18 2022, 11:59 AM

Seems to match what other targets do, so I guess it's fine. Not sure what you're planning on doing with this, though...

This revision is now accepted and ready to land.May 18 2022, 11:59 AM

Seems to match what other targets do, so I guess it's fine. Not sure what you're planning on doing with this, though...

Thanks - It was part of looking at all the failures from always using TII.isCopyInstr in D125335. There were a lot changes in the Arm tests that look like they are removing mov's that it shouldn't. This fixes some of them, but there were quite a few others.

This revision was landed with ongoing or failed builds.May 21 2022, 7:28 AM
This revision was automatically updated to reflect the committed changes.