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Differential D125544

[lld][ELF] Support BFD name elf32-avr
ClosedPublic

Authored by benshi001 on May 13 2022, 6:43 AM.

Details

Reviewers
MaskRay
Commits
rG8527f32f0a16: [lld][ELF] Support BFD name elf32-avr

Diff Detail

Event Timeline

benshi001 created this revision.May 13 2022, 6:43 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 13 2022, 6:43 AM
Herald added subscribers: StephenFan, Jim, arichardson and 2 others. · View Herald Transcript
benshi001 requested review of this revision.May 13 2022, 6:43 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 13 2022, 6:43 AM
Herald added subscribers: llvm-commits, jacquesguan. · View Herald Transcript
benshi001 added inline comments.May 13 2022, 6:44 AM
lld/test/ELF/linkerscript/avr5.test
16

This two disassembled lines corresponds to

	sts   abc+1, r25
	sts   abc, r24

in the original assmebly source.

We can see that the address of variable abc is 100, which is correct.

benshi001 added inline comments.May 13 2022, 6:46 AM
lld/test/ELF/linkerscript/avr5.test
12

I expect to check both section addresses and variable addresses.

benshi001 added inline comments.May 13 2022, 6:47 AM
lld/test/ELF/linkerscript/avr5.test
25

AVR is harward CPU, it is common that program memory and data memory are isolated to two different regions.

Harbormaster completed remote builds in B164302: Diff 429226.May 13 2022, 7:00 AM
MaskRay added inline comments.May 13 2022, 11:13 PM
lld/ELF/ScriptParser.cpp
440

move this after EM_386

lld/test/ELF/linkerscript/Inputs/avr5.s
5 ↗(On Diff #429226)

These instructions are not meaningful to ld. One single rjmp _start is sufficient testing a relocation.

lld/test/ELF/linkerscript/avr5.test
3

Use split-file

25

Is it common to start at zero address?

benshi001 updated this revision to Diff 429449.May 14 2022, 7:20 AM
benshi001 marked an inline comment as done.
benshi001 marked 2 inline comments as done.May 14 2022, 7:27 AM
benshi001 added inline comments.
lld/test/ELF/linkerscript/Inputs/avr5.s
5 ↗(On Diff #429226)

Unfortunately rjmp can not be decoded correctly by llvm-objdump, due to bugs in AVR Disassembler (But GNU's avr-bjdump can). Currently I have to use LDI, which load an int8 immediate to a register.

lld/test/ELF/linkerscript/avr5.test
25

Yes. Most devices reset to PC = 0.

benshi001 marked an inline comment as done.May 14 2022, 7:28 AM
benshi001 marked an inline comment as done.
benshi001 added inline comments.
lld/test/ELF/linkerscript/avr5.test
3

Done. Splited to two .test files.

benshi001 marked an inline comment as done.May 14 2022, 7:30 AM
Harbormaster completed remote builds in B164451: Diff 429449.May 14 2022, 7:31 AM
benshi001 added inline comments.May 14 2022, 7:34 AM
lld/test/ELF/linkerscript/avr5-relocs.test
8 ↗(On Diff #429449)

VMA of variable def is 0x802, so 2 => r24 and 8 => r25.

benshi001 updated this revision to Diff 429461.May 14 2022, 8:22 AM
Harbormaster completed remote builds in B164455: Diff 429461.May 14 2022, 8:33 AM
MaskRay added inline comments.May 14 2022, 5:12 PM
lld/test/ELF/linkerscript/avr5-relocs.test
11 ↗(On Diff #429461)
lld/test/ELF/linkerscript/avr5-sections.test
1 ↗(On Diff #429461)

The tests should be merged into one.

Add a file-level comment explaining the purpose.

Use split-file to avoid Inputs/* files.

benshi001 updated this revision to Diff 429499.May 14 2022, 5:51 PM
Harbormaster completed remote builds in B164481: Diff 429499.May 14 2022, 6:02 PM
benshi001 marked an inline comment as done.May 14 2022, 6:03 PM
benshi001 added inline comments.
lld/test/ELF/linkerscript/avr5-sections.test
1 ↗(On Diff #429461)

I am not familiar with that.

do you mean:

  1. make a unique .s file with assembly
  2. echo to a temp linker script
  3. do all checks ?
MaskRay added inline comments.May 14 2022, 6:05 PM
lld/test/ELF/linkerscript/avr5-sections.test
1 ↗(On Diff #429461)

rg split-file in this directory and see I use split-file.

benshi001 updated this revision to Diff 429501.May 14 2022, 6:50 PM
benshi001 marked 2 inline comments as done.
benshi001 added inline comments.
lld/test/ELF/linkerscript/avr5-sections.test
1 ↗(On Diff #429461)

A file level comment is added.

1 ↗(On Diff #429461)

I have combined all files into avr5.test with split-file.

benshi001 marked an inline comment as done.May 14 2022, 6:52 PM
Harbormaster completed remote builds in B164482: Diff 429501.May 14 2022, 7:02 PM
benshi001 updated this revision to Diff 429502.May 14 2022, 7:10 PM
benshi001 added inline comments.
lld/test/ELF/linkerscript/avr5-relocs.test
11 ↗(On Diff #429461)

I have added a check line for that OUTPUT_ARCH(avr:5) input:

# HEAD: 0x5, EF_AVR_ARCH_AVR5
Harbormaster completed remote builds in B164483: Diff 429502.May 14 2022, 7:20 PM
MaskRay accepted this revision.May 17 2022, 11:13 AM
MaskRay added inline comments.
lld/test/ELF/linkerscript/avr5.test
4
This revision is now accepted and ready to land.May 17 2022, 11:13 AM
MaskRay retitled this revision from [lld][ELF] Support linking 'elf32-avr' with linker scripts to [lld][ELF] Support elf32-avr BFD name.May 17 2022, 11:14 AM
MaskRay retitled this revision from [lld][ELF] Support elf32-avr BFD name to [lld][ELF] Support BFD name elf32-avr.
Closed by commit rG8527f32f0a16: [lld][ELF] Support BFD name elf32-avr (authored by benshi001). · Explain WhyMay 17 2022, 5:00 PM
This revision was automatically updated to reflect the committed changes.
benshi001 added a commit: rG8527f32f0a16: [lld][ELF] Support BFD name elf32-avr.

Revision Contents

PathSize
lld/
ELF/
1 line
test/
ELF/
linkerscript/
52 lines

Diff 430209

lld/ELF/ScriptParser.cpp

Show First 20 Lines • Show All 409 Lines • ▼ Show 20 Linesvoid ScriptParser::readOutputArch() {
expect("("); expect("(");
while (!errorCount() && !consume(")")) while (!errorCount() && !consume(")"))
skip(); skip();
} }
static std::pair<ELFKind, uint16_t> parseBfdName(StringRef s) { static std::pair<ELFKind, uint16_t> parseBfdName(StringRef s) {
return StringSwitch<std::pair<ELFKind, uint16_t>>(s) return StringSwitch<std::pair<ELFKind, uint16_t>>(s)
.Case("elf32-i386", {ELF32LEKind, EM_386}) .Case("elf32-i386", {ELF32LEKind, EM_386})
.Case("elf32-avr", {ELF32LEKind, EM_AVR})
.Case("elf32-iamcu", {ELF32LEKind, EM_IAMCU}) .Case("elf32-iamcu", {ELF32LEKind, EM_IAMCU})
.Case("elf32-littlearm", {ELF32LEKind, EM_ARM}) .Case("elf32-littlearm", {ELF32LEKind, EM_ARM})
.Case("elf32-x86-64", {ELF32LEKind, EM_X86_64}) .Case("elf32-x86-64", {ELF32LEKind, EM_X86_64})
.Case("elf64-aarch64", {ELF64LEKind, EM_AARCH64}) .Case("elf64-aarch64", {ELF64LEKind, EM_AARCH64})
.Case("elf64-littleaarch64", {ELF64LEKind, EM_AARCH64}) .Case("elf64-littleaarch64", {ELF64LEKind, EM_AARCH64})
.Case("elf64-bigaarch64", {ELF64BEKind, EM_AARCH64}) .Case("elf64-bigaarch64", {ELF64BEKind, EM_AARCH64})
.Case("elf32-powerpc", {ELF32BEKind, EM_PPC}) .Case("elf32-powerpc", {ELF32BEKind, EM_PPC})
.Case("elf32-powerpcle", {ELF32LEKind, EM_PPC}) .Case("elf32-powerpcle", {ELF32LEKind, EM_PPC})
.Case("elf64-powerpc", {ELF64BEKind, EM_PPC64}) .Case("elf64-powerpc", {ELF64BEKind, EM_PPC64})
.Case("elf64-powerpcle", {ELF64LEKind, EM_PPC64}) .Case("elf64-powerpcle", {ELF64LEKind, EM_PPC64})
.Case("elf64-x86-64", {ELF64LEKind, EM_X86_64}) .Case("elf64-x86-64", {ELF64LEKind, EM_X86_64})
.Cases("elf32-tradbigmips", "elf32-bigmips", {ELF32BEKind, EM_MIPS}) .Cases("elf32-tradbigmips", "elf32-bigmips", {ELF32BEKind, EM_MIPS})
.Case("elf32-ntradbigmips", {ELF32BEKind, EM_MIPS}) .Case("elf32-ntradbigmips", {ELF32BEKind, EM_MIPS})
.Case("elf32-tradlittlemips", {ELF32LEKind, EM_MIPS}) .Case("elf32-tradlittlemips", {ELF32LEKind, EM_MIPS})
.Case("elf32-ntradlittlemips", {ELF32LEKind, EM_MIPS}) .Case("elf32-ntradlittlemips", {ELF32LEKind, EM_MIPS})
.Case("elf64-tradbigmips", {ELF64BEKind, EM_MIPS}) .Case("elf64-tradbigmips", {ELF64BEKind, EM_MIPS})
.Case("elf64-tradlittlemips", {ELF64LEKind, EM_MIPS}) .Case("elf64-tradlittlemips", {ELF64LEKind, EM_MIPS})
.Case("elf32-littleriscv", {ELF32LEKind, EM_RISCV}) .Case("elf32-littleriscv", {ELF32LEKind, EM_RISCV})
.Case("elf64-littleriscv", {ELF64LEKind, EM_RISCV}) .Case("elf64-littleriscv", {ELF64LEKind, EM_RISCV})
.Case("elf64-sparc", {ELF64BEKind, EM_SPARCV9}) .Case("elf64-sparc", {ELF64BEKind, EM_SPARCV9})
.Case("elf32-msp430", {ELF32LEKind, EM_MSP430}) .Case("elf32-msp430", {ELF32LEKind, EM_MSP430})
.Default({ELFNoneKind, EM_NONE}); .Default({ELFNoneKind, EM_NONE});
MaskRayUnsubmitted
Done
ReplyInline Actions

move this after EM_386

MaskRay: move this after EM_386
} }
// Parse OUTPUT_FORMAT(bfdname) or OUTPUT_FORMAT(default, big, little). Choose // Parse OUTPUT_FORMAT(bfdname) or OUTPUT_FORMAT(default, big, little). Choose
// big if -EB is specified, little if -EL is specified, or default if neither is // big if -EB is specified, little if -EL is specified, or default if neither is
// specified. // specified.
void ScriptParser::readOutputFormat() { void ScriptParser::readOutputFormat() {
expect("("); expect("(");
▲ Show 20 Lines • Show All 1,291 Lines • Show Last 20 Lines

lld/test/ELF/linkerscript/avr5.test

  • This file was added.
# REQUIRES: avr
## Test ld.lld supports OUTPUT_FORMAT/OUTPUT_ARCH for AVR output.
MaskRayUnsubmitted
Done
ReplyInline Actions

Use split-file

MaskRay: Use split-file
benshi001AuthorUnsubmitted
Done
ReplyInline Actions

Done. Splited to two .test files.

benshi001: Done. Splited to two .test files.
MaskRayUnsubmitted
Not Done
ReplyInline Actions
# REQUIRES: avr
- # Test ld.lld can link avr obj files to an executble with a linker script.
+ ## Test ld.lld supports OUTPUT_FORMAT/OUTPUT_ARCH for AVR output.
# RUN: split-file %s %t
MaskRay:
# RUN: split-file %s %t
# RUN: llvm-mc -filetype=obj -triple=avr -mcpu=atmega328 %t/avr5.s -o %t/avr5.o
# RUN: ld.lld %t/avr5.o -T %t/avr5.lds -o %t/avr5a.out
# RUN: llvm-objdump --mcpu=atmega328 -d %t/avr5a.out | FileCheck %s --check-prefix=RELOC
# RUN: ld.lld %t/avr5.o -Ttext=0 -Tdata=0x800 -e _start -o %t/avr5b.out
# RUN: llvm-objdump --mcpu=atmega328 -d %t/avr5b.out | FileCheck %s --check-prefix=RELOC
# RELOC: ldi r24, 2
benshi001AuthorUnsubmitted
Done
ReplyInline Actions

I expect to check both section addresses and variable addresses.

benshi001: I expect to check both section addresses and variable addresses.
# RELOC-NEXT: ldi r25, 8
# RUN: llvm-readelf --headers %t/avr5a.out | FileCheck %s --check-prefix=HEAD
# RUN: llvm-readelf --headers %t/avr5b.out | FileCheck %s --check-prefix=HEAD
benshi001AuthorUnsubmitted
Done
ReplyInline Actions

This two disassembled lines corresponds to

	sts   abc+1, r25
	sts   abc, r24

in the original assmebly source.

We can see that the address of variable abc is 100, which is correct.

benshi001: This two disassembled lines corresponds to ``` sts abc+1, r25 sts abc, r24 ``` in the…
# HEAD: Atmel AVR 8-bit microcontroller
# HEAD: 0x5, EF_AVR_ARCH_AVR5
# HEAD: Name Type Address Off Size
# HEAD-NEXT: NULL 00000000 000000 000000
# HEAD-NEXT: .text PROGBITS 00000000 001000 000006
# HEAD-NEXT: .data PROGBITS 00000800 001800 000004
benshi001AuthorUnsubmitted
Done
ReplyInline Actions

AVR is harward CPU, it is common that program memory and data memory are isolated to two different regions.

benshi001: `AVR` is harward CPU, it is common that program memory and data memory are isolated to two…
MaskRayUnsubmitted
Done
ReplyInline Actions

Is it common to start at zero address?

MaskRay: Is it common to start at zero address?
benshi001AuthorUnsubmitted
Done
ReplyInline Actions

Yes. Most devices reset to PC = 0.

benshi001: Yes. Most devices reset to `PC = 0`.
#--- avr5.s
.text
.globl _start
.p2align 1
_start:
ldi r24, lo8(def) ; Load lower byte of variable def 16-bit address to r24
ldi r25, hi8(def) ; Load higher byte of variable def 16-bit address to r25
rjmp _start
.section .data
.type abc, @object
.type def, @object
.globl abc
.globl def
abc:
.short 100
def:
.short 200
#--- avr5.lds
OUTPUT_FORMAT("elf32-avr", "elf32-avr", "elf32-avr")
OUTPUT_ARCH(avr:5)
ENTRY(_start)
SECTIONS {
.text 0x000: { *(.text*) }
.data 0x800: { *(.data*) }
}