[lld][ELF] Support BFD name elf32-avr

[benshi001]

lld/test/ELF/linkerscript/avr5.test

15 ↗

(On Diff #429226)

This two disassembled lines corresponds to

	sts   abc+1, r25
	sts   abc, r24

in the original assmebly source.

We can see that the address of variable abc is 100, which is correct.

[benshi001]

lld/test/ELF/linkerscript/avr5.test

11 ↗

(On Diff #429226)

I expect to check both section addresses and variable addresses.

[benshi001]

lld/test/ELF/linkerscript/avr5.test

24 ↗

(On Diff #429226)

AVR is harward CPU, it is common that program memory and data memory are isolated to two different regions.

[MaskRay]

lld/ELF/ScriptParser.cpp

440

move this after EM_386

lld/test/ELF/linkerscript/Inputs/avr5.s

6

These instructions are not meaningful to ld. One single rjmp _start is sufficient testing a relocation.

lld/test/ELF/linkerscript/avr5.test

2 ↗

(On Diff #429226)

Use split-file

24 ↗

(On Diff #429226)

Is it common to start at zero address?

[benshi001]

lld/test/ELF/linkerscript/Inputs/avr5.s

6

Unfortunately rjmp can not be decoded correctly by llvm-objdump, due to bugs in AVR Disassembler (But GNU's avr-bjdump can). Currently I have to use LDI, which load an int8 immediate to a register.

lld/test/ELF/linkerscript/avr5.test

24 ↗

(On Diff #429226)

Yes. Most devices reset to PC = 0.

[benshi001]

lld/test/ELF/linkerscript/avr5.test

2 ↗

(On Diff #429226)

Done. Splited to two .test files.

[benshi001]

lld/test/ELF/linkerscript/avr5-relocs.test

9

VMA of variable def is 0x802, so 2 => r24 and 8 => r25.

[MaskRay]

lld/test/ELF/linkerscript/avr5-relocs.test

12

lld/test/ELF/linkerscript/avr5-sections.test

2

The tests should be merged into one.

Add a file-level comment explaining the purpose.

Use split-file to avoid Inputs/* files.

[benshi001]

lld/test/ELF/linkerscript/avr5-sections.test

2

I am not familiar with that.

do you mean:

1. make a unique .s file with assembly
2. echo to a temp linker script
3. do all checks ?

[MaskRay]

lld/test/ELF/linkerscript/avr5-sections.test

2

rg split-file in this directory and see I use split-file.

[benshi001]

lld/test/ELF/linkerscript/avr5-sections.test

2

A file level comment is added.

2

I have combined all files into avr5.test with split-file.

[benshi001]

lld/test/ELF/linkerscript/avr5-relocs.test

12

I have added a check line for that OUTPUT_ARCH(avr:5) input:

# HEAD: 0x5, EF_AVR_ARCH_AVR5

[MaskRay]

lld/test/ELF/linkerscript/avr5.test

3 ↗

(On Diff #429502)

lld/ELF/ScriptParser.cpp

void ScriptParser::readOutputArch() {
   expect("(");
   while (!errorCount() && !consume(")"))
     skip();
 }
 
 static std::pair<ELFKind, uint16_t> parseBfdName(StringRef s) {
   return StringSwitch<std::pair<ELFKind, uint16_t>>(s)
       .Case("elf32-i386", {ELF32LEKind, EM_386})
+      .Case("elf32-avr", {ELF32LEKind, EM_AVR})
       .Case("elf32-iamcu", {ELF32LEKind, EM_IAMCU})
       .Case("elf32-littlearm", {ELF32LEKind, EM_ARM})
       .Case("elf32-x86-64", {ELF32LEKind, EM_X86_64})
       .Case("elf64-aarch64", {ELF64LEKind, EM_AARCH64})
       .Case("elf64-littleaarch64", {ELF64LEKind, EM_AARCH64})
       .Case("elf64-bigaarch64", {ELF64BEKind, EM_AARCH64})
       .Case("elf32-powerpc", {ELF32BEKind, EM_PPC})
       .Case("elf32-powerpcle", {ELF32LEKind, EM_PPC})
       .Case("elf64-powerpc", {ELF64BEKind, EM_PPC64})
       .Case("elf64-powerpcle", {ELF64LEKind, EM_PPC64})
       .Case("elf64-x86-64", {ELF64LEKind, EM_X86_64})
       .Cases("elf32-tradbigmips", "elf32-bigmips", {ELF32BEKind, EM_MIPS})
       .Case("elf32-ntradbigmips", {ELF32BEKind, EM_MIPS})
       .Case("elf32-tradlittlemips", {ELF32LEKind, EM_MIPS})
       .Case("elf32-ntradlittlemips", {ELF32LEKind, EM_MIPS})
       .Case("elf64-tradbigmips", {ELF64BEKind, EM_MIPS})
       .Case("elf64-tradlittlemips", {ELF64LEKind, EM_MIPS})
       .Case("elf32-littleriscv", {ELF32LEKind, EM_RISCV})
       .Case("elf64-littleriscv", {ELF64LEKind, EM_RISCV})
       .Case("elf64-sparc", {ELF64BEKind, EM_SPARCV9})
       .Case("elf32-msp430", {ELF32LEKind, EM_MSP430})
       .Default({ELFNoneKind, EM_NONE});
 }
 
 // Parse OUTPUT_FORMAT(bfdname) or OUTPUT_FORMAT(default, big, little). Choose
 // big if -EB is specified, little if -EL is specified, or default if neither is
 // specified.
 void ScriptParser::readOutputFormat() {
   expect("(");
 

lld/test/ELF/linkerscript/Inputs/avr5.s

+  .text
+  .globl _start
+  .p2align 1
+_start:
+  ldi   r24, lo8(def) ; Load lower byte of variable def 16-bit address to r24
+  ldi   r25, hi8(def) ; Load higher byte of variable def 16-bit address to r25
+  rjmp  _start
+
+  .section .data
+  .type abc, @object
+  .type def, @object
+  .globl abc
+  .globl def
+abc:
+  .short 100
+def:
+  .short 200

lld/test/ELF/linkerscript/avr5-relocs.test

+# REQUIRES: avr
+
+# RUN: llvm-mc -filetype=obj -triple=avr -mcpu=atmega328 %p/Inputs/avr5.s -o %t
+# RUN: ld.lld %t -T %s -o %t1
+# RUN: llvm-objdump --mcpu=atmega328 -d %t1 | FileCheck %s
+# RUN: ld.lld %t -Ttext=0 -Tdata=0x800 -e _start -o %t2
+# RUN: llvm-objdump -d %t2 | FileCheck %s
+
+# CHECK:      ldi  r24, 2
+# CHECK-NEXT: ldi  r25, 8
+
+OUTPUT_FORMAT("elf32-avr", "elf32-avr", "elf32-avr")
+OUTPUT_ARCH(avr:5)
+
+ENTRY(_start)
+
+SECTIONS {
+  .text 0x000: { *(.text*) }
+  .data 0x800: { *(.data*) }
+}

lld/test/ELF/linkerscript/avr5-sections.test

+# REQUIRES: avr
+
+# RUN: llvm-mc -filetype=obj -triple=avr -mcpu=atmega328 %p/Inputs/avr5.s -o %t
+# RUN: ld.lld %t -T %s -o %t1
+# RUN: llvm-readelf --headers %t1 | FileCheck %s
+# RUN: ld.lld %t -Ttext=0 -Tdata=0x800 -e _start -o %t2
+# RUN: llvm-readelf --headers %t2 | FileCheck %s
+
+# CHECK: Atmel AVR 8-bit microcontroller
+# CHECK: 0x5, EF_AVR_ARCH_AVR5
+
+# CHECK:      Name     Type      Address   Off     Size
+# CHECK-NEXT:          NULL      00000000  000000  000000
+# CHECK-NEXT: .text    PROGBITS  00000000  001000  000006
+# CHECK-NEXT: .data    PROGBITS  00000800  001800  000004
+
+OUTPUT_FORMAT("elf32-avr", "elf32-avr", "elf32-avr")
+OUTPUT_ARCH(avr:5)
+
+ENTRY(_start)
+
+SECTIONS {
+  .text 0x000: { *(.text*) }
+  .data 0x800: { *(.data*) }
+}