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Differential D125018

[ValueTypes] Define MVTs for v128i2/v64i4 as well as i2 and i4.
AbandonedPublic

Authored by hgreving on May 5 2022, 8:59 AM.

Details

Reviewers
None
Summary

Adds MVT::v128i2, MVT::v64i4, and implied MVT::i2, MVT::i4 to support
for downstream targets. i2, i4 are _not_ added as integer types, but
as generic value types. In the future, they should become first class
integer types, but this requires more support in selection DAG.

Diff Detail

Event Timeline

hgreving created this revision.May 5 2022, 8:59 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 5 2022, 8:59 AM
Herald added subscribers: hiraditya, dschuff. · View Herald Transcript
hgreving requested review of this revision.May 5 2022, 8:59 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 5 2022, 8:59 AM
Herald added subscribers: llvm-commits, aheejin. · View Herald Transcript
Harbormaster completed remote builds in B162934: Diff 427346.May 5 2022, 10:26 AM
hgreving updated this revision to Diff 427400.May 5 2022, 11:23 AM
Harbormaster completed remote builds in B162970: Diff 427400.May 5 2022, 12:48 PM
hgreving updated this revision to Diff 427782.May 6 2022, 4:06 PM
hgreving edited the summary of this revision. (Show Details)
craig.topper added a subscriber: craig.topper.May 6 2022, 4:18 PM

What SelectionDAG support is needed for i2/i4?

llvm/include/llvm/CodeGen/ValueTypes.td
29

Don't change this formatting

llvm/utils/TableGen/CodeGenTarget.cpp
59

Keep the formatting consistent with existing code

96

Same here

hgreving added a comment.May 6 2022, 4:23 PM
In D125018#3498099, @craig.topper wrote:

What SelectionDAG support is needed for i2/i4?

Thanks for asking! I ran into various issues when adding i2/i4 as integer types, starting with them being assumed "legal" in selection DAG with various lit tests failingthat rely on expansion. Followed by more issues due to sth in DAG combine, which I hadn't tracked down completely. Any thoughts on that?

hgreving updated this revision to Diff 427787.May 6 2022, 4:29 PM
hgreving updated this revision to Diff 427788.May 6 2022, 4:35 PM
hgreving marked an inline comment as done.
hgreving added inline comments.
llvm/utils/TableGen/CodeGenTarget.cpp
59

Sorry my clang-format did that, need to check my upstream setup.

hgreving updated this revision to Diff 427803.May 6 2022, 5:50 PM
hgreving updated this revision to Diff 427806.May 6 2022, 6:29 PM
Harbormaster completed remote builds in B163275: Diff 427806.May 6 2022, 7:28 PM
hgreving abandoned this revision.May 7 2022, 7:50 AM

Abandoning, may try the integer route or check the sel DAG failures more closely.

Revision Contents

PathSize
llvm/
include/
llvm/
CodeGen/
354 lines
Support/
374 lines
lib/
CodeGen/
4 lines
IR/
46 lines
utils/
TableGen/
8 lines
44 lines

Diff 427782

llvm/include/llvm/CodeGen/ValueTypes.td

Show All 20 Lines
def OtherVT : ValueType<0, 1>; // "Other" value def OtherVT : ValueType<0, 1>; // "Other" value
def i1 : ValueType<1, 2>; // One bit boolean value def i1 : ValueType<1, 2>; // One bit boolean value
def i8 : ValueType<8, 3>; // 8-bit integer value def i8 : ValueType<8, 3>; // 8-bit integer value
def i16 : ValueType<16, 4>; // 16-bit integer value def i16 : ValueType<16, 4>; // 16-bit integer value
def i32 : ValueType<32, 5>; // 32-bit integer value def i32 : ValueType<32, 5>; // 32-bit integer value
def i64 : ValueType<64, 6>; // 64-bit integer value def i64 : ValueType<64, 6>; // 64-bit integer value
def i128 : ValueType<128, 7>; // 128-bit integer value def i128 : ValueType<128, 7>; // 128-bit integer value
def bf16 : ValueType<16, 8>; // 16-bit brain floating point value def bf16 : ValueType<16, 8>; // 16-bit brain floating point value
craig.topperUnsubmitted
Done
ReplyInline Actions

Don't change this formatting

craig.topper: Don't change this formatting
def f16 : ValueType<16, 9>; // 16-bit floating point value def f16 : ValueType<16, 9>; // 16-bit floating point value
def f32 : ValueType<32, 10>; // 32-bit floating point value def f32 : ValueType<32, 10>; // 32-bit floating point value
def f64 : ValueType<64, 11>; // 64-bit floating point value def f64 : ValueType<64, 11>; // 64-bit floating point value
def f80 : ValueType<80, 12>; // 80-bit floating point value def f80 : ValueType<80, 12>; // 80-bit floating point value
def f128 : ValueType<128, 13>; // 128-bit floating point value def f128 : ValueType<128, 13>; // 128-bit floating point value
def ppcf128 : ValueType<128, 14>; // PPC 128-bit floating point value def ppcf128 : ValueType<128, 14>; // PPC 128-bit floating point value
def v1i1 : ValueType<1, 15>; // 1 x i1 vector value def v1i1 : ValueType<1, 15>; // 1 x i1 vector value
def v2i1 : ValueType<2, 16>; // 2 x i1 vector value def v2i1 : ValueType<2, 16>; // 2 x i1 vector value
def v4i1 : ValueType<4, 17>; // 4 x i1 vector value def v4i1 : ValueType<4, 17>; // 4 x i1 vector value
def v8i1 : ValueType<8, 18>; // 8 x i1 vector value def v8i1 : ValueType<8, 18>; // 8 x i1 vector value
def v16i1 : ValueType<16, 19>; // 16 x i1 vector value def v16i1 : ValueType<16, 19>; // 16 x i1 vector value
def v32i1 : ValueType<32, 20>; // 32 x i1 vector value def v32i1 : ValueType<32, 20>; // 32 x i1 vector value
def v64i1 : ValueType<64, 21>; // 64 x i1 vector value def v64i1 : ValueType<64, 21>; // 64 x i1 vector value
def v128i1 : ValueType<128, 22>; // 128 x i1 vector value def v128i1 : ValueType<128, 22>; // 128 x i1 vector value
def v256i1 : ValueType<256, 23>; // 256 x i1 vector value def v256i1 : ValueType<256, 23>; // 256 x i1 vector value
def v512i1 : ValueType<512, 24>; // 512 x i1 vector value def v512i1 : ValueType<512, 24>; // 512 x i1 vector value
def v1024i1 : ValueType<1024, 25>; // 1024 x i1 vector value def v1024i1 : ValueType<1024, 25>; // 1024 x i1 vector value
def v1i8 : ValueType<8, 26>; // 1 x i8 vector value def v128i2 : ValueType<256, 26>; // 128 x i2 vector value
def v2i8 : ValueType<16, 27>; // 2 x i8 vector value
def v4i8 : ValueType<32, 28>; // 4 x i8 vector value
def v8i8 : ValueType<64, 29>; // 8 x i8 vector value
def v16i8 : ValueType<128, 30>; // 16 x i8 vector value
def v32i8 : ValueType<256, 31>; // 32 x i8 vector value
def v64i8 : ValueType<512, 32>; // 64 x i8 vector value
def v128i8 : ValueType<1024, 33>; // 128 x i8 vector value
def v256i8 : ValueType<2048, 34>; // 256 x i8 vector value
def v512i8 : ValueType<4096, 35>; // 512 x i8 vector value
def v1024i8 : ValueType<8192, 36>; // 1024 x i8 vector value
def v1i16 : ValueType<16, 37>; // 1 x i16 vector value
def v2i16 : ValueType<32, 38>; // 2 x i16 vector value
def v3i16 : ValueType<48, 39>; // 3 x i16 vector value
def v4i16 : ValueType<64, 40>; // 4 x i16 vector value
def v8i16 : ValueType<128, 41>; // 8 x i16 vector value
def v16i16 : ValueType<256, 42>; // 16 x i16 vector value
def v32i16 : ValueType<512, 43>; // 32 x i16 vector value
def v64i16 : ValueType<1024, 44>; // 64 x i16 vector value
def v128i16 : ValueType<2048, 45>; // 128 x i16 vector value
def v256i16 : ValueType<4096, 46>; // 256 x i16 vector value
def v512i16 : ValueType<8192, 47>; // 512 x i16 vector value
def v1i32 : ValueType<32, 48>; // 1 x i32 vector value
def v2i32 : ValueType<64, 49>; // 2 x i32 vector value
def v3i32 : ValueType<96, 50>; // 3 x i32 vector value
def v4i32 : ValueType<128, 51>; // 4 x i32 vector value
def v5i32 : ValueType<160, 52>; // 5 x i32 vector value
def v6i32 : ValueType<192, 53>; // 6 x f32 vector value
def v7i32 : ValueType<224, 54>; // 7 x f32 vector value
def v8i32 : ValueType<256, 55>; // 8 x i32 vector value
def v16i32 : ValueType<512, 56>; // 16 x i32 vector value
def v32i32 : ValueType<1024, 57>; // 32 x i32 vector value
def v64i32 : ValueType<2048, 58>; // 64 x i32 vector value
def v128i32 : ValueType<4096, 59>; // 128 x i32 vector value
def v256i32 : ValueType<8192, 60>; // 256 x i32 vector value
def v512i32 : ValueType<16384, 61>; // 512 x i32 vector value
def v1024i32 : ValueType<32768, 62>; // 1024 x i32 vector value
def v2048i32 : ValueType<65536, 63>; // 2048 x i32 vector value
def v1i64 : ValueType<64, 64>; // 1 x i64 vector value
def v2i64 : ValueType<128, 65>; // 2 x i64 vector value
def v3i64 : ValueType<192, 66>; // 3 x i64 vector value
def v4i64 : ValueType<256, 67>; // 4 x i64 vector value
def v8i64 : ValueType<512, 68>; // 8 x i64 vector value
def v16i64 : ValueType<1024, 69>; // 16 x i64 vector value
def v32i64 : ValueType<2048, 70>; // 32 x i64 vector value
def v64i64 : ValueType<4096, 71>; // 64 x i64 vector value
def v128i64 : ValueType<8192, 72>; // 128 x i64 vector value
def v256i64 : ValueType<16384, 73>; // 256 x i64 vector value
def v1i128 : ValueType<128, 74>; // 1 x i128 vector value
def v1f16 : ValueType<16, 75>; // 1 x f16 vector value
def v2f16 : ValueType<32, 76>; // 2 x f16 vector value
def v3f16 : ValueType<48, 77>; // 3 x f16 vector value
def v4f16 : ValueType<64, 78>; // 4 x f16 vector value
def v8f16 : ValueType<128, 79>; // 8 x f16 vector value
def v16f16 : ValueType<256, 80>; // 16 x f16 vector value
def v32f16 : ValueType<512, 81>; // 32 x f16 vector value
def v64f16 : ValueType<1024, 82>; // 64 x f16 vector value
def v128f16 : ValueType<2048, 83>; // 128 x f16 vector value
def v256f16 : ValueType<4096, 84>; // 256 x f16 vector value
def v512f16 : ValueType<8192, 85>; // 512 x f16 vector value
def v2bf16 : ValueType<32, 86>; // 2 x bf16 vector value
def v3bf16 : ValueType<48, 87>; // 3 x bf16 vector value
def v4bf16 : ValueType<64, 88>; // 4 x bf16 vector value
def v8bf16 : ValueType<128, 89>; // 8 x bf16 vector value
def v16bf16 : ValueType<256, 90>; // 16 x bf16 vector value
def v32bf16 : ValueType<512, 91>; // 32 x bf16 vector value
def v64bf16 : ValueType<1024, 92>; // 64 x bf16 vector value
def v128bf16 : ValueType<2048, 93>; // 128 x bf16 vector value
def v1f32 : ValueType<32, 94>; // 1 x f32 vector value
def v2f32 : ValueType<64, 95>; // 2 x f32 vector value
def v3f32 : ValueType<96, 96>; // 3 x f32 vector value
def v4f32 : ValueType<128, 97>; // 4 x f32 vector value
def v5f32 : ValueType<160, 98>; // 5 x f32 vector value
def v6f32 : ValueType<192, 99>; // 6 x f32 vector value
def v7f32 : ValueType<224, 100>; // 7 x f32 vector value
def v8f32 : ValueType<256, 101>; // 8 x f32 vector value
def v16f32 : ValueType<512, 102>; // 16 x f32 vector value
def v32f32 : ValueType<1024, 103>; // 32 x f32 vector value
def v64f32 : ValueType<2048, 104>; // 64 x f32 vector value
def v128f32 : ValueType<4096, 105>; // 128 x f32 vector value
def v256f32 : ValueType<8192, 106>; // 256 x f32 vector value
def v512f32 : ValueType<16384, 107>; // 512 x f32 vector value
def v1024f32 : ValueType<32768, 108>; // 1024 x f32 vector value
def v2048f32 : ValueType<65536, 109>; // 2048 x f32 vector value
def v1f64 : ValueType<64, 110>; // 1 x f64 vector value
def v2f64 : ValueType<128, 111>; // 2 x f64 vector value
def v3f64 : ValueType<192, 112>; // 3 x f64 vector value
def v4f64 : ValueType<256, 113>; // 4 x f64 vector value
def v8f64 : ValueType<512, 114>; // 8 x f64 vector value
def v16f64 : ValueType<1024, 115>; // 16 x f64 vector value
def v32f64 : ValueType<2048, 116>; // 32 x f64 vector value
def v64f64 : ValueType<4096, 117>; // 64 x f64 vector value
def v128f64 : ValueType<8192, 118>; // 128 x f64 vector value
def v256f64 : ValueType<16384, 119>; // 256 x f64 vector value
def nxv1i1 : ValueType<1, 120>; // n x 1 x i1 vector value
def nxv2i1 : ValueType<2, 121>; // n x 2 x i1 vector value
def nxv4i1 : ValueType<4, 122>; // n x 4 x i1 vector value
def nxv8i1 : ValueType<8, 123>; // n x 8 x i1 vector value
def nxv16i1 : ValueType<16, 124>; // n x 16 x i1 vector value
def nxv32i1 : ValueType<32, 125>; // n x 32 x i1 vector value
def nxv64i1 : ValueType<64, 126>; // n x 64 x i1 vector value
def nxv1i8 : ValueType<8, 127>; // n x 1 x i8 vector value
def nxv2i8 : ValueType<16, 128>; // n x 2 x i8 vector value
def nxv4i8 : ValueType<32, 129>; // n x 4 x i8 vector value
def nxv8i8 : ValueType<64, 130>; // n x 8 x i8 vector value
def nxv16i8 : ValueType<128, 131>; // n x 16 x i8 vector value
def nxv32i8 : ValueType<256, 132>; // n x 32 x i8 vector value
def nxv64i8 : ValueType<512, 133>; // n x 64 x i8 vector value
def nxv1i16 : ValueType<16, 134>; // n x 1 x i16 vector value
def nxv2i16 : ValueType<32, 135>; // n x 2 x i16 vector value
def nxv4i16 : ValueType<64, 136>; // n x 4 x i16 vector value
def nxv8i16 : ValueType<128, 137>; // n x 8 x i16 vector value
def nxv16i16 : ValueType<256, 138>; // n x 16 x i16 vector value
def nxv32i16 : ValueType<512, 139>; // n x 32 x i16 vector value
def nxv1i32 : ValueType<32, 140>; // n x 1 x i32 vector value
def nxv2i32 : ValueType<64, 141>; // n x 2 x i32 vector value
def nxv4i32 : ValueType<128, 142>; // n x 4 x i32 vector value
def nxv8i32 : ValueType<256, 143>; // n x 8 x i32 vector value
def nxv16i32 : ValueType<512, 144>; // n x 16 x i32 vector value
def nxv32i32 : ValueType<1024, 145>; // n x 32 x i32 vector value
def nxv1i64 : ValueType<64, 146>; // n x 1 x i64 vector value
def nxv2i64 : ValueType<128, 147>; // n x 2 x i64 vector value
def nxv4i64 : ValueType<256, 148>; // n x 4 x i64 vector value
def nxv8i64 : ValueType<512, 149>; // n x 8 x i64 vector value
def nxv16i64 : ValueType<1024, 150>; // n x 16 x i64 vector value
def nxv32i64 : ValueType<2048, 151>; // n x 32 x i64 vector value
def nxv1f16 : ValueType<16, 152>; // n x 1 x f16 vector value
def nxv2f16 : ValueType<32, 153>; // n x 2 x f16 vector value
def nxv4f16 : ValueType<64, 154>; // n x 4 x f16 vector value
def nxv8f16 : ValueType<128, 155>; // n x 8 x f16 vector value
def nxv16f16 : ValueType<256, 156>; // n x 16 x f16 vector value
def nxv32f16 : ValueType<512, 157>; // n x 32 x f16 vector value
def nxv1bf16 : ValueType<16, 158>; // n x 1 x bf16 vector value
def nxv2bf16 : ValueType<32, 159>; // n x 2 x bf16 vector value
def nxv4bf16 : ValueType<64, 160>; // n x 4 x bf16 vector value
def nxv8bf16 : ValueType<128, 161>; // n x 8 x bf16 vector value
def nxv1f32 : ValueType<32, 162>; // n x 1 x f32 vector value
def nxv2f32 : ValueType<64, 163>; // n x 2 x f32 vector value
def nxv4f32 : ValueType<128, 164>; // n x 4 x f32 vector value
def nxv8f32 : ValueType<256, 165>; // n x 8 x f32 vector value
def nxv16f32 : ValueType<512, 166>; // n x 16 x f32 vector value
def nxv1f64 : ValueType<64, 167>; // n x 1 x f64 vector value
def nxv2f64 : ValueType<128, 168>; // n x 2 x f64 vector value
def nxv4f64 : ValueType<256, 169>; // n x 4 x f64 vector value
def nxv8f64 : ValueType<512, 170>; // n x 8 x f64 vector value
def x86mmx : ValueType<64, 171>; // X86 MMX value
def FlagVT : ValueType<0, 172>; // Pre-RA sched glue
def isVoid : ValueType<0, 173>; // Produces no value
def untyped : ValueType<8, 174>; // Produces an untyped value
def funcref : ValueType<0, 175>; // WebAssembly's funcref type
def externref : ValueType<0, 176>; // WebAssembly's externref type
def x86amx : ValueType<8192, 177>; // X86 AMX value
def i64x8 : ValueType<512, 178>; // 8 Consecutive GPRs (AArch64)
def v64i4 : ValueType<256, 27>; // 64 x i4 vector value
def v1i8 : ValueType<8, 28>; // 1 x i8 vector value
def v2i8 : ValueType<16, 29>; // 2 x i8 vector value
def v4i8 : ValueType<32, 30>; // 4 x i8 vector value
def v8i8 : ValueType<64, 31>; // 8 x i8 vector value
def v16i8 : ValueType<128, 32>; // 16 x i8 vector value
def v32i8 : ValueType<256, 33>; // 32 x i8 vector value
def v64i8 : ValueType<512, 34>; // 64 x i8 vector value
def v128i8 : ValueType<1024, 35>; // 128 x i8 vector value
def v256i8 : ValueType<2048, 36>; // 256 x i8 vector value
def v512i8 : ValueType<4096, 37>; // 512 x i8 vector value
def v1024i8 : ValueType<8192, 38>; // 1024 x i8 vector value
def v1i16 : ValueType<16, 39>; // 1 x i16 vector value
def v2i16 : ValueType<32, 40>; // 2 x i16 vector value
def v3i16 : ValueType<48, 41>; // 3 x i16 vector value
def v4i16 : ValueType<64, 42>; // 4 x i16 vector value
def v8i16 : ValueType<128, 43>; // 8 x i16 vector value
def v16i16 : ValueType<256, 44>; // 16 x i16 vector value
def v32i16 : ValueType<512, 45>; // 32 x i16 vector value
def v64i16 : ValueType<1024, 46>; // 64 x i16 vector value
def v128i16 : ValueType<2048, 47>; // 128 x i16 vector value
def v256i16 : ValueType<4096, 48>; // 256 x i16 vector value
def v512i16 : ValueType<8192, 49>; // 512 x i16 vector value
def v1i32 : ValueType<32, 50>; // 1 x i32 vector value
def v2i32 : ValueType<64, 51>; // 2 x i32 vector value
def v3i32 : ValueType<96, 52>; // 3 x i32 vector value
def v4i32 : ValueType<128, 53>; // 4 x i32 vector value
def v5i32 : ValueType<160, 54>; // 5 x i32 vector value
def v6i32 : ValueType<192, 55>; // 6 x f32 vector value
def v7i32 : ValueType<224, 56>; // 7 x f32 vector value
def v8i32 : ValueType<256, 57>; // 8 x i32 vector value
def v16i32 : ValueType<512, 58>; // 16 x i32 vector value
def v32i32 : ValueType<1024, 59>; // 32 x i32 vector value
def v64i32 : ValueType<2048, 60>; // 64 x i32 vector value
def v128i32 : ValueType<4096, 61>; // 128 x i32 vector value
def v256i32 : ValueType<8192, 62>; // 256 x i32 vector value
def v512i32 : ValueType<16384, 63>; // 512 x i32 vector value
def v1024i32 : ValueType<32768, 64>; // 1024 x i32 vector value
def v2048i32 : ValueType<65536, 65>; // 2048 x i32 vector value
def v1i64 : ValueType<64, 66>; // 1 x i64 vector value
def v2i64 : ValueType<128, 67>; // 2 x i64 vector value
def v3i64 : ValueType<192, 69>; // 3 x i64 vector value
def v4i64 : ValueType<256, 69>; // 4 x i64 vector value
def v8i64 : ValueType<512, 70>; // 8 x i64 vector value
def v16i64 : ValueType<1024, 71>; // 16 x i64 vector value
def v32i64 : ValueType<2048, 71>; // 32 x i64 vector value
def v64i64 : ValueType<4096, 72>; // 64 x i64 vector value
def v128i64 : ValueType<8192, 73>; // 128 x i64 vector value
def v256i64 : ValueType<16384, 74>; // 256 x i64 vector value
def v1i128 : ValueType<128, 76>; // 1 x i128 vector value
def v1f16 : ValueType<16, 77>; // 1 x f16 vector value
def v2f16 : ValueType<32, 78>; // 2 x f16 vector value
def v3f16 : ValueType<48, 79>; // 3 x f16 vector value
def v4f16 : ValueType<64, 80>; // 4 x f16 vector value
def v8f16 : ValueType<128, 81>; // 8 x f16 vector value
def v16f16 : ValueType<256, 82>; // 16 x f16 vector value
def v32f16 : ValueType<512, 83>; // 32 x f16 vector value
def v64f16 : ValueType<1024, 84>; // 64 x f16 vector value
def v128f16 : ValueType<2048, 85>; // 128 x f16 vector value
def v256f16 : ValueType<4096, 86>; // 256 x f16 vector value
def v512f16 : ValueType<8192, 87>; // 512 x f16 vector value
def v2bf16 : ValueType<32, 88>; // 2 x bf16 vector value
def v3bf16 : ValueType<48, 89>; // 3 x bf16 vector value
def v4bf16 : ValueType<64, 90>; // 4 x bf16 vector value
def v8bf16 : ValueType<128, 91>; // 8 x bf16 vector value
def v16bf16 : ValueType<256, 92>; // 16 x bf16 vector value
def v32bf16 : ValueType<512, 93>; // 32 x bf16 vector value
def v64bf16 : ValueType<1024, 94>; // 64 x bf16 vector value
def v128bf16 : ValueType<2048, 95>; // 128 x bf16 vector value
def v1f32 : ValueType<32, 96>; // 1 x f32 vector value
def v2f32 : ValueType<64, 97>; // 2 x f32 vector value
def v3f32 : ValueType<96, 98>; // 3 x f32 vector value
def v4f32 : ValueType<128, 99>; // 4 x f32 vector value
def v5f32 : ValueType<160, 100>; // 5 x f32 vector value
def v6f32 : ValueType<192, 101>; // 6 x f32 vector value
def v7f32 : ValueType<224, 102>; // 7 x f32 vector value
def v8f32 : ValueType<256, 103>; // 8 x f32 vector value
def v16f32 : ValueType<512, 104>; // 16 x f32 vector value
def v32f32 : ValueType<1024, 105>; // 32 x f32 vector value
def v64f32 : ValueType<2048, 106>; // 64 x f32 vector value
def v128f32 : ValueType<4096, 107>; // 128 x f32 vector value
def v256f32 : ValueType<8192, 108>; // 256 x f32 vector value
def v512f32 : ValueType<16384, 109>; // 512 x f32 vector value
def v1024f32 : ValueType<32768, 110>; // 1024 x f32 vector value
def v2048f32 : ValueType<65536, 111>; // 2048 x f32 vector value
def v1f64 : ValueType<64, 112>; // 1 x f64 vector value
def v2f64 : ValueType<128, 113>; // 2 x f64 vector value
def v3f64 : ValueType<192, 114>; // 3 x f64 vector value
def v4f64 : ValueType<256, 115>; // 4 x f64 vector value
def v8f64 : ValueType<512, 116>; // 8 x f64 vector value
def v16f64 : ValueType<1024, 117>; // 16 x f64 vector value
def v32f64 : ValueType<2048, 118>; // 32 x f64 vector value
def v64f64 : ValueType<4096, 119>; // 64 x f64 vector value
def v128f64 : ValueType<8192, 120>; // 128 x f64 vector value
def v256f64 : ValueType<16384, 121>; // 256 x f64 vector value
def nxv1i1 : ValueType<1, 122>; // n x 1 x i1 vector value
def nxv2i1 : ValueType<2, 123>; // n x 2 x i1 vector value
def nxv4i1 : ValueType<4, 124>; // n x 4 x i1 vector value
def nxv8i1 : ValueType<8, 125>; // n x 8 x i1 vector value
def nxv16i1 : ValueType<16, 126>; // n x 16 x i1 vector value
def nxv32i1 : ValueType<32, 127>; // n x 32 x i1 vector value
def nxv64i1 : ValueType<64, 128>; // n x 64 x i1 vector value
def nxv1i8 : ValueType<8, 129>; // n x 1 x i8 vector value
def nxv2i8 : ValueType<16, 130>; // n x 2 x i8 vector value
def nxv4i8 : ValueType<32, 131>; // n x 4 x i8 vector value
def nxv8i8 : ValueType<64, 132>; // n x 8 x i8 vector value
def nxv16i8 : ValueType<128, 133>; // n x 16 x i8 vector value
def nxv32i8 : ValueType<256, 134>; // n x 32 x i8 vector value
def nxv64i8 : ValueType<512, 135>; // n x 64 x i8 vector value
def nxv1i16 : ValueType<16, 136>; // n x 1 x i16 vector value
def nxv2i16 : ValueType<32, 137>; // n x 2 x i16 vector value
def nxv4i16 : ValueType<64, 138>; // n x 4 x i16 vector value
def nxv8i16 : ValueType<128, 139>; // n x 8 x i16 vector value
def nxv16i16 : ValueType<256, 140>; // n x 16 x i16 vector value
def nxv32i16 : ValueType<512, 141>; // n x 32 x i16 vector value
def nxv1i32 : ValueType<32, 142>; // n x 1 x i32 vector value
def nxv2i32 : ValueType<64, 143>; // n x 2 x i32 vector value
def nxv4i32 : ValueType<128, 144>; // n x 4 x i32 vector value
def nxv8i32 : ValueType<256, 145>; // n x 8 x i32 vector value
def nxv16i32 : ValueType<512, 146>; // n x 16 x i32 vector value
def nxv32i32 : ValueType<1024, 147>; // n x 32 x i32 vector value
def nxv1i64 : ValueType<64, 148>; // n x 1 x i64 vector value
def nxv2i64 : ValueType<128, 149>; // n x 2 x i64 vector value
def nxv4i64 : ValueType<256, 150>; // n x 4 x i64 vector value
def nxv8i64 : ValueType<512, 151>; // n x 8 x i64 vector value
def nxv16i64 : ValueType<1024, 152>; // n x 16 x i64 vector value
def nxv32i64 : ValueType<2048, 153>; // n x 32 x i64 vector value
def nxv1f16 : ValueType<16, 154>; // n x 1 x f16 vector value
def nxv2f16 : ValueType<32, 155>; // n x 2 x f16 vector value
def nxv4f16 : ValueType<64, 156>; // n x 4 x f16 vector value
def nxv8f16 : ValueType<128, 157>; // n x 8 x f16 vector value
def nxv16f16 : ValueType<256, 158>; // n x 16 x f16 vector value
def nxv32f16 : ValueType<512, 159>; // n x 32 x f16 vector value
def nxv1bf16 : ValueType<16, 160>; // n x 1 x bf16 vector value
def nxv2bf16 : ValueType<32, 161>; // n x 2 x bf16 vector value
def nxv4bf16 : ValueType<64, 162>; // n x 4 x bf16 vector value
def nxv8bf16 : ValueType<128, 163>; // n x 8 x bf16 vector value
def nxv1f32 : ValueType<32, 164>; // n x 1 x f32 vector value
def nxv2f32 : ValueType<64, 165>; // n x 2 x f32 vector value
def nxv4f32 : ValueType<128, 166>; // n x 4 x f32 vector value
def nxv8f32 : ValueType<256, 167>; // n x 8 x f32 vector value
def nxv16f32 : ValueType<512, 168>; // n x 16 x f32 vector value
def nxv1f64 : ValueType<64, 169>; // n x 1 x f64 vector value
def nxv2f64 : ValueType<128, 170>; // n x 2 x f64 vector value
def nxv4f64 : ValueType<256, 171>; // n x 4 x f64 vector value
def nxv8f64 : ValueType<512, 172>; // n x 8 x f64 vector value
def x86mmx : ValueType<64, 173>; // X86 MMX value
def FlagVT : ValueType<0, 174>; // Pre-RA sched glue
def isVoid : ValueType<0, 175>; // Produces no value
def untyped : ValueType<8, 176>; // Produces an untyped value
def funcref : ValueType<0, 177>; // WebAssembly's funcref type
def externref : ValueType<0, 178>; // WebAssembly's externref type
def x86amx : ValueType<8192, 179>; // X86 AMX value
def i64x8 : ValueType<512, 180>; // 8 Consecutive GPRs (AArch64)
def i2 : ValueType<2, 181>; // 2-bit boolean value
def i4 : ValueType<4, 182>; // 4-bit boolean value
def token : ValueType<0, 248>; // TokenTy def token : ValueType<0, 248>; // TokenTy
def MetadataVT : ValueType<0, 249>; // Metadata def MetadataVT : ValueType<0, 249>; // Metadata
// Pseudo valuetype mapped to the current pointer size to any address space. // Pseudo valuetype mapped to the current pointer size to any address space.
// Should only be used in TableGen. // Should only be used in TableGen.
def iPTRAny : ValueType<0, 250>; def iPTRAny : ValueType<0, 250>;
Show All 25 Lines

llvm/include/llvm/Support/MachineValueType.h

Show First 20 Lines • Show All 67 Lines • ▼ Show 20 Lines enum SimpleValueType : uint8_t {
v16i1 = 19, // 16 x i1 v16i1 = 19, // 16 x i1
v32i1 = 20, // 32 x i1 v32i1 = 20, // 32 x i1
v64i1 = 21, // 64 x i1 v64i1 = 21, // 64 x i1
v128i1 = 22, // 128 x i1 v128i1 = 22, // 128 x i1
v256i1 = 23, // 256 x i1 v256i1 = 23, // 256 x i1
v512i1 = 24, // 512 x i1 v512i1 = 24, // 512 x i1
v1024i1 = 25, // 1024 x i1 v1024i1 = 25, // 1024 x i1
v1i8 = 26, // 1 x i8 v128i2 = 26, // 128 x i2
v2i8 = 27, // 2 x i8
v4i8 = 28, // 4 x i8
v8i8 = 29, // 8 x i8
v16i8 = 30, // 16 x i8
v32i8 = 31, // 32 x i8
v64i8 = 32, // 64 x i8
v128i8 = 33, // 128 x i8
v256i8 = 34, // 256 x i8
v512i8 = 35, // 512 x i8
v1024i8 = 36, // 1024 x i8
v1i16 = 37, // 1 x i16
v2i16 = 38, // 2 x i16
v3i16 = 39, // 3 x i16
v4i16 = 40, // 4 x i16
v8i16 = 41, // 8 x i16
v16i16 = 42, // 16 x i16
v32i16 = 43, // 32 x i16
v64i16 = 44, // 64 x i16
v128i16 = 45, // 128 x i16
v256i16 = 46, // 256 x i16
v512i16 = 47, // 512 x i16
v1i32 = 48, // 1 x i32
v2i32 = 49, // 2 x i32
v3i32 = 50, // 3 x i32
v4i32 = 51, // 4 x i32
v5i32 = 52, // 5 x i32
v6i32 = 53, // 6 x i32
v7i32 = 54, // 7 x i32
v8i32 = 55, // 8 x i32
v16i32 = 56, // 16 x i32
v32i32 = 57, // 32 x i32
v64i32 = 58, // 64 x i32
v128i32 = 59, // 128 x i32
v256i32 = 60, // 256 x i32
v512i32 = 61, // 512 x i32
v1024i32 = 62, // 1024 x i32
v2048i32 = 63, // 2048 x i32
v1i64 = 64, // 1 x i64
v2i64 = 65, // 2 x i64
v3i64 = 66, // 3 x i64
v4i64 = 67, // 4 x i64
v8i64 = 68, // 8 x i64
v16i64 = 69, // 16 x i64
v32i64 = 70, // 32 x i64
v64i64 = 71, // 64 x i64
v128i64 = 72, // 128 x i64
v256i64 = 73, // 256 x i64
v1i128 = 74, // 1 x i128 v64i4 = 27, // 64 x i4
v1i8 = 28, // 1 x i8
v2i8 = 29, // 2 x i8
v4i8 = 30, // 4 x i8
v8i8 = 31, // 8 x i8
v16i8 = 32, // 16 x i8
v32i8 = 33, // 32 x i8
v64i8 = 34, // 64 x i8
v128i8 = 35, // 128 x i8
v256i8 = 36, // 256 x i8
v512i8 = 37, // 512 x i8
v1024i8 = 38, // 1024 x i8
v1i16 = 39, // 1 x i16
v2i16 = 40, // 2 x i16
v3i16 = 41, // 3 x i16
v4i16 = 42, // 4 x i16
v8i16 = 43, // 8 x i16
v16i16 = 44, // 16 x i16
v32i16 = 45, // 32 x i16
v64i16 = 46, // 64 x i16
v128i16 = 47, // 128 x i16
v256i16 = 48, // 256 x i16
v512i16 = 49, // 512 x i16
v1i32 = 50, // 1 x i32
v2i32 = 51, // 2 x i32
v3i32 = 52, // 3 x i32
v4i32 = 53, // 4 x i32
v5i32 = 54, // 5 x i32
v6i32 = 55, // 6 x i32
v7i32 = 56, // 7 x i32
v8i32 = 57, // 8 x i32
v16i32 = 58, // 16 x i32
v32i32 = 59, // 32 x i32
v64i32 = 60, // 64 x i32
v128i32 = 61, // 128 x i32
v256i32 = 62, // 256 x i32
v512i32 = 63, // 512 x i32
v1024i32 = 64, // 1024 x i32
v2048i32 = 65, // 2048 x i32
v1i64 = 66, // 1 x i64
v2i64 = 67, // 2 x i64
v3i64 = 68, // 3 x i64
v4i64 = 69, // 4 x i64
v8i64 = 70, // 8 x i64
v16i64 = 71, // 16 x i64
v32i64 = 72, // 32 x i64
v64i64 = 73, // 64 x i64
v128i64 = 74, // 128 x i64
v256i64 = 75, // 256 x i64
v1i128 = 76, // 1 x i128
FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i1, FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i1,
LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i128, LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i128,
v1f16 = 75, // 1 x f16 v1f16 = 77, // 1 x f16
v2f16 = 76, // 2 x f16 v2f16 = 78, // 2 x f16
v3f16 = 77, // 3 x f16 v3f16 = 79, // 3 x f16
v4f16 = 78, // 4 x f16 v4f16 = 80, // 4 x f16
v8f16 = 79, // 8 x f16 v8f16 = 81, // 8 x f16
v16f16 = 80, // 16 x f16 v16f16 = 82, // 16 x f16
v32f16 = 81, // 32 x f16 v32f16 = 83, // 32 x f16
v64f16 = 82, // 64 x f16 v64f16 = 84, // 64 x f16
v128f16 = 83, // 128 x f16 v128f16 = 85, // 128 x f16
v256f16 = 84, // 256 x f16 v256f16 = 86, // 256 x f16
v512f16 = 85, // 256 x f16 v512f16 = 87, // 256 x f16
v2bf16 = 86, // 2 x bf16 v2bf16 = 88, // 2 x bf16
v3bf16 = 87, // 3 x bf16 v3bf16 = 89, // 3 x bf16
v4bf16 = 88, // 4 x bf16 v4bf16 = 90, // 4 x bf16
v8bf16 = 89, // 8 x bf16 v8bf16 = 91, // 8 x bf16
v16bf16 = 90, // 16 x bf16 v16bf16 = 92, // 16 x bf16
v32bf16 = 91, // 32 x bf16 v32bf16 = 93, // 32 x bf16
v64bf16 = 92, // 64 x bf16 v64bf16 = 94, // 64 x bf16
v128bf16 = 93, // 128 x bf16 v128bf16 = 95, // 128 x bf16
v1f32 = 94, // 1 x f32 v1f32 = 96, // 1 x f32
v2f32 = 95, // 2 x f32 v2f32 = 97, // 2 x f32
v3f32 = 96, // 3 x f32 v3f32 = 98, // 3 x f32
v4f32 = 97, // 4 x f32 v4f32 = 99, // 4 x f32
v5f32 = 98, // 5 x f32 v5f32 = 100, // 5 x f32
v6f32 = 99, // 6 x f32 v6f32 = 101, // 6 x f32
v7f32 = 100, // 7 x f32 v7f32 = 102, // 7 x f32
v8f32 = 101, // 8 x f32 v8f32 = 103, // 8 x f32
v16f32 = 102, // 16 x f32 v16f32 = 104, // 16 x f32
v32f32 = 103, // 32 x f32 v32f32 = 105, // 32 x f32
v64f32 = 104, // 64 x f32 v64f32 = 106, // 64 x f32
v128f32 = 105, // 128 x f32 v128f32 = 107, // 128 x f32
v256f32 = 106, // 256 x f32 v256f32 = 108, // 256 x f32
v512f32 = 107, // 512 x f32 v512f32 = 109, // 512 x f32
v1024f32 = 108, // 1024 x f32 v1024f32 = 110, // 1024 x f32
v2048f32 = 109, // 2048 x f32 v2048f32 = 111, // 2048 x f32
v1f64 = 110, // 1 x f64 v1f64 = 112, // 1 x f64
v2f64 = 111, // 2 x f64 v2f64 = 113, // 2 x f64
v3f64 = 112, // 3 x f64 v3f64 = 114, // 3 x f64
v4f64 = 113, // 4 x f64 v4f64 = 115, // 4 x f64
v8f64 = 114, // 8 x f64 v8f64 = 116, // 8 x f64
v16f64 = 115, // 16 x f64 v16f64 = 117, // 16 x f64
v32f64 = 116, // 32 x f64 v32f64 = 118, // 32 x f64
v64f64 = 117, // 64 x f64 v64f64 = 119, // 64 x f64
v128f64 = 118, // 128 x f64 v128f64 = 120, // 128 x f64
v256f64 = 119, // 256 x f64 v256f64 = 121, // 256 x f64
FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE = v1f16, FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE = v1f16,
LAST_FP_FIXEDLEN_VECTOR_VALUETYPE = v256f64, LAST_FP_FIXEDLEN_VECTOR_VALUETYPE = v256f64,
FIRST_FIXEDLEN_VECTOR_VALUETYPE = v1i1, FIRST_FIXEDLEN_VECTOR_VALUETYPE = v1i1,
LAST_FIXEDLEN_VECTOR_VALUETYPE = v256f64, LAST_FIXEDLEN_VECTOR_VALUETYPE = v256f64,
nxv1i1 = 120, // n x 1 x i1 nxv1i1 = 122, // n x 1 x i1
nxv2i1 = 121, // n x 2 x i1 nxv2i1 = 123, // n x 2 x i1
nxv4i1 = 122, // n x 4 x i1 nxv4i1 = 124, // n x 4 x i1
nxv8i1 = 123, // n x 8 x i1 nxv8i1 = 125, // n x 8 x i1
nxv16i1 = 124, // n x 16 x i1 nxv16i1 = 126, // n x 16 x i1
nxv32i1 = 125, // n x 32 x i1 nxv32i1 = 127, // n x 32 x i1
nxv64i1 = 126, // n x 64 x i1 nxv64i1 = 128, // n x 64 x i1
nxv1i8 = 127, // n x 1 x i8 nxv1i8 = 129, // n x 1 x i8
nxv2i8 = 128, // n x 2 x i8 nxv2i8 = 130, // n x 2 x i8
nxv4i8 = 129, // n x 4 x i8 nxv4i8 = 131, // n x 4 x i8
nxv8i8 = 130, // n x 8 x i8 nxv8i8 = 132, // n x 8 x i8
nxv16i8 = 131, // n x 16 x i8 nxv16i8 = 133, // n x 16 x i8
nxv32i8 = 132, // n x 32 x i8 nxv32i8 = 134, // n x 32 x i8
nxv64i8 = 133, // n x 64 x i8 nxv64i8 = 135, // n x 64 x i8
nxv1i16 = 134, // n x 1 x i16 nxv1i16 = 136, // n x 1 x i16
nxv2i16 = 135, // n x 2 x i16 nxv2i16 = 137, // n x 2 x i16
nxv4i16 = 136, // n x 4 x i16 nxv4i16 = 138, // n x 4 x i16
nxv8i16 = 137, // n x 8 x i16 nxv8i16 = 139, // n x 8 x i16
nxv16i16 = 138, // n x 16 x i16 nxv16i16 = 140, // n x 16 x i16
nxv32i16 = 139, // n x 32 x i16 nxv32i16 = 141, // n x 32 x i16
nxv1i32 = 140, // n x 1 x i32 nxv1i32 = 142, // n x 1 x i32
nxv2i32 = 141, // n x 2 x i32 nxv2i32 = 143, // n x 2 x i32
nxv4i32 = 142, // n x 4 x i32 nxv4i32 = 144, // n x 4 x i32
nxv8i32 = 143, // n x 8 x i32 nxv8i32 = 145, // n x 8 x i32
nxv16i32 = 144, // n x 16 x i32 nxv16i32 = 146, // n x 16 x i32
nxv32i32 = 145, // n x 32 x i32 nxv32i32 = 147, // n x 32 x i32
nxv1i64 = 146, // n x 1 x i64 nxv1i64 = 148, // n x 1 x i64
nxv2i64 = 147, // n x 2 x i64 nxv2i64 = 149, // n x 2 x i64
nxv4i64 = 148, // n x 4 x i64 nxv4i64 = 150, // n x 4 x i64
nxv8i64 = 149, // n x 8 x i64 nxv8i64 = 151, // n x 8 x i64
nxv16i64 = 150, // n x 16 x i64 nxv16i64 = 152, // n x 16 x i64
nxv32i64 = 151, // n x 32 x i64 nxv32i64 = 153, // n x 32 x i64
FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv1i1, FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv1i1,
LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv32i64, LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv32i64,
nxv1f16 = 152, // n x 1 x f16 nxv1f16 = 154, // n x 1 x f16
nxv2f16 = 153, // n x 2 x f16 nxv2f16 = 155, // n x 2 x f16
nxv4f16 = 154, // n x 4 x f16 nxv4f16 = 156, // n x 4 x f16
nxv8f16 = 155, // n x 8 x f16 nxv8f16 = 157, // n x 8 x f16
nxv16f16 = 156, // n x 16 x f16 nxv16f16 = 158, // n x 16 x f16
nxv32f16 = 157, // n x 32 x f16 nxv32f16 = 159, // n x 32 x f16
nxv1bf16 = 158, // n x 1 x bf16 nxv1bf16 = 160, // n x 1 x bf16
nxv2bf16 = 159, // n x 2 x bf16 nxv2bf16 = 161, // n x 2 x bf16
nxv4bf16 = 160, // n x 4 x bf16 nxv4bf16 = 162, // n x 4 x bf16
nxv8bf16 = 161, // n x 8 x bf16 nxv8bf16 = 163, // n x 8 x bf16
nxv1f32 = 162, // n x 1 x f32 nxv1f32 = 164, // n x 1 x f32
nxv2f32 = 163, // n x 2 x f32 nxv2f32 = 165, // n x 2 x f32
nxv4f32 = 164, // n x 4 x f32 nxv4f32 = 166, // n x 4 x f32
nxv8f32 = 165, // n x 8 x f32 nxv8f32 = 167, // n x 8 x f32
nxv16f32 = 166, // n x 16 x f32 nxv16f32 = 168, // n x 16 x f32
nxv1f64 = 167, // n x 1 x f64 nxv1f64 = 169, // n x 1 x f64
nxv2f64 = 168, // n x 2 x f64 nxv2f64 = 170, // n x 2 x f64
nxv4f64 = 169, // n x 4 x f64 nxv4f64 = 171, // n x 4 x f64
nxv8f64 = 170, // n x 8 x f64 nxv8f64 = 172, // n x 8 x f64
FIRST_FP_SCALABLE_VECTOR_VALUETYPE = nxv1f16, FIRST_FP_SCALABLE_VECTOR_VALUETYPE = nxv1f16,
LAST_FP_SCALABLE_VECTOR_VALUETYPE = nxv8f64, LAST_FP_SCALABLE_VECTOR_VALUETYPE = nxv8f64,
FIRST_SCALABLE_VECTOR_VALUETYPE = nxv1i1, FIRST_SCALABLE_VECTOR_VALUETYPE = nxv1i1,
LAST_SCALABLE_VECTOR_VALUETYPE = nxv8f64, LAST_SCALABLE_VECTOR_VALUETYPE = nxv8f64,
FIRST_VECTOR_VALUETYPE = v1i1, FIRST_VECTOR_VALUETYPE = v1i1,
LAST_VECTOR_VALUETYPE = nxv8f64, LAST_VECTOR_VALUETYPE = nxv8f64,
x86mmx = 171, // This is an X86 MMX value x86mmx = 173, // This is an X86 MMX value
Glue = 172, // This glues nodes together during pre-RA sched Glue = 174, // This glues nodes together during pre-RA sched
isVoid = 173, // This has no value isVoid = 175, // This has no value
Untyped = 174, // This value takes a register, but has Untyped = 176, // This value takes a register, but has
// unspecified type. The register class // unspecified type. The register class
// will be determined by the opcode. // will be determined by the opcode.
funcref = 175, // WebAssembly's funcref type funcref = 177, // WebAssembly's funcref type
externref = 176, // WebAssembly's externref type externref = 178, // WebAssembly's externref type
x86amx = 177, // This is an X86 AMX value x86amx = 179, // This is an X86 AMX value
i64x8 = 178, // 8 Consecutive GPRs (AArch64) i64x8 = 180, // 8 Consecutive GPRs (AArch64)
i2 = 181, // This is a 2 bit integer value
i4 = 182, // This is a 4 bit integer value
FIRST_VALUETYPE = 1, // This is always the beginning of the list. FIRST_VALUETYPE = 1, // This is always the beginning of the list.
LAST_VALUETYPE = i64x8, // This always remains at the end of the list. LAST_VALUETYPE = i4, // This always remains at the end of the list.
VALUETYPE_SIZE = LAST_VALUETYPE + 1, VALUETYPE_SIZE = LAST_VALUETYPE + 1,
// This is the current maximum for LAST_VALUETYPE. // This is the current maximum for LAST_VALUETYPE.
// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors // MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
// This value must be a multiple of 32. // This value must be a multiple of 32.
MAX_ALLOWED_VALUETYPE = 192, MAX_ALLOWED_VALUETYPE = 192,
// A value of type llvm::TokenTy // A value of type llvm::TokenTy
▲ Show 20 Lines • Show All 125 Lines • ▼ Show 20 Lines bool is128BitVector() const {
SimpleTy == MVT::v2i64 || SimpleTy == MVT::v1i128 || SimpleTy == MVT::v2i64 || SimpleTy == MVT::v1i128 ||
SimpleTy == MVT::v8f16 || SimpleTy == MVT::v8bf16 || SimpleTy == MVT::v8f16 || SimpleTy == MVT::v8bf16 ||
SimpleTy == MVT::v4f32 || SimpleTy == MVT::v2f64); SimpleTy == MVT::v4f32 || SimpleTy == MVT::v2f64);
} }
/// Return true if this is a 256-bit vector type. /// Return true if this is a 256-bit vector type.
bool is256BitVector() const { bool is256BitVector() const {
return (SimpleTy == MVT::v16f16 || SimpleTy == MVT::v16bf16 || return (SimpleTy == MVT::v16f16 || SimpleTy == MVT::v16bf16 ||
SimpleTy == MVT::v8f32 || SimpleTy == MVT::v4f64 || SimpleTy == MVT::v8f32 || SimpleTy == MVT::v4f64 ||
SimpleTy == MVT::v32i8 || SimpleTy == MVT::v16i16 || SimpleTy == MVT::v32i8 || SimpleTy == MVT::v16i16 ||
SimpleTy == MVT::v8i32 || SimpleTy == MVT::v4i64 || SimpleTy == MVT::v8i32 || SimpleTy == MVT::v4i64 ||
SimpleTy == MVT::v256i1); SimpleTy == MVT::v256i1 || SimpleTy == MVT::v128i2 ||
SimpleTy == MVT::v64i4);
} }
/// Return true if this is a 512-bit vector type. /// Return true if this is a 512-bit vector type.
bool is512BitVector() const { bool is512BitVector() const {
return (SimpleTy == MVT::v32f16 || SimpleTy == MVT::v32bf16 || return (SimpleTy == MVT::v32f16 || SimpleTy == MVT::v32bf16 ||
SimpleTy == MVT::v16f32 || SimpleTy == MVT::v8f64 || SimpleTy == MVT::v16f32 || SimpleTy == MVT::v8f64 ||
SimpleTy == MVT::v512i1 || SimpleTy == MVT::v64i8 || SimpleTy == MVT::v512i1 || SimpleTy == MVT::v64i8 ||
SimpleTy == MVT::v32i16 || SimpleTy == MVT::v16i32 || SimpleTy == MVT::v32i16 || SimpleTy == MVT::v16i32 ||
▲ Show 20 Lines • Show All 103 Lines • ▼ Show 20 Lines MVT getVectorElementType() const {
case v1024i1: case v1024i1:
case nxv1i1: case nxv1i1:
case nxv2i1: case nxv2i1:
case nxv4i1: case nxv4i1:
case nxv8i1: case nxv8i1:
case nxv16i1: case nxv16i1:
case nxv32i1: case nxv32i1:
case nxv64i1: return i1; case nxv64i1: return i1;
case v128i2:
return i2;
case v64i4:
return i4;
case v1i8: case v1i8:
case v2i8: case v2i8:
case v4i8: case v4i8:
case v8i8: case v8i8:
case v16i8: case v16i8:
case v32i8: case v32i8:
case v64i8: case v64i8:
case v128i8: case v128i8:
▲ Show 20 Lines • Show All 151 Lines • ▼ Show 20 Lines unsigned getVectorMinNumElements() const {
case v256i8: case v256i8:
case v256i16: case v256i16:
case v256f16: case v256f16:
case v256i32: case v256i32:
case v256i64: case v256i64:
case v256f32: case v256f32:
case v256f64: return 256; case v256f64: return 256;
case v128i1: case v128i1:
case v128i2:
case v128i8: case v128i8:
case v128i16: case v128i16:
case v128i32: case v128i32:
case v128i64: case v128i64:
case v128f16: case v128f16:
case v128bf16: case v128bf16:
case v128f32: case v128f32:
case v128f64: return 128; case v128f64: return 128;
case v64i1: case v64i1:
case v64i4:
case v64i8: case v64i8:
case v64i16: case v64i16:
case v64i32: case v64i32:
case v64i64: case v64i64:
case v64f16: case v64f16:
case v64bf16: case v64bf16:
case v64f32: case v64f32:
case v64f64: case v64f64:
▲ Show 20 Lines • Show All 153 Lines • ▼ Show 20 Lines TypeSize getSizeInBits() const {
case token: case token:
llvm_unreachable("Token type is a sentinel that cannot be used " llvm_unreachable("Token type is a sentinel that cannot be used "
"in codegen and has no size"); "in codegen and has no size");
case Metadata: case Metadata:
llvm_unreachable("Value type is metadata."); llvm_unreachable("Value type is metadata.");
case i1: case i1:
case v1i1: return TypeSize::Fixed(1); case v1i1: return TypeSize::Fixed(1);
case nxv1i1: return TypeSize::Scalable(1); case nxv1i1: return TypeSize::Scalable(1);
case i2:
case v2i1: return TypeSize::Fixed(2); case v2i1: return TypeSize::Fixed(2);
case nxv2i1: return TypeSize::Scalable(2); case nxv2i1: return TypeSize::Scalable(2);
case i4:
case v4i1: return TypeSize::Fixed(4); case v4i1: return TypeSize::Fixed(4);
case nxv4i1: return TypeSize::Scalable(4); case nxv4i1: return TypeSize::Scalable(4);
case i8 : case i8 :
case v1i8: case v1i8:
case v8i1: return TypeSize::Fixed(8); case v8i1: return TypeSize::Fixed(8);
case nxv1i8: case nxv1i8:
case nxv8i1: return TypeSize::Scalable(8); case nxv8i1: return TypeSize::Scalable(8);
case i16 : case i16 :
▲ Show 20 Lines • Show All 76 Lines • ▼ Show 20 Lines TypeSize getSizeInBits() const {
case v5f32: return TypeSize::Fixed(160); case v5f32: return TypeSize::Fixed(160);
case v6i32: case v6i32:
case v3i64: case v3i64:
case v6f32: case v6f32:
case v3f64: return TypeSize::Fixed(192); case v3f64: return TypeSize::Fixed(192);
case v7i32: case v7i32:
case v7f32: return TypeSize::Fixed(224); case v7f32: return TypeSize::Fixed(224);
case v256i1: case v256i1:
case v128i2:
case v64i4:
case v32i8: case v32i8:
case v16i16: case v16i16:
case v8i32: case v8i32:
case v4i64: case v4i64:
case v16f16: case v16f16:
case v16bf16: case v16bf16:
case v8f32: case v8f32:
case v4f64: return TypeSize::Fixed(256); case v4f64: return TypeSize::Fixed(256);
▲ Show 20 Lines • Show All 178 Lines • ▼ Show 20 Lines
} }
static MVT getIntegerVT(unsigned BitWidth) { static MVT getIntegerVT(unsigned BitWidth) {
switch (BitWidth) { switch (BitWidth) {
default: default:
return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE); return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE);
case 1: case 1:
return MVT::i1; return MVT::i1;
case 2:
return MVT::i2;
case 4:
return MVT::i4;
case 8: case 8:
return MVT::i8; return MVT::i8;
case 16: case 16:
return MVT::i16; return MVT::i16;
case 32: case 32:
return MVT::i32; return MVT::i32;
case 64: case 64:
return MVT::i64; return MVT::i64;
Show All 14 Lines static MVT getVectorVT(MVT VT, unsigned NumElements) {
if (NumElements == 16) return MVT::v16i1; if (NumElements == 16) return MVT::v16i1;
if (NumElements == 32) return MVT::v32i1; if (NumElements == 32) return MVT::v32i1;
if (NumElements == 64) return MVT::v64i1; if (NumElements == 64) return MVT::v64i1;
if (NumElements == 128) return MVT::v128i1; if (NumElements == 128) return MVT::v128i1;
if (NumElements == 256) return MVT::v256i1; if (NumElements == 256) return MVT::v256i1;
if (NumElements == 512) return MVT::v512i1; if (NumElements == 512) return MVT::v512i1;
if (NumElements == 1024) return MVT::v1024i1; if (NumElements == 1024) return MVT::v1024i1;
break; break;
case MVT::i2:
if (NumElements == 128)
return MVT::v128i2;
break;
case MVT::i4:
if (NumElements == 64)
return MVT::v64i4;
break;
case MVT::i8: case MVT::i8:
if (NumElements == 1) return MVT::v1i8; if (NumElements == 1) return MVT::v1i8;
if (NumElements == 2) return MVT::v2i8; if (NumElements == 2) return MVT::v2i8;
if (NumElements == 4) return MVT::v4i8; if (NumElements == 4) return MVT::v4i8;
if (NumElements == 8) return MVT::v8i8; if (NumElements == 8) return MVT::v8i8;
if (NumElements == 16) return MVT::v16i8; if (NumElements == 16) return MVT::v16i8;
if (NumElements == 32) return MVT::v32i8; if (NumElements == 32) return MVT::v32i8;
if (NumElements == 64) return MVT::v64i8; if (NumElements == 64) return MVT::v64i8;
▲ Show 20 Lines • Show All 268 Lines • Show Last 20 Lines

llvm/lib/CodeGen/ValueTypes.cpp

Show First 20 Lines • Show All 223 Lines • ▼ Show 20 LinesType *EVT::getTypeForEVT(LLVMContext &Context) const {
case MVT::v128i1: case MVT::v128i1:
return FixedVectorType::get(Type::getInt1Ty(Context), 128); return FixedVectorType::get(Type::getInt1Ty(Context), 128);
case MVT::v256i1: case MVT::v256i1:
return FixedVectorType::get(Type::getInt1Ty(Context), 256); return FixedVectorType::get(Type::getInt1Ty(Context), 256);
case MVT::v512i1: case MVT::v512i1:
return FixedVectorType::get(Type::getInt1Ty(Context), 512); return FixedVectorType::get(Type::getInt1Ty(Context), 512);
case MVT::v1024i1: case MVT::v1024i1:
return FixedVectorType::get(Type::getInt1Ty(Context), 1024); return FixedVectorType::get(Type::getInt1Ty(Context), 1024);
case MVT::v128i2:
return FixedVectorType::get(Type::getIntNTy(Context, 2), 128);
case MVT::v64i4:
return FixedVectorType::get(Type::getIntNTy(Context, 4), 64);
case MVT::v1i8: case MVT::v1i8:
return FixedVectorType::get(Type::getInt8Ty(Context), 1); return FixedVectorType::get(Type::getInt8Ty(Context), 1);
case MVT::v2i8: case MVT::v2i8:
return FixedVectorType::get(Type::getInt8Ty(Context), 2); return FixedVectorType::get(Type::getInt8Ty(Context), 2);
case MVT::v4i8: case MVT::v4i8:
return FixedVectorType::get(Type::getInt8Ty(Context), 4); return FixedVectorType::get(Type::getInt8Ty(Context), 4);
case MVT::v8i8: case MVT::v8i8:
return FixedVectorType::get(Type::getInt8Ty(Context), 8); return FixedVectorType::get(Type::getInt8Ty(Context), 8);
▲ Show 20 Lines • Show All 336 Lines • Show Last 20 Lines

llvm/lib/IR/Function.cpp

Show First 20 Lines • Show All 921 Lines • ▼ Show 20 Lines
/// IIT_Info - These are enumerators that describe the entries returned by the /// IIT_Info - These are enumerators that describe the entries returned by the
/// getIntrinsicInfoTableEntries function. /// getIntrinsicInfoTableEntries function.
/// ///
/// NOTE: This must be kept in synch with the copy in TblGen/IntrinsicEmitter! /// NOTE: This must be kept in synch with the copy in TblGen/IntrinsicEmitter!
enum IIT_Info { enum IIT_Info {
// Common values should be encoded with 0-15. // Common values should be encoded with 0-15.
IIT_Done = 0, IIT_Done = 0,
IIT_I1 = 1, IIT_I1 = 1,
IIT_I8 = 2, IIT_I8 = 2,
IIT_I16 = 3, IIT_I16 = 3,
IIT_I32 = 4, IIT_I32 = 4,
IIT_I64 = 5, IIT_I64 = 5,
IIT_F16 = 6, IIT_F16 = 6,
IIT_F32 = 7, IIT_F32 = 7,
IIT_F64 = 8, IIT_F64 = 8,
IIT_V2 = 9, IIT_V2 = 9,
IIT_V4 = 10, IIT_V4 = 10,
IIT_V8 = 11, IIT_V8 = 11,
IIT_V16 = 12, IIT_V16 = 12,
IIT_V32 = 13, IIT_V32 = 13,
IIT_PTR = 14, IIT_PTR = 14,
IIT_ARG = 15, IIT_ARG = 15,
// Values from 16+ are only encodable with the inefficient encoding. // Values from 16+ are only encodable with the inefficient encoding.
IIT_V64 = 16, IIT_V64 = 16,
IIT_MMX = 17, IIT_MMX = 17,
IIT_TOKEN = 18, IIT_TOKEN = 18,
IIT_METADATA = 19, IIT_METADATA = 19,
IIT_EMPTYSTRUCT = 20, IIT_EMPTYSTRUCT = 20,
IIT_STRUCT2 = 21, IIT_STRUCT2 = 21,
IIT_STRUCT3 = 22, IIT_STRUCT3 = 22,
IIT_STRUCT4 = 23, IIT_STRUCT4 = 23,
IIT_STRUCT5 = 24, IIT_STRUCT5 = 24,
IIT_EXTEND_ARG = 25, IIT_EXTEND_ARG = 25,
IIT_TRUNC_ARG = 26, IIT_TRUNC_ARG = 26,
IIT_ANYPTR = 27, IIT_ANYPTR = 27,
IIT_V1 = 28, IIT_V1 = 28,
IIT_VARARG = 29, IIT_VARARG = 29,
IIT_HALF_VEC_ARG = 30, IIT_HALF_VEC_ARG = 30,
IIT_SAME_VEC_WIDTH_ARG = 31, IIT_SAME_VEC_WIDTH_ARG = 31,
IIT_PTR_TO_ARG = 32, IIT_PTR_TO_ARG = 32,
IIT_PTR_TO_ELT = 33, IIT_PTR_TO_ELT = 33,
IIT_VEC_OF_ANYPTRS_TO_ELT = 34, IIT_VEC_OF_ANYPTRS_TO_ELT = 34,
IIT_I128 = 35, IIT_I128 = 35,
IIT_V512 = 36, IIT_V512 = 36,
IIT_V1024 = 37, IIT_V1024 = 37,
IIT_STRUCT6 = 38, IIT_STRUCT6 = 38,
IIT_STRUCT7 = 39, IIT_STRUCT7 = 39,
IIT_STRUCT8 = 40, IIT_STRUCT8 = 40,
IIT_F128 = 41, IIT_F128 = 41,
IIT_VEC_ELEMENT = 42, IIT_VEC_ELEMENT = 42,
IIT_SCALABLE_VEC = 43, IIT_SCALABLE_VEC = 43,
IIT_SUBDIVIDE2_ARG = 44, IIT_SUBDIVIDE2_ARG = 44,
IIT_SUBDIVIDE4_ARG = 45, IIT_SUBDIVIDE4_ARG = 45,
IIT_VEC_OF_BITCASTS_TO_INT = 46, IIT_VEC_OF_BITCASTS_TO_INT = 46,
IIT_V128 = 47, IIT_V128 = 47,
IIT_BF16 = 48, IIT_BF16 = 48,
IIT_STRUCT9 = 49, IIT_STRUCT9 = 49,
IIT_V256 = 50, IIT_V256 = 50,
IIT_AMX = 51, IIT_AMX = 51,
IIT_PPCF128 = 52, IIT_PPCF128 = 52,
IIT_V3 = 53, IIT_V3 = 53,
IIT_EXTERNREF = 54, IIT_EXTERNREF = 54,
IIT_FUNCREF = 55, IIT_FUNCREF = 55,
IIT_ANYPTR_TO_ELT = 56, IIT_ANYPTR_TO_ELT = 56,
IIT_I2 = 57,
IIT_I4 = 58,
}; };
static void DecodeIITType(unsigned &NextElt, ArrayRef<unsigned char> Infos, static void DecodeIITType(unsigned &NextElt, ArrayRef<unsigned char> Infos,
IIT_Info LastInfo, IIT_Info LastInfo,
SmallVectorImpl<Intrinsic::IITDescriptor> &OutputTable) { SmallVectorImpl<Intrinsic::IITDescriptor> &OutputTable) {
using namespace Intrinsic; using namespace Intrinsic;
bool IsScalableVector = (LastInfo == IIT_SCALABLE_VEC); bool IsScalableVector = (LastInfo == IIT_SCALABLE_VEC);
Show All 36 Lines case IIT_F128:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::Quad, 0)); OutputTable.push_back(IITDescriptor::get(IITDescriptor::Quad, 0));
return; return;
case IIT_PPCF128: case IIT_PPCF128:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::PPCQuad, 0)); OutputTable.push_back(IITDescriptor::get(IITDescriptor::PPCQuad, 0));
return; return;
case IIT_I1: case IIT_I1:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::Integer, 1)); OutputTable.push_back(IITDescriptor::get(IITDescriptor::Integer, 1));
return; return;
case IIT_I2:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::Integer, 2));
return;
case IIT_I4:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::Integer, 4));
return;
case IIT_I8: case IIT_I8:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::Integer, 8)); OutputTable.push_back(IITDescriptor::get(IITDescriptor::Integer, 8));
return; return;
case IIT_I16: case IIT_I16:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::Integer,16)); OutputTable.push_back(IITDescriptor::get(IITDescriptor::Integer,16));
return; return;
case IIT_I32: case IIT_I32:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::Integer, 32)); OutputTable.push_back(IITDescriptor::get(IITDescriptor::Integer, 32));
▲ Show 20 Lines • Show All 997 Lines • Show Last 20 Lines

llvm/utils/TableGen/CodeGenTarget.cpp

Show First 20 Lines • Show All 50 Lines • ▼ Show 20 LinesStringRef llvm::getName(MVT::SimpleValueType T) {
default: return getEnumName(T); default: return getEnumName(T);
} }
} }
StringRef llvm::getEnumName(MVT::SimpleValueType T) { StringRef llvm::getEnumName(MVT::SimpleValueType T) {
switch (T) { switch (T) {
case MVT::Other: return "MVT::Other"; case MVT::Other: return "MVT::Other";
case MVT::i1: return "MVT::i1"; case MVT::i1: return "MVT::i1";
case MVT::i2:
craig.topperUnsubmitted
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Keep the formatting consistent with existing code

craig.topper: Keep the formatting consistent with existing code
hgrevingAuthorUnsubmitted
Done
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Sorry my clang-format did that, need to check my upstream setup.

hgreving: Sorry my clang-format did that, need to check my upstream setup.
return "MVT::i2";
case MVT::i4:
return "MVT::i4";
case MVT::i8: return "MVT::i8"; case MVT::i8: return "MVT::i8";
case MVT::i16: return "MVT::i16"; case MVT::i16: return "MVT::i16";
case MVT::i32: return "MVT::i32"; case MVT::i32: return "MVT::i32";
case MVT::i64: return "MVT::i64"; case MVT::i64: return "MVT::i64";
case MVT::i128: return "MVT::i128"; case MVT::i128: return "MVT::i128";
case MVT::Any: return "MVT::Any"; case MVT::Any: return "MVT::Any";
case MVT::iAny: return "MVT::iAny"; case MVT::iAny: return "MVT::iAny";
case MVT::fAny: return "MVT::fAny"; case MVT::fAny: return "MVT::fAny";
Show All 16 LinesStringRef llvm::getEnumName(MVT::SimpleValueType T) {
case MVT::v8i1: return "MVT::v8i1"; case MVT::v8i1: return "MVT::v8i1";
case MVT::v16i1: return "MVT::v16i1"; case MVT::v16i1: return "MVT::v16i1";
case MVT::v32i1: return "MVT::v32i1"; case MVT::v32i1: return "MVT::v32i1";
case MVT::v64i1: return "MVT::v64i1"; case MVT::v64i1: return "MVT::v64i1";
case MVT::v128i1: return "MVT::v128i1"; case MVT::v128i1: return "MVT::v128i1";
case MVT::v256i1: return "MVT::v256i1"; case MVT::v256i1: return "MVT::v256i1";
case MVT::v512i1: return "MVT::v512i1"; case MVT::v512i1: return "MVT::v512i1";
case MVT::v1024i1: return "MVT::v1024i1"; case MVT::v1024i1: return "MVT::v1024i1";
case MVT::v128i2:
return "MVT::v128i2";
craig.topperUnsubmitted
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Same here

craig.topper: Same here
case MVT::v64i4:
return "MVT::v64i4";
case MVT::v1i8: return "MVT::v1i8"; case MVT::v1i8: return "MVT::v1i8";
case MVT::v2i8: return "MVT::v2i8"; case MVT::v2i8: return "MVT::v2i8";
case MVT::v4i8: return "MVT::v4i8"; case MVT::v4i8: return "MVT::v4i8";
case MVT::v8i8: return "MVT::v8i8"; case MVT::v8i8: return "MVT::v8i8";
case MVT::v16i8: return "MVT::v16i8"; case MVT::v16i8: return "MVT::v16i8";
case MVT::v32i8: return "MVT::v32i8"; case MVT::v32i8: return "MVT::v32i8";
case MVT::v64i8: return "MVT::v64i8"; case MVT::v64i8: return "MVT::v64i8";
case MVT::v128i8: return "MVT::v128i8"; case MVT::v128i8: return "MVT::v128i8";
▲ Show 20 Lines • Show All 825 Lines • Show Last 20 Lines

llvm/utils/TableGen/IntrinsicEmitter.cpp

Show First 20 Lines • Show All 190 Lines • ▼ Show 20 Linesvoid IntrinsicEmitter::EmitIntrinsicToOverloadTable(
OS << "#endif\n\n"; OS << "#endif\n\n";
} }
// NOTE: This must be kept in synch with the copy in lib/IR/Function.cpp! // NOTE: This must be kept in synch with the copy in lib/IR/Function.cpp!
enum IIT_Info { enum IIT_Info {
// Common values should be encoded with 0-15. // Common values should be encoded with 0-15.
IIT_Done = 0, IIT_Done = 0,
IIT_I1 = 1, IIT_I1 = 1,
IIT_I8 = 2, IIT_I8 = 2,
IIT_I16 = 3, IIT_I16 = 3,
IIT_I32 = 4, IIT_I32 = 4,
IIT_I64 = 5, IIT_I64 = 5,
IIT_F16 = 6, IIT_F16 = 6,
IIT_F32 = 7, IIT_F32 = 7,
IIT_F64 = 8, IIT_F64 = 8,
IIT_V2 = 9, IIT_V2 = 9,
IIT_V4 = 10, IIT_V4 = 10,
IIT_V8 = 11, IIT_V8 = 11,
IIT_V16 = 12, IIT_V16 = 12,
IIT_V32 = 13, IIT_V32 = 13,
IIT_PTR = 14, IIT_PTR = 14,
IIT_ARG = 15, IIT_ARG = 15,
// Values from 16+ are only encodable with the inefficient encoding. // Values from 16+ are only encodable with the inefficient encoding.
IIT_V64 = 16, IIT_V64 = 16,
IIT_MMX = 17, IIT_MMX = 17,
IIT_TOKEN = 18, IIT_TOKEN = 18,
IIT_METADATA = 19, IIT_METADATA = 19,
IIT_EMPTYSTRUCT = 20, IIT_EMPTYSTRUCT = 20,
IIT_STRUCT2 = 21, IIT_STRUCT2 = 21,
IIT_STRUCT3 = 22, IIT_STRUCT3 = 22,
IIT_STRUCT4 = 23, IIT_STRUCT4 = 23,
IIT_STRUCT5 = 24, IIT_STRUCT5 = 24,
IIT_EXTEND_ARG = 25, IIT_EXTEND_ARG = 25,
IIT_TRUNC_ARG = 26, IIT_TRUNC_ARG = 26,
IIT_ANYPTR = 27, IIT_ANYPTR = 27,
IIT_V1 = 28, IIT_V1 = 28,
IIT_VARARG = 29, IIT_VARARG = 29,
IIT_HALF_VEC_ARG = 30, IIT_HALF_VEC_ARG = 30,
IIT_SAME_VEC_WIDTH_ARG = 31, IIT_SAME_VEC_WIDTH_ARG = 31,
IIT_PTR_TO_ARG = 32, IIT_PTR_TO_ARG = 32,
IIT_PTR_TO_ELT = 33, IIT_PTR_TO_ELT = 33,
IIT_VEC_OF_ANYPTRS_TO_ELT = 34, IIT_VEC_OF_ANYPTRS_TO_ELT = 34,
IIT_I128 = 35, IIT_I128 = 35,
IIT_V512 = 36, IIT_V512 = 36,
IIT_V1024 = 37, IIT_V1024 = 37,
IIT_STRUCT6 = 38, IIT_STRUCT6 = 38,
IIT_STRUCT7 = 39, IIT_STRUCT7 = 39,
IIT_STRUCT8 = 40, IIT_STRUCT8 = 40,
IIT_F128 = 41, IIT_F128 = 41,
IIT_VEC_ELEMENT = 42, IIT_VEC_ELEMENT = 42,
IIT_SCALABLE_VEC = 43, IIT_SCALABLE_VEC = 43,
IIT_SUBDIVIDE2_ARG = 44, IIT_SUBDIVIDE2_ARG = 44,
IIT_SUBDIVIDE4_ARG = 45, IIT_SUBDIVIDE4_ARG = 45,
IIT_VEC_OF_BITCASTS_TO_INT = 46, IIT_VEC_OF_BITCASTS_TO_INT = 46,
IIT_V128 = 47, IIT_V128 = 47,
IIT_BF16 = 48, IIT_BF16 = 48,
IIT_STRUCT9 = 49, IIT_STRUCT9 = 49,
IIT_V256 = 50, IIT_V256 = 50,
IIT_AMX = 51, IIT_AMX = 51,
IIT_PPCF128 = 52, IIT_PPCF128 = 52,
IIT_V3 = 53, IIT_V3 = 53,
IIT_EXTERNREF = 54, IIT_EXTERNREF = 54,
IIT_FUNCREF = 55, IIT_FUNCREF = 55,
IIT_ANYPTR_TO_ELT = 56, IIT_ANYPTR_TO_ELT = 56,
IIT_I2 = 57,
IIT_I4 = 58,
}; };
static void EncodeFixedValueType(MVT::SimpleValueType VT, static void EncodeFixedValueType(MVT::SimpleValueType VT,
std::vector<unsigned char> &Sig) { std::vector<unsigned char> &Sig) {
if (MVT(VT).isInteger()) { if (MVT(VT).isInteger()) {
unsigned BitWidth = MVT(VT).getFixedSizeInBits(); unsigned BitWidth = MVT(VT).getFixedSizeInBits();
switch (BitWidth) { switch (BitWidth) {
default: PrintFatalError("unhandled integer type width in intrinsic!"); default: PrintFatalError("unhandled integer type width in intrinsic!");
Show All 21 Linesstatic void EncodeFixedValueType(MVT::SimpleValueType VT,
// MVT::OtherVT is used to mean the empty struct type here. // MVT::OtherVT is used to mean the empty struct type here.
case MVT::Other: return Sig.push_back(IIT_EMPTYSTRUCT); case MVT::Other: return Sig.push_back(IIT_EMPTYSTRUCT);
// MVT::isVoid is used to represent varargs here. // MVT::isVoid is used to represent varargs here.
case MVT::isVoid: return Sig.push_back(IIT_VARARG); case MVT::isVoid: return Sig.push_back(IIT_VARARG);
case MVT::externref: case MVT::externref:
return Sig.push_back(IIT_EXTERNREF); return Sig.push_back(IIT_EXTERNREF);
case MVT::funcref: case MVT::funcref:
return Sig.push_back(IIT_FUNCREF); return Sig.push_back(IIT_FUNCREF);
case MVT::i2:
return Sig.push_back(IIT_I2);
case MVT::i4:
return Sig.push_back(IIT_I4);
} }
} }
#if defined(_MSC_VER) && !defined(__clang__) #if defined(_MSC_VER) && !defined(__clang__)
#pragma optimize("",off) // MSVC 2015 optimizer can't deal with this function. #pragma optimize("",off) // MSVC 2015 optimizer can't deal with this function.
#endif #endif
static void EncodeFixedType(Record *R, std::vector<unsigned char> &ArgCodes, static void EncodeFixedType(Record *R, std::vector<unsigned char> &ArgCodes,
▲ Show 20 Lines • Show All 667 Lines • Show Last 20 Lines