This is an archive of the discontinued LLVM Phabricator instance.

Differential D124809

AMDGPU: Remove redundant call to MachineInstrBuilder::setMBB
ClosedPublic

Authored by nhaehnle on May 2 2022, 3:54 PM.

Details

Reviewers
arsenm
foad
tsymalla
Commits
rG8b42e6d057ed: AMDGPU: Remove redundant call to MachineInstrBuilder::setMBB
Summary

setInstrAndDebugLoc also sets the basic block automatically.

Diff Detail

Event Timeline

nhaehnle created this revision.May 2 2022, 3:54 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 2 2022, 3:54 PM
Herald added subscribers: hsmhsm, kerbowa, hiraditya and 6 others. · View Herald Transcript
nhaehnle requested review of this revision.May 2 2022, 3:54 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 2 2022, 3:54 PM
Herald added a subscriber: wdng. · View Herald Transcript
Harbormaster completed remote builds in B162343: Diff 426537.May 2 2022, 4:39 PM
foad accepted this revision.May 3 2022, 3:41 AM

Looks obviously fine (assuming it works!).

This revision is now accepted and ready to land.May 3 2022, 3:41 AM
This revision was landed with ongoing or failed builds.May 3 2022, 5:49 AM
Closed by commit rG8b42e6d057ed: AMDGPU: Remove redundant call to MachineInstrBuilder::setMBB (authored by nhaehnle). · Explain Why
This revision was automatically updated to reflect the committed changes.
nhaehnle added a commit: rG8b42e6d057ed: AMDGPU: Remove redundant call to MachineInstrBuilder::setMBB.

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
1 line

Diff 426673

llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp

Show First 20 Lines • Show All 120 Lines • ▼ Show 20 Lines
void AMDGPUPreLegalizerCombinerHelper::applyClampI64ToI16( void AMDGPUPreLegalizerCombinerHelper::applyClampI64ToI16(
MachineInstr &MI, const ClampI64ToI16MatchInfo &MatchInfo) { MachineInstr &MI, const ClampI64ToI16MatchInfo &MatchInfo) {
Register Src = MatchInfo.Origin; Register Src = MatchInfo.Origin;
assert(MI.getParent()->getParent()->getRegInfo().getType(Src) == assert(MI.getParent()->getParent()->getRegInfo().getType(Src) ==
LLT::scalar(64)); LLT::scalar(64));
const LLT S32 = LLT::scalar(32); const LLT S32 = LLT::scalar(32);
B.setMBB(*MI.getParent());
B.setInstrAndDebugLoc(MI); B.setInstrAndDebugLoc(MI);
auto Unmerge = B.buildUnmerge(S32, Src); auto Unmerge = B.buildUnmerge(S32, Src);
assert(MI.getOpcode() != AMDGPU::G_AMDGPU_CVT_PK_I16_I32); assert(MI.getOpcode() != AMDGPU::G_AMDGPU_CVT_PK_I16_I32);
const LLT V2S16 = LLT::fixed_vector(2, 16); const LLT V2S16 = LLT::fixed_vector(2, 16);
auto CvtPk = auto CvtPk =
▲ Show 20 Lines • Show All 165 Lines • Show Last 20 Lines