[X86][AMX] Report error when shapes are not pre-defined.

[LuoYuanke]

Summary

Instead of report fatal error, this patch emit error message and exit
when shapes are not pre-defined.

[LuoYuanke]

llvm/test/CodeGen/X86/AMX/amx_error.ll

1

Will update the case.

[LuoYuanke]

Update test case.

[pengfei]

llvm/lib/Target/X86/X86PreTileConfig.cpp

52

Any benefit to use exit? I found we seldom use it in the code.

llvm/test/CodeGen/X86/AMX/amx-error.ll

8 ↗

(On Diff #424775)

Doesn't it success without this patch? https://godbolt.org/z/qvKcE3bzK

[LuoYuanke]

llvm/test/CodeGen/X86/AMX/amx-error.ll

8 ↗

(On Diff #424775)

Previously it would crash and remind user to submit a bug report. It is not good experience for user.

[LuoYuanke]

llvm/lib/Target/X86/X86PreTileConfig.cpp

52

Ok, let's depend on emitError to handle the error. Let me remove exit.

[LuoYuanke]

Address Phoebe's comments.

[xiangzhangllvm]

llvm/lib/Target/X86/X86PreTileConfig.cpp

317–318

I think we should stop compiling or at lest let it not generate out file.
Because the error message may be redirect to a log file. Users may not check it.

[LuoYuanke]

llvm/lib/Target/X86/X86PreTileConfig.cpp

317–318

The error handler would indicate compiler not generate out file. If there is no error handler, compiler would exit. Pls try clang or llc.
As Phoebe mentions, exit is not a normal way in backend, so I just let the compiling continue but the tile config doesn't happen. Finally compiler would remove the output file.

[xiangzhangllvm]

LGTM

llvm/lib/Target/X86/X86PreTileConfig.cpp

 #include "X86.h"
 #include "X86InstrBuilder.h"
 #include "X86MachineFunctionInfo.h"
 #include "X86RegisterInfo.h"
 #include "X86Subtarget.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineLoopInfo.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
 #include "llvm/CodeGen/TargetRegisterInfo.h"
 #include "llvm/InitializePasses.h"
 
 using namespace llvm;
 
 #define DEBUG_TYPE "tile-pre-config"
-#define REPORT_CONFIG_FAIL                                                     \
-  report_fatal_error(                                                          \
-      MF.getName() +                                                           \
-      ": Failed to config tile register, please define the shape earlier");
+
+static void emitErrorMsg(MachineFunction &MF) {
+  SmallString<32> Str;
+  Twine ErrorMsg =
+      MF.getName() +
+      ": Failed to config tile register, please define the shape earlier";
+  LLVMContext &Context = MF.getMMI().getModule()->getContext();
+  Context.emitError(ErrorMsg);
+  exit(1);
+}
 
 namespace {
 
 struct MIRef {
   MachineInstr *MI = nullptr;
   MachineBasicBlock *MBB = nullptr;
   // A virtual position for instruction that will be inserted after MI.
   size_t Pos = 0;
if (CfgNeedInsert.empty())
     return false;
   X86FI->setHasVirtualTileReg(true);
 
   // Avoid to insert ldtilecfg before any shape defs.
   SmallVector<MachineBasicBlock *, 8> WorkList;
   for (auto &I : ShapeBBs) {
     // TODO: We can hoist shapes across BBs here.
     if (BBVisitedInfo[I.first].HasAMXRegLiveIn)
-      REPORT_CONFIG_FAIL
+      emitErrorMsg(MF);
     if (BBVisitedInfo[I.first].FirstAMX &&
         BBVisitedInfo[I.first].FirstAMX < I.second.back() &&
         !hoistShapesInBB(I.first, I.second))
-      REPORT_CONFIG_FAIL
+      emitErrorMsg(MF);
     WorkList.push_back(I.first);
   }
   while (!WorkList.empty()) {
     MachineBasicBlock *MBB = WorkList.pop_back_val();
     for (auto *Pred : MBB->predecessors()) {
       if (!BBVisitedInfo[Pred].TileCfgForbidden && !isLoopBackEdge(MBB, Pred)) {
         BBVisitedInfo[Pred].TileCfgForbidden = true;
         WorkList.push_back(Pred);
       }

llvm/test/CodeGen/X86/AMX/amx_error.ll

+@row = dso_local global i16 8, align 2
+@col = dso_local global i16 8, align 2
+
+define dso_local void @add() {
+entry:
+  %t0 = load i16, ptr @row, align 2
+  %t1 = call x86_amx @llvm.x86.tilezero.internal(i16 %t0, i16 64)
+  %t2 = load i16, ptr @col, align 2
+  %t3 = call x86_amx @llvm.x86.tilezero.internal(i16 16, i16 %t2)
+  ret void
+}
+
+declare x86_amx @llvm.x86.tilezero.internal(i16, i16)