[AMDGPU][MC][NFC][GFX940] Corrected an error position

[rampitec]

LGTM

llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

if (!(TSFlags & SIInstrFlags::MIMG) && !(CPol & CPol::GLC)) {
       Error(IDLoc, isGFX940() ? "instruction must use sc0"
                               : "instruction must use glc");
       return false;
     }
   } else {
     if (CPol & CPol::GLC) {
       SMLoc S = getImmLoc(AMDGPUOperand::ImmTyCPol, Operands);
       StringRef CStr(S.getPointer());
-      S = SMLoc::getFromPointer(&CStr.data()[CStr.find("glc")]);
+      S = SMLoc::getFromPointer(
+          &CStr.data()[CStr.find(isGFX940() ? "sc0" : "glc")]);
       Error(S, isGFX940() ? "instruction must not use sc0"
                           : "instruction must not use glc");
       return false;
     }
   }
 
   return true;
 }

llvm/test/MC/AMDGPU/gfx940_err_pos.s

+// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
+
+//==============================================================================
+// instruction must not use sc0
+
+global_atomic_or v[0:1], v2, off sc1 nt sc0
+// CHECK: error: instruction must not use sc0
+// CHECK-NEXT:{{^}}global_atomic_or v[0:1], v2, off sc1 nt sc0
+// CHECK-NEXT:{{^}}                                        ^
+
+global_atomic_or v[0:1], v2, off sc0 sc1 nt
+// CHECK: error: instruction must not use sc0
+// CHECK-NEXT:{{^}}global_atomic_or v[0:1], v2, off sc0 sc1 nt
+// CHECK-NEXT:{{^}}                                 ^