llvm-reduce: Simplify virtual register cloning

[arsenm]

Summary

Just clone all the virtual registers instead of looking for def
operands. This preserves the register values used, simplifying the
rest of the code. This avoids needing to expose the register map to
target code.

[arsenm]

7b57ef670c64e31bbaa19ae9a3acf0d3ed7f5e73

llvm/tools/llvm-reduce/ReducerWorkItem.cpp

static void cloneFrameInfo(
   }
 }
 
 static std::unique_ptr<MachineFunction> cloneMF(MachineFunction *SrcMF) {
   auto DstMF = std::make_unique<MachineFunction>(
       SrcMF->getFunction(), SrcMF->getTarget(), SrcMF->getSubtarget(),
       SrcMF->getFunctionNumber(), SrcMF->getMMI());
   DenseMap<MachineBasicBlock *, MachineBasicBlock *> Src2DstMBB;
-  DenseMap<Register, Register> Src2DstReg;
 
   auto *SrcMRI = &SrcMF->getRegInfo();
   auto *DstMRI = &DstMF->getRegInfo();
 
   // Clone blocks.
   for (MachineBasicBlock &SrcMBB : *SrcMF)
     Src2DstMBB[&SrcMBB] = DstMF->CreateMachineBasicBlock();
 
   const MachineFrameInfo &SrcMFI = SrcMF->getFrameInfo();
   MachineFrameInfo &DstMFI = DstMF->getFrameInfo();
 
   // Copy stack objects and other info
   cloneFrameInfo(DstMFI, SrcMFI, Src2DstMBB);
 
   // Remap the debug info frame index references.
   DstMF->VariableDbgInfos = SrcMF->VariableDbgInfos;
 
   // FIXME: Need to clone MachineFunctionInfo, which may also depend on frame
   // index and block mapping.
+  // Clone virtual registers
+  for (unsigned I = 0, E = SrcMRI->getNumVirtRegs(); I != E; ++I) {
+    Register Reg = Register::index2VirtReg(I);
+    Register NewReg = DstMRI->createIncompleteVirtualRegister(
+      SrcMRI->getVRegName(Reg));
+    assert(NewReg == Reg && "expected to preserve virtreg number");
 
-  // Create vregs.
-  for (auto &SrcMBB : *SrcMF) {
-    for (auto &SrcMI : SrcMBB) {
-      for (unsigned I = 0, E = SrcMI.getNumOperands(); I < E; ++I) {
-        auto &DMO = SrcMI.getOperand(I);
-        if (DMO.isRegMask()) {
-          DstMRI->addPhysRegsUsedFromRegMask(DMO.getRegMask());
-          continue;
-        }
-
-        if (!DMO.isReg())
-          continue;
-        Register SrcReg = DMO.getReg();
-        if (Register::isPhysicalRegister(SrcReg))
-          continue;
-
-        if (Src2DstReg.find(SrcReg) != Src2DstReg.end())
-          continue;
-
-        Register DstReg = DstMRI->createIncompleteVirtualRegister(
-            SrcMRI->getVRegName(SrcReg));
-        DstMRI->setRegClassOrRegBank(DstReg,
-                                     SrcMRI->getRegClassOrRegBank(SrcReg));
+    DstMRI->setRegClassOrRegBank(NewReg, SrcMRI->getRegClassOrRegBank(Reg));
 
-        LLT RegTy = SrcMRI->getType(SrcReg);
-        if (RegTy.isValid())
-          DstMRI->setType(DstReg, RegTy);
-        Src2DstReg[SrcReg] = DstReg;
-      }
-    }
-  }
+    LLT RegTy = SrcMRI->getType(Reg);
+      DstMRI->setType(NewReg, RegTy);
 
     // Copy register allocation hints.
-  for (std::pair<Register, Register> RegMapEntry : Src2DstReg) {
-    const auto &Hints = SrcMRI->getRegAllocationHints(RegMapEntry.first);
-    for (Register PrefReg : Hints.second) {
-      if (PrefReg.isVirtual()) {
-        auto PrefRegEntry = Src2DstReg.find(PrefReg);
-        assert(PrefRegEntry !=Src2DstReg.end());
-        DstMRI->addRegAllocationHint(RegMapEntry.second, PrefRegEntry->second);
-      } else
-        DstMRI->addRegAllocationHint(RegMapEntry.second, PrefReg);
-    }
+    const auto &Hints = SrcMRI->getRegAllocationHints(Reg);
+    for (Register PrefReg : Hints.second)
+      DstMRI->addRegAllocationHint(NewReg, PrefReg);
   }
 
   // Link blocks.
   for (auto &SrcMBB : *SrcMF) {
     auto *DstMBB = Src2DstMBB[&SrcMBB];
     DstMF->push_back(DstMBB);
     for (auto It = SrcMBB.succ_begin(), IterEnd = SrcMBB.succ_end();
          It != IterEnd; ++It) {
       auto *SrcSuccMBB = *It;
       auto *DstSuccMBB = Src2DstMBB[SrcSuccMBB];
       DstMBB->addSuccessor(DstSuccMBB);
     }
     for (auto &LI : SrcMBB.liveins())
       DstMBB->addLiveIn(LI);
   }
+
   // Clone instructions.
   for (auto &SrcMBB : *SrcMF) {
     auto *DstMBB = Src2DstMBB[&SrcMBB];
     for (auto &SrcMI : SrcMBB) {
       const auto &MCID =
           DstMF->getSubtarget().getInstrInfo()->get(SrcMI.getOpcode());
       auto *DstMI = DstMF->CreateMachineInstr(MCID, SrcMI.getDebugLoc(),
                                               /*NoImplicit=*/true);
       DstMBB->push_back(DstMI);
       for (auto &SrcMO : SrcMI.operands()) {
         MachineOperand DstMO(SrcMO);
         DstMO.clearParent();
-        // Update vreg.
-        if (DstMO.isReg() && Src2DstReg.count(DstMO.getReg())) {
-          DstMO.setReg(Src2DstReg[DstMO.getReg()]);
-        }
+
         // Update MBB.
-        if (DstMO.isMBB()) {
+        if (DstMO.isMBB())
           DstMO.setMBB(Src2DstMBB[DstMO.getMBB()]);
-        }
+        else if (DstMO.isRegMask())
+          DstMRI->addPhysRegsUsedFromRegMask(DstMO.getRegMask());
 
         DstMI->addOperand(DstMO);
       }
       DstMI->setMemRefs(*DstMF, SrcMI.memoperands());
     }
   }
 
   DstMF->setAlignment(SrcMF->getAlignment());