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markus (Markus Lavin)
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Nov 19 2018, 1:12 AM (134 w, 4 d)

Recent Activity

Tue, Jun 15

markus updated the diff for D103316: Hoist llvm.assume into single predecessor if block otherwise empty.

Updated to address (some) review comments, clang-tidy warnings and taking the Succ->getSinglePredecessor() condition into account to avoid duplication of instructions.

Tue, Jun 15, 2:54 AM · Restricted Project
markus added a comment to D103316: Hoist llvm.assume into single predecessor if block otherwise empty.

Thanks @bjope for the input. I do share your concern. While I think we all agree that SimplifyCFG is the right place for this kind of transformation the steps that would follow acceptance and landing of the current patch do not seem to directly lead to being able to remove the unconditional assume elimination from CodeGenPrepare. At least not without possibly introducing other degradation as there may be other transformation that have run in between and now put assumes in inconvenient places. As pointed out by @bjope.

Tue, Jun 15, 2:46 AM · Restricted Project

Tue, Jun 8

markus updated the diff for D103316: Hoist llvm.assume into single predecessor if block otherwise empty.

Is this the way we want to integrate into SimplifyCFG? Currently only tested with the supplied lit-test.

Tue, Jun 8, 7:33 AM · Restricted Project

Mon, Jun 7

markus added a comment to D103316: Hoist llvm.assume into single predecessor if block otherwise empty.

My own opinion is closer to that of @nikic. I think we should not be letting assumes block transforms. We should attempt to salvage assume information where we can, but only on a best effort basis. I do think we should generate the assume(A || B) form if that's the logical salvage even if nothing currently can infer from that.

Unsure if I got it right or wrong before but what you said last is what I like too. Salvage assumes in blocks we want to remove if possible. At the same time, "ignore" assumes when the decision for transformations are made.

Mon, Jun 7, 3:30 AM · Restricted Project

Mon, May 31

markus updated the diff for D103316: Hoist llvm.assume into single predecessor if block otherwise empty.

Since there seem to be agreement on the placement in SimplifyCFG the code has been moved there.

Mon, May 31, 1:01 AM · Restricted Project

Fri, May 28

markus abandoned D103242: [WIP] Don't delete all llvm.assume instructions in codegenprepare.

Abandoned in favor of D103316.

Fri, May 28, 6:39 AM · Restricted Project
markus requested review of D103316: Hoist llvm.assume into single predecessor if block otherwise empty.
Fri, May 28, 6:38 AM · Restricted Project

Thu, May 27

markus requested review of D103242: [WIP] Don't delete all llvm.assume instructions in codegenprepare.
Thu, May 27, 5:08 AM · Restricted Project

May 19 2021

markus added a comment to D101064: [WIP] improve debug-info in stack-slot-coloring.

Sounds good to me, again there's a small risk that legitimate locations will be terminated when they shouldn't. But, we'll still be able to make an educated judgement about whether it's worth it.

May 19 2021, 10:45 PM · Restricted Project

Apr 29 2021

markus added a comment to D101064: [WIP] improve debug-info in stack-slot-coloring.

Looks good as a starting place -- I took this for test drive, see inline comments. On a clang-3.4 build, the "PC ranges covered" statistic ticks down from 66% to 65%, however I believe that's due to rounding. Using llvm-locstats, roughly six thousand variables move out of the 100% covered bucket, or about 0.2% of all variables in clang-3.4. 0% covered goes up by a negligible amount. In my opinion: this is a reasonable sacrifice to make in the name of accuracy, and some of those dropped locations will be incorrect. Plus, there's a longer term plan for not needing this.

Apr 29 2021, 1:05 AM · Restricted Project

Apr 28 2021

markus updated the diff for D101064: [WIP] improve debug-info in stack-slot-coloring.

Prototype of the 'terminate debug-info for slots when they go out of liveness, before being merged' idea in the TR.

Apr 28 2021, 2:28 AM · Restricted Project

Apr 23 2021

markus updated the summary of D101064: [WIP] improve debug-info in stack-slot-coloring.
Apr 23 2021, 12:14 AM · Restricted Project

Apr 22 2021

markus requested review of D101064: [WIP] improve debug-info in stack-slot-coloring.
Apr 22 2021, 6:56 AM · Restricted Project

Apr 7 2021

markus accepted D98644: [DebugInfo] Fix incorrect handling of variadic salvaging in Loop Strength Reduce.
Apr 7 2021, 7:54 AM · Restricted Project, debug-info
markus added a comment to D98644: [DebugInfo] Fix incorrect handling of variadic salvaging in Loop Strength Reduce.

Thanks for the test case. I have verified that it fails as expected without this patch (with D91722 applied).

Apr 7 2021, 5:35 AM · Restricted Project, debug-info

Apr 6 2021

markus added a comment to D98644: [DebugInfo] Fix incorrect handling of variadic salvaging in Loop Strength Reduce.

Sorry for the delay, have been on parental leave. Will look at this later today or tomorrow.

Apr 6 2021, 3:41 AM · Restricted Project, debug-info

Jan 29 2021

markus added a comment to D94964: [LangRef] Describe memory layout for vectors types.

Added code owners for big-endian Sparc, PPC and MIPS as reviewers.

Jan 29 2021, 2:55 AM · Restricted Project
markus added reviewers for D94964: [LangRef] Describe memory layout for vectors types: nemanjai, venkatra, atanasyan.
Jan 29 2021, 2:53 AM · Restricted Project
markus updated the diff for D94765: Expand masked mem intrinsics correctly wrt big-endian.
Jan 29 2021, 2:47 AM · Restricted Project

Jan 27 2021

markus added a comment to D94964: [LangRef] Describe memory layout for vectors types.

Right, perhaps we should add maintainers of those targets as reviewers since they may be more interested in documenting endianness differences than the little-endian crowd?

Jan 27 2021, 12:26 AM · Restricted Project

Jan 22 2021

markus added inline comments to D95117: [NewPM][opt] Run the "default" AA pipeline by default.
Jan 22 2021, 8:23 AM · Restricted Project

Jan 21 2021

markus added a comment to D94964: [LangRef] Describe memory layout for vectors types.

That makes sense to me but before acting on it we should probably wait a while to see if the other reviewers have some feedback.

Jan 21 2021, 12:33 AM · Restricted Project

Jan 19 2021

markus requested review of D94964: [LangRef] Describe memory layout for vectors types.
Jan 19 2021, 5:07 AM · Restricted Project

Jan 18 2021

markus added a comment to D94867: [ARM] Make a BE predicate bitcast consistent with the rest of llvm.

Yes, but that is base ARM and it is only MVE that is incorrect. You can see here that things were inconsistent, which is what this patch is fixing:
https://godbolt.org/z/M8Y6dv

Jan 18 2021, 3:03 AM · Restricted Project

Jan 17 2021

markus added a comment to D94867: [ARM] Make a BE predicate bitcast consistent with the rest of llvm.

We were storing predicate registers, such as a <8 x i1>, in the opposite order to how the rest of llvm expects.

Jan 17 2021, 11:46 PM · Restricted Project
markus added a comment to D94765: Expand masked mem intrinsics correctly wrt big-endian.

Thanks for the patch. There is a patch to make MVE consistent with the rest of MVE in D94867. This will need rebasing on top of that, with update tests to make the two consistent again.

Jan 17 2021, 11:32 PM · Restricted Project

Jan 15 2021

markus requested review of D94765: Expand masked mem intrinsics correctly wrt big-endian.
Jan 15 2021, 4:37 AM · Restricted Project

Jan 13 2021

markus added a comment to D93946: [FuncAttrs] Infer noreturn.

Not terribly important but isn't

Jan 13 2021, 6:14 AM · Restricted Project
markus committed rGf8cece186305: [ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/ (authored by markus).
[ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/
Jan 13 2021, 4:40 AM
markus closed D94494: canCreateUndefOrPoison: dyn_cast -> dyn_cast_or_null.
Jan 13 2021, 4:40 AM · Restricted Project
markus added a comment to D94494: canCreateUndefOrPoison: dyn_cast -> dyn_cast_or_null.

Thanks!
Yes, a test should be added.
I guess

ashr <4 x i16> %induction, select (i1 icmp sgt (i16 ptrtoint (i16* @c to i16), i16 1), <4 x i16> zeroinitializer, <4 x i16> <i16 ptrtoint (i16* @c to i16), i16 ptrtoint (i16* @c to i16), i16 ptrtoint (i16* @c to i16), i16 ptrtoint (i16* @c to i16)>)

is the problematic part?
If it is non-trivial to further reduce the input, you can also add this instruction to the list at ValueTrackingTest.cpp 's TEST(ValueTracking, canCreatePoisonOrUndef).

Jan 13 2021, 1:28 AM · Restricted Project
markus updated the diff for D94494: canCreateUndefOrPoison: dyn_cast -> dyn_cast_or_null.

Added test.

Jan 13 2021, 1:23 AM · Restricted Project

Jan 12 2021

markus updated the summary of D94494: canCreateUndefOrPoison: dyn_cast -> dyn_cast_or_null.
Jan 12 2021, 6:58 AM · Restricted Project
markus added a comment to D94494: canCreateUndefOrPoison: dyn_cast -> dyn_cast_or_null.

The issue was found with attached input bbi-51646.ll If necessary it could be added as a regression test but then the question is where (i.e. should it piggyback on some other file).

Jan 12 2021, 6:56 AM · Restricted Project
markus requested review of D94494: canCreateUndefOrPoison: dyn_cast -> dyn_cast_or_null.
Jan 12 2021, 6:51 AM · Restricted Project
markus raised a concern with rG4b33b2387787: Reapply "[LV] Vectorize (some) early and multiple exit loops"" w/fix for builder.

This commit seem to cause

$ opt -verify -loop-vectorize bbi-51639.ll -S
opt: /repo/elavkje/llvm-project-upstream/llvm/lib/Transforms/Utils/LoopVersioning.cpp:47: llvm::LoopVersioning::LoopVersioning(const llvm::LoopAccessInfo &, ArrayRef<llvm::RuntimePointerCheck>, llvm::Loop *, llvm::LoopInfo *, llvm::DominatorTree *, llv
m::ScalarEvolution *): Assertion `L->getExitBlock() && "No single exit block"' failed.

Jan 12 2021, 2:55 AM

Jan 4 2021

markus accepted D94016: [DebugInfo] Avoid LSR crash on large integer inputs.

Ugh, there is always some pathological case one forgets to handle. Anyway this LGTM and thanks for fixing!

Jan 4 2021, 10:05 PM · Restricted Project

Dec 14 2020

markus committed rG2a6782bb9f1d: Reland [DebugInfo] Improve dbg preservation in LSR. (authored by markus).
Reland [DebugInfo] Improve dbg preservation in LSR.
Dec 14 2020, 7:17 AM
markus closed D87494: Improve LSR debug-info.
Dec 14 2020, 7:17 AM · Restricted Project, debug-info

Dec 1 2020

markus requested review of D87494: Improve LSR debug-info.
Dec 1 2020, 8:20 AM · Restricted Project, debug-info
markus reopened D87494: Improve LSR debug-info.
Dec 1 2020, 8:19 AM · Restricted Project, debug-info
markus updated the diff for D87494: Improve LSR debug-info.

Addressing the issues with use of stored SCEV after IR had been deleted (see https://reviews.llvm.org/D91711).

Dec 1 2020, 8:19 AM · Restricted Project, debug-info
markus abandoned D91711: SCEV add function to see if SCEVUnknown is null.
Dec 1 2020, 7:51 AM · Restricted Project

Nov 27 2020

markus added a comment to D91711: SCEV add function to see if SCEVUnknown is null.

Thanks for the clarification. The offending patch has been reverted now (in 808fcfe5944755f0).

Nov 27 2020, 12:04 AM · Restricted Project

Nov 26 2020

markus added a reverting change for rG06758c6a6135: [DebugInfo] Improve dbg preservation in LSR.: rG808fcfe59447: Revert "[DebugInfo] Improve dbg preservation in LSR.".
Nov 26 2020, 11:56 PM
markus committed rG808fcfe59447: Revert "[DebugInfo] Improve dbg preservation in LSR." (authored by markus).
Revert "[DebugInfo] Improve dbg preservation in LSR."
Nov 26 2020, 11:56 PM
markus added a reverting change for D87494: Improve LSR debug-info: rG808fcfe59447: Revert "[DebugInfo] Improve dbg preservation in LSR.".
Nov 26 2020, 11:56 PM · Restricted Project, debug-info
markus added a comment to D91711: SCEV add function to see if SCEVUnknown is null.

Right, there is nothing special with llvm.dbg.value besides that it is a debug intrinsic so it is not allowed to affect optimizations and the fact that such intrinsic uses another Value may not inhibit transformation on that Value. I just wanted to point it out since the situation that predecessors of an instruction get removed without the instruction itself is a bit unusual (but otherwise unimportant for this discussion).

Nov 26 2020, 7:37 AM · Restricted Project

Nov 25 2020

markus added a comment to D91711: SCEV add function to see if SCEVUnknown is null.

Do we know at which point LSR deletes the code? To me it looks like we just forgot to call forgetLoop or smth like this somewhere.

Nov 25 2020, 4:10 AM · Restricted Project
markus added a comment to D91711: SCEV add function to see if SCEVUnknown is null.

The idea of having SCEV pointing to deleted instructions scares me. Imagine what if we had SCEVAddRecs referencing the loops we've already deleted. There is a vast field for nasty bugs caused by UB and memory corruption. I'd rather expect that we fail some assertion if we try to optimize with SCEV in that state.

Nov 25 2020, 2:02 AM · Restricted Project

Nov 23 2020

markus added reviewers for D91711: SCEV add function to see if SCEVUnknown is null: nikic, mkazantsev, lebedev.ri, jmorse.
Nov 23 2020, 11:57 PM · Restricted Project

Nov 18 2020

markus added a reviewer for D91711: SCEV add function to see if SCEVUnknown is null: reames.
Nov 18 2020, 11:40 PM · Restricted Project
markus requested review of D91711: SCEV add function to see if SCEVUnknown is null.
Nov 18 2020, 7:27 AM · Restricted Project

Oct 29 2020

markus added inline comments to D89218: [DebugInfo] Support for DW_TAG_generic_subrange.
Oct 29 2020, 2:50 AM · debug-info, Restricted Project

Oct 21 2020

markus added a comment to D89838: [DebugInfo] Fix legacy ZExt emission when FromBits >= 64 (PR47927).

Some nits below but in general looks good to me.

Oct 21 2020, 12:53 AM · Restricted Project

Oct 8 2020

markus committed rG06758c6a6135: [DebugInfo] Improve dbg preservation in LSR. (authored by markus).
[DebugInfo] Improve dbg preservation in LSR.
Oct 8 2020, 4:20 AM

Oct 6 2020

markus added a comment to D87494: Improve LSR debug-info.

@nikic, @saugustine, thanks for reverting and having a look. I did not receive any notification mail about those build-bot failures AFAICT. I got two but one failure went away on a subsequent run and the other complained about internal compiler error in g++ which seemed unrelated. Anyway I will try to reproduce locally and address the issue as suggested. Thanks again.

Oct 6 2020, 5:47 AM · Restricted Project, debug-info

Oct 5 2020

markus committed rGa3caf7f6102d: [DebugInfo] Improve dbg preservation in LSR. (authored by markus).
[DebugInfo] Improve dbg preservation in LSR.
Oct 5 2020, 12:56 AM
markus closed D87494: Improve LSR debug-info.
Oct 5 2020, 12:55 AM · Restricted Project, debug-info

Oct 1 2020

markus requested review of D87494: Improve LSR debug-info.

Really minor changes since last approved revision but I would prefer if someone gave a renewed blessing.

Oct 1 2020, 1:50 AM · Restricted Project, debug-info
markus updated the diff for D87494: Improve LSR debug-info.

Tuns out that previous "safety code" caused problems when bootstraping clang. Apparently it is not safe to do getType() on all SCEVs so instead we now store away the type information and compare on the Value instead of the SCEV.

Oct 1 2020, 1:47 AM · Restricted Project, debug-info

Sep 30 2020

markus updated the diff for D87494: Improve LSR debug-info.

Added safety code to make sure that we are comparing SCEVs of the same Type.

Sep 30 2020, 4:20 AM · Restricted Project, debug-info

Sep 29 2020

markus updated the diff for D87494: Improve LSR debug-info.
Sep 29 2020, 5:16 AM · Restricted Project, debug-info
markus updated the diff for D87494: Improve LSR debug-info.

Addressed minor comments by @bjope

Sep 29 2020, 1:14 AM · Restricted Project, debug-info

Sep 23 2020

markus added a comment to D87494: Improve LSR debug-info.

This is looking good, a few nits inline. Some slightly broader questions: do you know if there's any risk of debug-info affecting decisions made by SCEV, i.e. causing codegen to change when compiling -g? I don't have any reason to believe that could be the case, but it's a fear in the back of my mind.

Sep 23 2020, 12:20 AM · Restricted Project, debug-info

Sep 22 2020

markus updated the diff for D87494: Improve LSR debug-info.

Fixed most of the review remarks.

Sep 22 2020, 11:58 PM · Restricted Project, debug-info

Sep 21 2020

markus updated the diff for D87494: Improve LSR debug-info.

Updated with full context patch.

Sep 21 2020, 1:23 AM · Restricted Project, debug-info

Sep 15 2020

markus retitled D87494: Improve LSR debug-info from [WIP] Improve LSR debug-info to Improve LSR debug-info.
Sep 15 2020, 5:11 AM · Restricted Project, debug-info

Sep 14 2020

markus updated the diff for D87494: Improve LSR debug-info.

Change of appraoch. Instead of hooking into deleteDeadPHIs with an AboutToDeleteCallback we do a pre-pass to store a way the llvm.dbg.value of the loop as well as their SCEV expressions. After LSR has done its thing we go through those stored away llvm.dbg.value and if any of them now has an undef variable location we try to update it using its stored SCEV.

Sep 14 2020, 3:58 AM · Restricted Project, debug-info

Sep 11 2020

markus added inline comments to D87494: Improve LSR debug-info.
Sep 11 2020, 12:40 AM · Restricted Project, debug-info

Sep 10 2020

markus added inline comments to D87494: Improve LSR debug-info.
Sep 10 2020, 11:12 PM · Restricted Project, debug-info
markus requested review of D87494: Improve LSR debug-info.
Sep 10 2020, 11:02 PM · Restricted Project, debug-info

Jun 4 2019

markus added a comment to D62604: [CodeGen] Generic Hardware Loop Support.

I would expect many targets to have some kind of validity check late on in the pipeline. loop.decrement.reg is designed so that it could just be selected to a machine sub, as the IV chain still exists along with the icmp and br. I have assumed that because the intrinsic behaves like a sub, any target should be able to, hopefully trivially, fall back to a machine sub late on. Is this something that would be difficult for you..? The loop.decrement, which produces an i1, would cause more problems but this framework allows the backend to make the best decision for itself.

Jun 4 2019, 4:19 AM
markus added a comment to D62604: [CodeGen] Generic Hardware Loop Support.

What happens if a target decides late (like addPreEmitPass() late) that a hardware loop is no longer possible due to reasons that are not detectable from the IR level hook. For PowerPC this does not seem to be an issue, or at least I cannot find it in the code, but for other targets there could be limitations that you need to analyse the actual machine instructions to find out about. Since the original IV chain has been replaced by intrinsic llvm.loop.decrement.reg (or whatever it iselected to) it seems we now would need to manually insert instructions to update the loop counter which could possibly be a bit hairy to do this late.

Jun 4 2019, 2:33 AM

Jun 3 2019

markus added inline comments to D62604: [CodeGen] Generic Hardware Loop Support.
Jun 3 2019, 6:08 AM
markus added inline comments to D62604: [CodeGen] Generic Hardware Loop Support.
Jun 3 2019, 4:06 AM

May 21 2019

markus added a comment to D62132: [RFC] Intrinsics for Hardware Loops.

This is interesting. Our (Ericsson's) out-of-tree target has hardware loops and we currently do a similar thing i.e.

May 21 2019, 12:39 AM

May 13 2019

markus added a comment to D61184: [Salvage] Change salvage debug info implementation to use new DW_OP_LLVM_convert where needed.

The DW_OP_LLVM_convert stuff looks-good-to-me but I don't feel that I have authority to approve for the rest so please don't wait for any input from my part.

May 13 2019, 7:57 AM · Restricted Project

May 9 2019

markus committed rG92d5db524e65: Make sub-registers index names case sensitive in the MIRParser (authored by markus).
Make sub-registers index names case sensitive in the MIRParser
May 9 2019, 1:27 AM
markus committed rL360318: Make sub-registers index names case sensitive in the MIRParser.
Make sub-registers index names case sensitive in the MIRParser
May 9 2019, 1:27 AM
markus closed D61499: Make sub-registers index names case sensitive in the MIRParser.
May 9 2019, 1:27 AM · Restricted Project

May 6 2019

markus committed rGa778074165ca: [DebugInfo] GlobalOpt DW_OP_deref_size instead of DW_OP_deref. (authored by markus).
[DebugInfo] GlobalOpt DW_OP_deref_size instead of DW_OP_deref.
May 6 2019, 12:20 AM
markus committed rL360013: [DebugInfo] GlobalOpt DW_OP_deref_size instead of DW_OP_deref..
[DebugInfo] GlobalOpt DW_OP_deref_size instead of DW_OP_deref.
May 6 2019, 12:19 AM
markus closed D60611: [DebugInfo] GlobalOpt DW_OP_deref_size instead of DW_OP_deref..
May 6 2019, 12:19 AM · Restricted Project, debug-info

May 3 2019

markus abandoned D60311: MIR printer should lowercase sub-register names to be in sync with parser?.

Superseded by https://reviews.llvm.org/D61499

May 3 2019, 6:18 AM · Restricted Project
markus created D61499: Make sub-registers index names case sensitive in the MIRParser.
May 3 2019, 6:16 AM · Restricted Project

Apr 30 2019

markus committed rGa475da36eb50: [DebugInfo] DW_OP_deref_size in PrologEpilogInserter. (authored by markus).
[DebugInfo] DW_OP_deref_size in PrologEpilogInserter.
Apr 30 2019, 1:00 AM
markus committed rL359535: [DebugInfo] DW_OP_deref_size in PrologEpilogInserter..
[DebugInfo] DW_OP_deref_size in PrologEpilogInserter.
Apr 30 2019, 12:57 AM
markus closed D59687: [DebugInfo] Prologue inserter need to insert DW_OP_deref_size.
Apr 30 2019, 12:57 AM · Restricted Project, debug-info

Apr 29 2019

markus added a comment to D59687: [DebugInfo] Prologue inserter need to insert DW_OP_deref_size.

Can (or should) I proceed to push this again? I am a bit confused since the accepted status remains even though I upload new patches.

Apr 29 2019, 2:50 AM · Restricted Project, debug-info
markus added a comment to D61184: [Salvage] Change salvage debug info implementation to use new DW_OP_LLVM_convert where needed.

A bit prettier would be to introduce a DW_OP_LLVM_reinterpret op to do that job.

I am preparing a patch for that right now. Regardless of this review it should make the existing DW_OP_LLVM_convert stuff a bit cleaner.

Apr 29 2019, 1:39 AM · Restricted Project
markus added a comment to D61184: [Salvage] Change salvage debug info implementation to use new DW_OP_LLVM_convert where needed.

A bit prettier would be to introduce a DW_OP_LLVM_reinterpret op to do that job.

Apr 29 2019, 12:10 AM · Restricted Project

Apr 26 2019

markus added a comment to D61184: [Salvage] Change salvage debug info implementation to use new DW_OP_LLVM_convert where needed.

Have you verified that this results in the desired DW_OPs being emitted in the end and that the (or a) debugger makes sense out of it?

Apr 26 2019, 6:17 AM · Restricted Project
markus updated the diff for D59687: [DebugInfo] Prologue inserter need to insert DW_OP_deref_size.

Use MI.isIndirectDebugValue() and improved the test a bit.

Apr 26 2019, 12:47 AM · Restricted Project, debug-info

Apr 25 2019

markus updated the diff for D59687: [DebugInfo] Prologue inserter need to insert DW_OP_deref_size.

After studying the reproducer and reading some in https://llvm.org/docs/SourceLevelDebugging.html I realize that maybe isImplicit() is not a sufficient condition and that we also need to include the second operand of the DBG_VALUE in the test.

Apr 25 2019, 5:30 AM · Restricted Project, debug-info
markus updated subscribers of D59687: [DebugInfo] Prologue inserter need to insert DW_OP_deref_size.

You may already know this, but just in case: I'm using results delta (http://delta.tigris.org) for these kind of jobs with great results. There is also creduce, but in my personal experience it is slower than multidelta and more easily tripped by unusual inputs.

Apr 25 2019, 5:16 AM · Restricted Project, debug-info

Apr 18 2019

markus added a comment to D59687: [DebugInfo] Prologue inserter need to insert DW_OP_deref_size.

! In D59687#1468571, @probinson wrote:
It sounds like you're trying to do this with aggregate types, and that won't work. Only base types (for DWARF 5) or address-like types (for DWARF <= 4) should end up on the stack.

Apr 18 2019, 2:44 AM · Restricted Project, debug-info

Apr 16 2019

markus updated the diff for D59687: [DebugInfo] Prologue inserter need to insert DW_OP_deref_size.

The Chromium compilation segfault comes down to two issues:

Apr 16 2019, 6:56 AM · Restricted Project, debug-info

Apr 13 2019

markus reopened D59687: [DebugInfo] Prologue inserter need to insert DW_OP_deref_size.

Has been reverted in

commit 0366e3e18142466e4dd99d3109d8facd093cedc8 (llvm.org/master, master)
Author: Hans Wennborg <hans@hanshq.net>
Date:   Fri Apr 12 12:54:52 2019 +0000
Apr 13 2019, 12:54 AM · Restricted Project, debug-info

Apr 12 2019

markus created D60611: [DebugInfo] GlobalOpt DW_OP_deref_size instead of DW_OP_deref..
Apr 12 2019, 5:45 AM · Restricted Project, debug-info