Mips/GlobalISel: Add test for atomic load

[sdardis]

LGTM.

[arsenm]

120c5115b86e0ab70fd2e60857a13058e1f3e99a

llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_atomic.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -global-isel -mtriple=mipsel-linux-gnu -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
+
+; --------------------------------------------------------------------
+; unordered
+; --------------------------------------------------------------------
+
+define i8 @atomic_load_unordered_i8(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i8:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $2, 0($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %load = load atomic i8, i8* %ptr unordered, align 1
+  ret i8 %load
+}
+
+define i32 @atomic_load_unordered_i8_sext_i32(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i8_sext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sll $1, $1, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $2, $1, 24
+  %load = load atomic i8, i8* %ptr unordered, align 1
+  %sext = sext i8 %load to i32
+  ret i32 %sext
+}
+
+define i16 @atomic_load_unordered_i8_sext_i16(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i8_sext_i16:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sll $1, $1, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $2, $1, 24
+  %load = load atomic i8, i8* %ptr unordered, align 1
+  %sext = sext i8 %load to i16
+  ret i16 %sext
+}
+
+define i64 @atomic_load_unordered_i8_sext_i64(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i8_sext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sll $1, $1, 24
+; MIPS32-NEXT:    sra $2, $1, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $3, $1, 31
+  %load = load atomic i8, i8* %ptr unordered, align 1
+  %sext = sext i8 %load to i64
+  ret i64 %sext
+}
+
+define i32 @atomic_load_unordered_i8_zext_i32(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i8_zext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $2, $1, 255
+  %load = load atomic i8, i8* %ptr unordered, align 1
+  %zext = zext i8 %load to i32
+  ret i32 %zext
+}
+
+define i16 @atomic_load_unordered_i8_zext_i16(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i8_zext_i16:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $2, $1, 255
+  %load = load atomic i8, i8* %ptr unordered, align 1
+  %zext = zext i8 %load to i16
+  ret i16 %zext
+}
+
+define i64 @atomic_load_unordered_i8_zext_i64(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i8_zext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    andi $2, $1, 255
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $3, $1, 0
+  %load = load atomic i8, i8* %ptr unordered, align 1
+  %zext = zext i8 %load to i64
+  ret i64 %zext
+}
+
+define i16 @atomic_load_unordered_i16(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i16:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $2, 0($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %load = load atomic i16, i16* %ptr unordered, align 2
+  ret i16 %load
+}
+
+define i32 @atomic_load_unordered_i16_sext_i32(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i16_sext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    sll $1, $1, 16
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $2, $1, 16
+  %load = load atomic i16, i16* %ptr unordered, align 2
+  %sext = sext i16 %load to i32
+  ret i32 %sext
+}
+
+define i64 @atomic_load_unordered_i16_sext_i64(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i16_sext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    sll $1, $1, 16
+; MIPS32-NEXT:    sra $2, $1, 16
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $3, $1, 31
+  %load = load atomic i16, i16* %ptr unordered, align 2
+  %sext = sext i16 %load to i64
+  ret i64 %sext
+}
+
+define i32 @atomic_load_unordered_i16_zext_i32(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i16_zext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $2, $1, 65535
+  %load = load atomic i16, i16* %ptr unordered, align 2
+  %zext = zext i16 %load to i32
+  ret i32 %zext
+}
+
+define i64 @atomic_load_unordered_i16_zext_i64(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i16_zext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    andi $2, $1, 65535
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $3, $1, 0
+  %load = load atomic i16, i16* %ptr unordered, align 2
+  %zext = zext i16 %load to i64
+  ret i64 %zext
+}
+
+define i32 @atomic_load_unordered_i32(i32* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lw $2, 0($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %load = load atomic i32, i32* %ptr unordered, align 4
+  ret i32 %load
+}
+
+define i64 @atomic_load_unordered_i64(i64* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    ldc1 $f0, 0($4)
+; MIPS32-NEXT:    mfc1 $2, $f0
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    mfc1 $3, $f1
+  %load = load atomic i64, i64* %ptr unordered, align 8
+  ret i64 %load
+}
+
+define float @atomic_load_unordered_f32(float* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_f32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lwc1 $f0, 64($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %gep = getelementptr inbounds float, float* %ptr, i32 16
+  %load = load atomic float, float* %gep unordered, align 4
+  ret float %load
+}
+
+define double @atomic_load_unordered_f64(double* %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_f64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    ldc1 $f0, 128($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %gep = getelementptr inbounds double, double* %ptr, i32 16
+  %load = load atomic double, double* %gep unordered, align 8
+  ret double %load
+}
+
+define i8* @atomic_load_unordered_p0i8(i8** %ptr) {
+; MIPS32-LABEL: atomic_load_unordered_p0i8:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lw $2, 64($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %gep = getelementptr inbounds i8*, i8** %ptr, i32 16
+  %load = load atomic i8*, i8** %gep unordered, align 4
+  ret i8* %load
+}
+
+; --------------------------------------------------------------------
+; monotonic
+; --------------------------------------------------------------------
+
+define i8 @atomic_load_monotonic_i8(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i8:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $2, 0($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %load = load atomic i8, i8* %ptr monotonic, align 1
+  ret i8 %load
+}
+
+define i32 @atomic_load_monotonic_i8_sext_i32(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i8_sext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sll $1, $1, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $2, $1, 24
+  %load = load atomic i8, i8* %ptr monotonic, align 1
+  %sext = sext i8 %load to i32
+  ret i32 %sext
+}
+
+define i16 @atomic_load_monotonic_i8_sext_i16(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i8_sext_i16:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sll $1, $1, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $2, $1, 24
+  %load = load atomic i8, i8* %ptr monotonic, align 1
+  %sext = sext i8 %load to i16
+  ret i16 %sext
+}
+
+define i64 @atomic_load_monotonic_i8_sext_i64(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i8_sext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sll $1, $1, 24
+; MIPS32-NEXT:    sra $2, $1, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $3, $1, 31
+  %load = load atomic i8, i8* %ptr monotonic, align 1
+  %sext = sext i8 %load to i64
+  ret i64 %sext
+}
+
+define i32 @atomic_load_monotonic_i8_zext_i32(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i8_zext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $2, $1, 255
+  %load = load atomic i8, i8* %ptr monotonic, align 1
+  %zext = zext i8 %load to i32
+  ret i32 %zext
+}
+
+define i16 @atomic_load_monotonic_i8_zext_i16(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i8_zext_i16:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $2, $1, 255
+  %load = load atomic i8, i8* %ptr monotonic, align 1
+  %zext = zext i8 %load to i16
+  ret i16 %zext
+}
+
+define i64 @atomic_load_monotonic_i8_zext_i64(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i8_zext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    andi $2, $1, 255
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $3, $1, 0
+  %load = load atomic i8, i8* %ptr monotonic, align 1
+  %zext = zext i8 %load to i64
+  ret i64 %zext
+}
+
+define i16 @atomic_load_monotonic_i16(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i16:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $2, 0($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %load = load atomic i16, i16* %ptr monotonic, align 2
+  ret i16 %load
+}
+
+define i32 @atomic_load_monotonic_i16_sext_i32(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i16_sext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    sll $1, $1, 16
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $2, $1, 16
+  %load = load atomic i16, i16* %ptr monotonic, align 2
+  %sext = sext i16 %load to i32
+  ret i32 %sext
+}
+
+define i64 @atomic_load_monotonic_i16_sext_i64(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i16_sext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    sll $1, $1, 16
+; MIPS32-NEXT:    sra $2, $1, 16
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $3, $1, 31
+  %load = load atomic i16, i16* %ptr monotonic, align 2
+  %sext = sext i16 %load to i64
+  ret i64 %sext
+}
+
+define i32 @atomic_load_monotonic_i16_zext_i32(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i16_zext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $2, $1, 65535
+  %load = load atomic i16, i16* %ptr monotonic, align 2
+  %zext = zext i16 %load to i32
+  ret i32 %zext
+}
+
+define i64 @atomic_load_monotonic_i16_zext_i64(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i16_zext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    andi $2, $1, 65535
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $3, $1, 0
+  %load = load atomic i16, i16* %ptr monotonic, align 2
+  %zext = zext i16 %load to i64
+  ret i64 %zext
+}
+
+define i32 @atomic_load_monotonic_i32(i32* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lw $2, 0($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %load = load atomic i32, i32* %ptr monotonic, align 4
+  ret i32 %load
+}
+
+define i64 @atomic_load_monotonic_i64(i64* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    ldc1 $f0, 0($4)
+; MIPS32-NEXT:    mfc1 $2, $f0
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    mfc1 $3, $f1
+  %load = load atomic i64, i64* %ptr monotonic, align 8
+  ret i64 %load
+}
+
+define float @atomic_load_monotonic_f32(float* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_f32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lwc1 $f0, 64($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %gep = getelementptr inbounds float, float* %ptr, i32 16
+  %load = load atomic float, float* %gep monotonic, align 4
+  ret float %load
+}
+
+define double @atomic_load_monotonic_f64(double* %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_f64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    ldc1 $f0, 128($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %gep = getelementptr inbounds double, double* %ptr, i32 16
+  %load = load atomic double, double* %gep monotonic, align 8
+  ret double %load
+}
+
+define i8* @atomic_load_monotonic_p0i8(i8** %ptr) {
+; MIPS32-LABEL: atomic_load_monotonic_p0i8:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lw $2, 64($4)
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %gep = getelementptr inbounds i8*, i8** %ptr, i32 16
+  %load = load atomic i8*, i8** %gep monotonic, align 4
+  ret i8* %load
+}
+
+; --------------------------------------------------------------------
+; acquire
+; --------------------------------------------------------------------
+
+define i8 @atomic_load_acquire_i8(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i8:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $2, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %load = load atomic i8, i8* %ptr acquire, align 1
+  ret i8 %load
+}
+
+define i32 @atomic_load_acquire_i8_sext_i32(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i8_sext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    sll $1, $1, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $2, $1, 24
+  %load = load atomic i8, i8* %ptr acquire, align 1
+  %sext = sext i8 %load to i32
+  ret i32 %sext
+}
+
+define i16 @atomic_load_acquire_i8_sext_i16(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i8_sext_i16:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    sll $1, $1, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $2, $1, 24
+  %load = load atomic i8, i8* %ptr acquire, align 1
+  %sext = sext i8 %load to i16
+  ret i16 %sext
+}
+
+define i64 @atomic_load_acquire_i8_sext_i64(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i8_sext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    sll $1, $1, 24
+; MIPS32-NEXT:    sra $2, $1, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $3, $1, 31
+  %load = load atomic i8, i8* %ptr acquire, align 1
+  %sext = sext i8 %load to i64
+  ret i64 %sext
+}
+
+define i32 @atomic_load_acquire_i8_zext_i32(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i8_zext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $2, $1, 255
+  %load = load atomic i8, i8* %ptr acquire, align 1
+  %zext = zext i8 %load to i32
+  ret i32 %zext
+}
+
+define i16 @atomic_load_acquire_i8_zext_i16(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i8_zext_i16:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $2, $1, 255
+  %load = load atomic i8, i8* %ptr acquire, align 1
+  %zext = zext i8 %load to i16
+  ret i16 %zext
+}
+
+define i64 @atomic_load_acquire_i8_zext_i64(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i8_zext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    andi $2, $1, 255
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $3, $1, 0
+  %load = load atomic i8, i8* %ptr acquire, align 1
+  %zext = zext i8 %load to i64
+  ret i64 %zext
+}
+
+define i16 @atomic_load_acquire_i16(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i16:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $2, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %load = load atomic i16, i16* %ptr acquire, align 2
+  ret i16 %load
+}
+
+define i32 @atomic_load_acquire_i16_sext_i32(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i16_sext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    sll $1, $1, 16
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $2, $1, 16
+  %load = load atomic i16, i16* %ptr acquire, align 2
+  %sext = sext i16 %load to i32
+  ret i32 %sext
+}
+
+define i64 @atomic_load_acquire_i16_sext_i64(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i16_sext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    sll $1, $1, 16
+; MIPS32-NEXT:    sra $2, $1, 16
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $3, $1, 31
+  %load = load atomic i16, i16* %ptr acquire, align 2
+  %sext = sext i16 %load to i64
+  ret i64 %sext
+}
+
+define i32 @atomic_load_acquire_i16_zext_i32(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i16_zext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $2, $1, 65535
+  %load = load atomic i16, i16* %ptr acquire, align 2
+  %zext = zext i16 %load to i32
+  ret i32 %zext
+}
+
+define i64 @atomic_load_acquire_i16_zext_i64(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i16_zext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    andi $2, $1, 65535
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $3, $1, 0
+  %load = load atomic i16, i16* %ptr acquire, align 2
+  %zext = zext i16 %load to i64
+  ret i64 %zext
+}
+
+define i32 @atomic_load_acquire_i32(i32* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lw $2, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %load = load atomic i32, i32* %ptr acquire, align 4
+  ret i32 %load
+}
+
+define i64 @atomic_load_acquire_i64(i64* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    ldc1 $f0, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    mfc1 $2, $f0
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    mfc1 $3, $f1
+  %load = load atomic i64, i64* %ptr acquire, align 8
+  ret i64 %load
+}
+
+define float @atomic_load_acquire_f32(float* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_f32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lwc1 $f0, 64($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %gep = getelementptr inbounds float, float* %ptr, i32 16
+  %load = load atomic float, float* %gep acquire, align 4
+  ret float %load
+}
+
+define double @atomic_load_acquire_f64(double* %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_f64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    ldc1 $f0, 128($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %gep = getelementptr inbounds double, double* %ptr, i32 16
+  %load = load atomic double, double* %gep acquire, align 8
+  ret double %load
+}
+
+define i8* @atomic_load_acquire_p0i8(i8** %ptr) {
+; MIPS32-LABEL: atomic_load_acquire_p0i8:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lw $2, 64($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %gep = getelementptr inbounds i8*, i8** %ptr, i32 16
+  %load = load atomic i8*, i8** %gep acquire, align 4
+  ret i8* %load
+}
+
+; --------------------------------------------------------------------
+; seq_cst
+; --------------------------------------------------------------------
+
+define i8 @atomic_load_seq_cst_i8(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i8:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $2, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %load = load atomic i8, i8* %ptr seq_cst, align 1
+  ret i8 %load
+}
+
+define i32 @atomic_load_seq_cst_i8_sext_i32(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i8_sext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    sll $1, $1, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $2, $1, 24
+  %load = load atomic i8, i8* %ptr seq_cst, align 1
+  %sext = sext i8 %load to i32
+  ret i32 %sext
+}
+
+define i16 @atomic_load_seq_cst_i8_sext_i16(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i8_sext_i16:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    sll $1, $1, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $2, $1, 24
+  %load = load atomic i8, i8* %ptr seq_cst, align 1
+  %sext = sext i8 %load to i16
+  ret i16 %sext
+}
+
+define i64 @atomic_load_seq_cst_i8_sext_i64(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i8_sext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    sll $1, $1, 24
+; MIPS32-NEXT:    sra $2, $1, 24
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $3, $1, 31
+  %load = load atomic i8, i8* %ptr seq_cst, align 1
+  %sext = sext i8 %load to i64
+  ret i64 %sext
+}
+
+define i32 @atomic_load_seq_cst_i8_zext_i32(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i8_zext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $2, $1, 255
+  %load = load atomic i8, i8* %ptr seq_cst, align 1
+  %zext = zext i8 %load to i32
+  ret i32 %zext
+}
+
+define i16 @atomic_load_seq_cst_i8_zext_i16(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i8_zext_i16:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $2, $1, 255
+  %load = load atomic i8, i8* %ptr seq_cst, align 1
+  %zext = zext i8 %load to i16
+  ret i16 %zext
+}
+
+define i64 @atomic_load_seq_cst_i8_zext_i64(i8* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i8_zext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lbu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    andi $2, $1, 255
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $3, $1, 0
+  %load = load atomic i8, i8* %ptr seq_cst, align 1
+  %zext = zext i8 %load to i64
+  ret i64 %zext
+}
+
+define i16 @atomic_load_seq_cst_i16(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i16:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $2, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %load = load atomic i16, i16* %ptr seq_cst, align 2
+  ret i16 %load
+}
+
+define i32 @atomic_load_seq_cst_i16_sext_i32(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i16_sext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    sll $1, $1, 16
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $2, $1, 16
+  %load = load atomic i16, i16* %ptr seq_cst, align 2
+  %sext = sext i16 %load to i32
+  ret i32 %sext
+}
+
+define i64 @atomic_load_seq_cst_i16_sext_i64(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i16_sext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    sll $1, $1, 16
+; MIPS32-NEXT:    sra $2, $1, 16
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    sra $3, $1, 31
+  %load = load atomic i16, i16* %ptr seq_cst, align 2
+  %sext = sext i16 %load to i64
+  ret i64 %sext
+}
+
+define i32 @atomic_load_seq_cst_i16_zext_i32(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i16_zext_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $2, $1, 65535
+  %load = load atomic i16, i16* %ptr seq_cst, align 2
+  %zext = zext i16 %load to i32
+  ret i32 %zext
+}
+
+define i64 @atomic_load_seq_cst_i16_zext_i64(i16* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i16_zext_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lhu $1, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    andi $2, $1, 65535
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    andi $3, $1, 0
+  %load = load atomic i16, i16* %ptr seq_cst, align 2
+  %zext = zext i16 %load to i64
+  ret i64 %zext
+}
+
+define i32 @atomic_load_seq_cst_i32(i32* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lw $2, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %load = load atomic i32, i32* %ptr seq_cst, align 4
+  ret i32 %load
+}
+
+define i64 @atomic_load_seq_cst_i64(i64* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_i64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    ldc1 $f0, 0($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    mfc1 $2, $f0
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    mfc1 $3, $f1
+  %load = load atomic i64, i64* %ptr seq_cst, align 8
+  ret i64 %load
+}
+
+define float @atomic_load_seq_cst_f32(float* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_f32:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lwc1 $f0, 64($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %gep = getelementptr inbounds float, float* %ptr, i32 16
+  %load = load atomic float, float* %gep seq_cst, align 4
+  ret float %load
+}
+
+define double @atomic_load_seq_cst_f64(double* %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_f64:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    ldc1 $f0, 128($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %gep = getelementptr inbounds double, double* %ptr, i32 16
+  %load = load atomic double, double* %gep seq_cst, align 8
+  ret double %load
+}
+
+define i8* @atomic_load_seq_cst_p0i8(i8** %ptr) {
+; MIPS32-LABEL: atomic_load_seq_cst_p0i8:
+; MIPS32:       # %bb.0:
+; MIPS32-NEXT:    lw $2, 64($4)
+; MIPS32-NEXT:    sync
+; MIPS32-NEXT:    jr $ra
+; MIPS32-NEXT:    nop
+  %gep = getelementptr inbounds i8*, i8** %ptr, i32 16
+  %load = load atomic i8*, i8** %gep seq_cst, align 4
+  ret i8* %load
+}