[BOLT][NFC] Move isMOVSX64rm32 out of MCPlusBuilder

[rafauler]

LGTM

bolt/include/bolt/Core/MCPlusBuilder.h

virtual bool isSUB(const MCInst &Inst) const {
     return false;
   }
 
   virtual bool isLEA64r(const MCInst &Inst) const {
     llvm_unreachable("not implemented");
     return false;
   }
 
-  virtual bool isMOVSX64rm32(const MCInst &Inst) const {
-    llvm_unreachable("not implemented");
-    return false;
-  }
-
   virtual bool isLeave(const MCInst &Inst) const {
     llvm_unreachable("not implemented");
     return false;
   }
 
   virtual bool isADRP(const MCInst &Inst) const {
     llvm_unreachable("not implemented");
     return false;

bolt/lib/Target/X86/X86MCPlusBuilder.cpp

bool isTEST(unsigned Opcode) {
   case X86::TEST8mi:
   case X86::TEST8mr:
   case X86::TEST8ri:
   case X86::TEST8rr:
     return true;
   }
 }
 
+bool isMOVSX64rm32(const MCInst &Inst) {
+  return Inst.getOpcode() == X86::MOVSX64rm32;
+}
+
 class X86MCPlusBuilder : public MCPlusBuilder {
 public:
   X86MCPlusBuilder(const MCInstrAnalysis *Analysis, const MCInstrInfo *Info,
                    const MCRegisterInfo *RegInfo)
       : MCPlusBuilder(Analysis, Info, RegInfo) {}
 
   bool isBranch(const MCInst &Inst) const override {
     return Analysis->isBranch(Inst) && !isTailCall(Inst);
bool isADDri(const MCInst &Inst) const {
     return Inst.getOpcode() == X86::ADD64ri32 ||
            Inst.getOpcode() == X86::ADD64ri8;
   }
 
   bool isLEA64r(const MCInst &Inst) const override {
     return Inst.getOpcode() == X86::LEA64r;
   }
 
-  bool isMOVSX64rm32(const MCInst &Inst) const override {
-    return Inst.getOpcode() == X86::MOVSX64rm32;
-  }
-
   bool isLeave(const MCInst &Inst) const override {
     return Inst.getOpcode() == X86::LEAVE || Inst.getOpcode() == X86::LEAVE64;
   }
 
   bool isMoveMem2Reg(const MCInst &Inst) const override {
     switch (Inst.getOpcode()) {
     case X86::MOV16rm:
     case X86::MOV32rm: