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Differential D121353

[SLP][NFC] This adds a test for a follow-up patch that fixes a look-ahead operand reordering issue
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Authored by vporpo on Mar 9 2022, 9:43 PM.

Details

Reviewers
ABataev
RKSimon
fhahn
Commits
rGb051c836c0c8: [SLP][NFC] This adds a test for a follow-up patch that fixes a look-ahead…

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Event Timeline

vporpo created this revision.Mar 9 2022, 9:43 PM
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vporpo requested review of this revision.Mar 9 2022, 9:43 PM
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vporpo added a child revision: D121354: [SLP] Fix lookahead operand reordering for splat loads..Mar 9 2022, 9:46 PM
Harbormaster completed remote builds in B153484: Diff 414274.Mar 9 2022, 10:30 PM
RKSimon accepted this revision.Mar 9 2022, 11:33 PM

LGTM with one minor comment/question

llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
648

do we need the weak_odr attribute?

This revision is now accepted and ready to land.Mar 9 2022, 11:33 PM
vporpo updated this revision to Diff 414285.Mar 10 2022, 12:17 AM

Removed the weak_odr attribute.

RKSimon accepted this revision.Mar 10 2022, 12:42 AM
Harbormaster completed remote builds in B153492: Diff 414285.Mar 10 2022, 1:04 AM
vporpo updated this revision to Diff 415943.Mar 16 2022, 12:51 PM

Added a new RUN for SSE2 checks.

Harbormaster completed remote builds in B154675: Diff 415943.Mar 16 2022, 1:42 PM
This revision was landed with ongoing or failed builds.Mar 17 2022, 6:06 PM
Closed by commit rGb051c836c0c8: [SLP][NFC] This adds a test for a follow-up patch that fixes a look-ahead… (authored by vporpo). · Explain Why
This revision was automatically updated to reflect the committed changes.
vporpo added a commit: rGb051c836c0c8: [SLP][NFC] This adds a test for a follow-up patch that fixes a look-ahead….

Revision Contents

PathSize
llvm/
test/
Transforms/
SLPVectorizer/
X86/
50 lines

Diff 414274

llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll

Show First 20 Lines • Show All 636 Lines • ▼ Show 20 Lines;
%add1 = fadd double %mul1, %mul4 %add1 = fadd double %mul1, %mul4
%sidx0 = getelementptr inbounds double, double* %storeArray, i64 0 %sidx0 = getelementptr inbounds double, double* %storeArray, i64 0
%sidx1 = getelementptr inbounds double, double* %storeArray, i64 1 %sidx1 = getelementptr inbounds double, double* %storeArray, i64 1
store double %add0, double *%sidx0, align 8 store double %add0, double *%sidx0, align 8
store double %add1, double *%sidx1, align 8 store double %add1, double *%sidx1, align 8
ret void ret void
} }
; This checks that we we prefer splats rather than reverse load vectors + shuffles.
; 2-wide splat loads in x86 use a single instruction so they are quite cheap.
define weak_odr double @splat_loads(double *%array1, double *%array2, double *%ptrA, double *%ptrB) #0 {
RKSimonUnsubmitted
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do we need the weak_odr attribute?

RKSimon: do we need the weak_odr attribute?
; CHECK-LABEL: @splat_loads(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[GEP_1_0:%.*]] = getelementptr inbounds double, double* [[ARRAY1:%.*]], i64 0
; CHECK-NEXT: [[GEP_1_1:%.*]] = getelementptr inbounds double, double* [[ARRAY1]], i64 1
; CHECK-NEXT: [[TMP0:%.*]] = bitcast double* [[GEP_1_0]] to <2 x double>*
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* [[TMP0]], align 8
; CHECK-NEXT: [[GEP_2_0:%.*]] = getelementptr inbounds double, double* [[ARRAY2:%.*]], i64 0
; CHECK-NEXT: [[GEP_2_1:%.*]] = getelementptr inbounds double, double* [[ARRAY2]], i64 1
; CHECK-NEXT: [[TMP2:%.*]] = bitcast double* [[GEP_2_0]] to <2 x double>*
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, <2 x double>* [[TMP2]], align 8
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <2 x i32> <i32 1, i32 0>
; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> [[TMP1]], [[SHUFFLE]]
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[SHUFFLE]], i32 1
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x double> poison, double [[TMP5]], i32 0
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x double> [[SHUFFLE]], i32 0
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x double> [[TMP6]], double [[TMP7]], i32 1
; CHECK-NEXT: [[TMP9:%.*]] = fmul <2 x double> [[TMP1]], [[TMP8]]
; CHECK-NEXT: [[TMP10:%.*]] = fadd <2 x double> [[TMP4]], [[TMP9]]
; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x double> [[TMP10]], i32 0
; CHECK-NEXT: [[TMP12:%.*]] = extractelement <2 x double> [[TMP10]], i32 1
; CHECK-NEXT: [[ADD3:%.*]] = fadd double [[TMP11]], [[TMP12]]
; CHECK-NEXT: ret double [[ADD3]]
;
entry:
%gep_1_0 = getelementptr inbounds double, double* %array1, i64 0
%gep_1_1 = getelementptr inbounds double, double* %array1, i64 1
%ld_1_0 = load double, double* %gep_1_0, align 8
%ld_1_1 = load double, double* %gep_1_1, align 8
%gep_2_0 = getelementptr inbounds double, double* %array2, i64 0
%gep_2_1 = getelementptr inbounds double, double* %array2, i64 1
%ld_2_0 = load double, double* %gep_2_0, align 8
%ld_2_1 = load double, double* %gep_2_1, align 8
%mul1 = fmul double %ld_1_0, %ld_2_0
%mul2 = fmul double %ld_1_1, %ld_2_0
%mul3 = fmul double %ld_1_0, %ld_2_1
%mul4 = fmul double %ld_1_1, %ld_2_1
%add1 = fadd double %mul1, %mul3
%add2 = fadd double %mul2, %mul4
%add3 = fadd double %add1, %add2
ret double %add3
}