[SCEV] Extend `i1 cond ? i1 x : i1 y` (where either x or y is a constant integer) to arbitrary-sized integers

[lebedev.ri]

Summary

@Meinersbur this is causing a number of polly test changes.
I believe those tests need to be fixed and not updated,
and that probably requires knowing what they are actually testing.
Would you like to help with that?

To support not just booleans we simply only need to sext the condition:
https://alive2.llvm.org/ce/z/EFKLeA

It is contentious whether we should not said condition before or after
the sext, doing that afterwards seems less worse,
but it will depend i guess.

Test llvm/test/Transforms/IndVarSimplify/eliminate-max.ll starts to trigger
assertion after this. While SCEVUnknown was originally created
for an opaque IR Value which was an Instruction, later said Value
was RAUW'd by a constant integer, yet we still have that SCEVUnknown.
Are we missing an invalidation?

[lebedev.ri]

ping @Meinersbur this will need some help with polly's tests...

[lebedev.ri]

@Meinersbur i've updated affected polly tests to the best of my understanding, please comment if that is acceptable or not.

[nikic]

llvm/test/Analysis/ScalarEvolution/increasing-or-decreasing-iv.ll

14

It looks like the ranges computed in this file regress. You probably need to update the getRangeViaFactoring() code, which assumes that the selects here will be SCEVUnknowns.

llvm/lib/Analysis/ScalarEvolution.cpp

static const SCEV *rewrite(const SCEV *S, const Loop *L,
     SCEVBackedgeConditionFolder Rewriter(L, BECond, IsPosBECond, SE);
     return Rewriter.visit(S);
   }
 
   const SCEV *visitUnknown(const SCEVUnknown *Expr) {
     const SCEV *Result = Expr;
     bool InvariantF = SE.isLoopInvariant(Expr, L);
 
-    if (!InvariantF) {
+    // FIXME: while SCEVUnknown was originally created for an opaque IR Value
+    //        which was an Instruction, later said Values was RAUW'd
+    //        by a constant integer. Are we missing an invalidation?
+    if (!InvariantF && isa<Instruction>(Expr->getValue())) {
       Instruction *I = cast<Instruction>(Expr->getValue());
       switch (I->getOpcode()) {
       case Instruction::Select: {
         SelectInst *SI = cast<SelectInst>(I);
         Optional<const SCEV *> Res =
             compareWithBackedgeCondition(SI->getCondition());
         if (Res.hasValue()) {
           bool IsOne = cast<SCEVConstant>(Res.getValue())->getValue()->isOne();
default:
     break;
   }
 
   return getUnknown(I);
 }
 
 const SCEV *ScalarEvolution::createNodeForSelectOrPHIViaUMinSeq(
     Value *V, Value *Cond, Value *TrueVal, Value *FalseVal) {
-  // For now, only deal with i1-typed `select`s.
-  if (!V->getType()->isIntegerTy(1) || !Cond->getType()->isIntegerTy(1) ||
-      !TrueVal->getType()->isIntegerTy(1) ||
-      !FalseVal->getType()->isIntegerTy(1))
+  assert(V->getType() == TrueVal->getType() &&
+         TrueVal->getType() == FalseVal->getType() &&
+         "Expected the type of V and of the operands to match.");
+
+  // For now, only deal with integer-typed `select`s.
+  if (!V->getType()->isIntegerTy() || !Cond->getType()->isIntegerTy(1))
     return getUnknown(V);
 
-  // i1 cond ? i1 x : i1 C  -->  C + (i1  cond ? (i1 x - i1 C) : i1 0)
-  //                        -->  C + (umin_seq  cond, x - C)
+  // i1 cond ? iN x : iN C  -->  C + (i1  cond ? (iN x - iN C) : iN 0)
+  //                        -->  C + (umin_seq  (sext   cond), x - C)
   //
-  // i1 cond ? i1 C : i1 x  -->  C + (i1  cond ? i1 0 : (i1 x - i1 C))
-  //                        -->  C + (i1 ~cond ? (i1 x - i1 C) : i1 0)
-  //                        -->  C + (umin_seq ~cond, x - C)
+  // i1 cond ? iN C : iN x  -->  C + (i1  cond ? iN 0 : (iN x - iN C))
+  //                        -->  C + (i1 ~cond ? (iN x - iN C) : iN 0)
+  //                        -->  C + (umin_seq  (sext ~cond), x - C)
+  //                        -->  C + (umin_seq ~(sext  cond), x - C)
   if (isa<ConstantInt>(TrueVal) || isa<ConstantInt>(FalseVal)) {
     const SCEV *CondExpr = getSCEV(Cond);
     const SCEV *TrueExpr = getSCEV(TrueVal);
     const SCEV *FalseExpr = getSCEV(FalseVal);
     const SCEV *X, *C;
+    if (getTypeSizeInBits(V->getType()) > getTypeSizeInBits(Cond->getType()))
+      CondExpr = getSignExtendExpr(CondExpr, V->getType());
     if (isa<ConstantInt>(TrueVal)) {
       CondExpr = getNotSCEV(CondExpr);
       X = FalseExpr;
       C = TrueExpr;
     } else {
       X = TrueExpr;
       C = FalseExpr;
     }

llvm/test/Analysis/ScalarEvolution/increasing-or-decreasing-iv.ll

 ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
 ; RUN: opt -disable-output "-passes=print<scalar-evolution>" < %s 2>&1 | FileCheck %s
 
 define void @f0(i1 %c) {
 ; CHECK-LABEL: 'f0'
 ; CHECK-NEXT:  Classifying expressions for: @f0
 ; CHECK-NEXT:    %start = select i1 %c, i32 127, i32 0
-; CHECK-NEXT:    --> %start U: [0,128) S: [0,128)
+; CHECK-NEXT:    --> (127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) U: [127,1) S: [127,1)
 ; CHECK-NEXT:    %step = select i1 %c, i32 -1, i32 1
-; CHECK-NEXT:    --> %step U: [1,0) S: [-2,2)
+; CHECK-NEXT:    --> (-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw> U: [-1,2) S: [-1,2)
 ; CHECK-NEXT:    %loop.iv = phi i32 [ 0, %entry ], [ %loop.iv.inc, %loop ]
 ; CHECK-NEXT:    --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ]
-; CHECK-NEXT:    --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: ((127 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.next = add i32 %iv, %step
-; CHECK-NEXT:    --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(126 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-1 + (128 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %loop.iv.inc = add i32 %loop.iv, 1
 ; CHECK-NEXT:    --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @f0
 ; CHECK-NEXT:  Loop %loop: backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: max backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is 127
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %loop: Trip multiple is 128

 leave:
   ret void
 }
 
 define void @f1(i1 %c) {
 ; CHECK-LABEL: 'f1'
 ; CHECK-NEXT:  Classifying expressions for: @f1
 ; CHECK-NEXT:    %start = select i1 %c, i32 120, i32 0
-; CHECK-NEXT:    --> %start U: [0,121) S: [0,121)
+; CHECK-NEXT:    --> (120 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) U: [120,1) S: [120,1)
 ; CHECK-NEXT:    %step = select i1 %c, i32 -8, i32 8
-; CHECK-NEXT:    --> %step U: [8,-7) S: [-16,16)
+; CHECK-NEXT:    --> (-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw> U: [-8,9) S: [-8,9)
 ; CHECK-NEXT:    %loop.iv = phi i32 [ 0, %entry ], [ %loop.iv.inc, %loop ]
 ; CHECK-NEXT:    --> {0,+,1}<%loop> U: [0,16) S: [0,16) Exits: 15 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ]
-; CHECK-NEXT:    --> {%start,+,%step}<%loop> U: [0,121) S: [0,121) Exits: ((15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(120 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: ((15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.1 = add i32 %iv, 1
-; CHECK-NEXT:    --> {(1 + %start)<nuw><nsw>,+,%step}<%loop> U: [1,122) S: [1,122) Exits: (1 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(121 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (1 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.2 = add i32 %iv, 2
-; CHECK-NEXT:    --> {(2 + %start)<nuw><nsw>,+,%step}<%loop> U: [2,123) S: [2,123) Exits: (2 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(122 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (2 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.3 = add i32 %iv, 3
-; CHECK-NEXT:    --> {(3 + %start)<nuw><nsw>,+,%step}<%loop> U: [3,124) S: [3,124) Exits: (3 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(123 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (3 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.4 = add i32 %iv, 4
-; CHECK-NEXT:    --> {(4 + %start)<nuw><nsw>,+,%step}<%loop> U: [4,125) S: [4,125) Exits: (4 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(124 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (4 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.5 = add i32 %iv, 5
-; CHECK-NEXT:    --> {(5 + %start)<nuw><nsw>,+,%step}<%loop> U: [5,126) S: [5,126) Exits: (5 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(125 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (5 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.6 = add i32 %iv, 6
-; CHECK-NEXT:    --> {(6 + %start)<nuw><nsw>,+,%step}<%loop> U: [6,127) S: [6,127) Exits: (6 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(126 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (6 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.7 = add i32 %iv, 7
-; CHECK-NEXT:    --> {(7 + %start)<nuw><nsw>,+,%step}<%loop> U: [7,128) S: [7,128) Exits: (7 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(127 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (7 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.m1 = sub i32 %iv, 1
-; CHECK-NEXT:    --> {(-1 + %start)<nsw>,+,%step}<%loop> U: [-1,120) S: [-1,120) Exits: (-1 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(119 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw>,+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-1 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.m2 = sub i32 %iv, 2
-; CHECK-NEXT:    --> {(-2 + %start)<nsw>,+,%step}<%loop> U: [0,-1) S: [-2,119) Exits: (-2 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(118 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw>,+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-2 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.m3 = sub i32 %iv, 3
-; CHECK-NEXT:    --> {(-3 + %start)<nsw>,+,%step}<%loop> U: [-3,118) S: [-3,118) Exits: (-3 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(117 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw>,+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-3 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.m4 = sub i32 %iv, 4
-; CHECK-NEXT:    --> {(-4 + %start)<nsw>,+,%step}<%loop> U: [0,-3) S: [-4,117) Exits: (-4 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(116 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw>,+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-4 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.m5 = sub i32 %iv, 5
-; CHECK-NEXT:    --> {(-5 + %start)<nsw>,+,%step}<%loop> U: [-5,116) S: [-5,116) Exits: (-5 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(115 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw>,+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-5 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.m6 = sub i32 %iv, 6
-; CHECK-NEXT:    --> {(-6 + %start)<nsw>,+,%step}<%loop> U: [0,-1) S: [-6,115) Exits: (-6 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(114 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw>,+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-6 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.m7 = sub i32 %iv, 7
-; CHECK-NEXT:    --> {(-7 + %start)<nsw>,+,%step}<%loop> U: [-7,114) S: [-7,114) Exits: (-7 + (15 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(113 + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw>,+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-7 + (15 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.next = add i32 %iv, %step
-; CHECK-NEXT:    --> {(%step + %start),+,%step}<%loop> U: [0,-7) S: [-256,361) Exits: ((16 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(112 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-8 + (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-8 + (16 * (16 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-120 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %loop.iv.inc = add i32 %loop.iv, 1
 ; CHECK-NEXT:    --> {1,+,1}<%loop> U: [1,17) S: [1,17) Exits: 16 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @f1
 ; CHECK-NEXT:  Loop %loop: backedge-taken count is 15
 ; CHECK-NEXT:  Loop %loop: max backedge-taken count is 15
 ; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is 15
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %loop: Trip multiple is 16

 leave:
   ret void
 }
 
 define void @f2(i1 %c) {
 ; CHECK-LABEL: 'f2'
 ; CHECK-NEXT:  Classifying expressions for: @f2
 ; CHECK-NEXT:    %start = select i1 %c, i32 127, i32 0
-; CHECK-NEXT:    --> %start U: [0,128) S: [0,128)
+; CHECK-NEXT:    --> (127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) U: [127,1) S: [127,1)
 ; CHECK-NEXT:    %step = select i1 %c, i32 -1, i32 1
-; CHECK-NEXT:    --> %step U: [1,0) S: [-2,2)
+; CHECK-NEXT:    --> (-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw> U: [-1,2) S: [-1,2)
 ; CHECK-NEXT:    %loop.iv = phi i32 [ 0, %entry ], [ %loop.iv.inc, %loop ]
 ; CHECK-NEXT:    --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ]
-; CHECK-NEXT:    --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: ((127 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.sext = sext i32 %iv to i64
-; CHECK-NEXT:    --> {(zext i32 %start to i64),+,(sext i32 %step to i64)}<nsw><%loop> U: [0,128) S: [0,128) Exits: ((zext i32 %start to i64) + (127 * (sext i32 %step to i64))<nsw>) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> (sext i32 {(127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) Exits: (sext i32 ((127 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) to i64) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.next = add i32 %iv, %step
-; CHECK-NEXT:    --> {(%step + %start),+,%step}<nw><%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(126 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-1 + (128 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %loop.iv.inc = add i32 %loop.iv, 1
 ; CHECK-NEXT:    --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @f2
 ; CHECK-NEXT:  Loop %loop: backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: max backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is 127
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %loop: Trip multiple is 128

 leave:
   ret void
 }
 
 define void @f3(i1 %c) {
 ; CHECK-LABEL: 'f3'
 ; CHECK-NEXT:  Classifying expressions for: @f3
 ; CHECK-NEXT:    %start = select i1 %c, i16 1000, i16 0
-; CHECK-NEXT:    --> %start U: [0,1001) S: [0,1001)
+; CHECK-NEXT:    --> (1000 + (-1000 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>)) U: [1000,1) S: [1000,1)
 ; CHECK-NEXT:    %step = select i1 %c, i16 1, i16 509
-; CHECK-NEXT:    --> %step U: [1,510) S: [1,510)
+; CHECK-NEXT:    --> (1 + (508 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>))<nuw><nsw> U: [1,510) S: [1,510)
 ; CHECK-NEXT:    %loop.iv = phi i16 [ 0, %entry ], [ %loop.iv.inc, %loop ]
 ; CHECK-NEXT:    --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv = phi i16 [ %start, %entry ], [ %iv.next, %loop ]
-; CHECK-NEXT:    --> {%start,+,%step}<%loop> U: [0,-892) S: [0,-892) Exits: ((127 * %step)<nuw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(1000 + (-1000 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>)),+,(1 + (508 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>))<nuw><nsw>}<%loop> U: full-set S: full-set Exits: (1127 + (127 * (508 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>))<nuw> + (-1000 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.zext = zext i16 %iv to i64
-; CHECK-NEXT:    --> {(zext i16 %start to i64),+,(zext i16 %step to i64)}<nuw><%loop> U: [0,64644) S: [0,64644) Exits: ((zext i16 %start to i64) + (127 * (zext i16 %step to i64))<nuw><nsw>) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> (zext i16 {(1000 + (-1000 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>)),+,(1 + (508 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>))<nuw><nsw>}<%loop> to i64) U: [0,65536) S: [0,65536) Exits: (zext i16 (1127 + (127 * (508 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>))<nuw> + (-1000 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>)) to i64) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.next = add i16 %iv, %step
-; CHECK-NEXT:    --> {(%step + %start),+,%step}<nw><%loop> U: full-set S: full-set Exits: ((128 * %step)<nuw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(1001 + (508 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>) + (-1000 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>)),+,(1 + (508 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>))<nuw><nsw>}<%loop> U: full-set S: full-set Exits: (1128 + (128 * (508 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>))<nuw> + (-1000 umin (-1 + (-1 * (sext i1 %c to i16))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %loop.iv.inc = add i16 %loop.iv, 1
 ; CHECK-NEXT:    --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @f3
 ; CHECK-NEXT:  Loop %loop: backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: max backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is 127
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %loop: Trip multiple is 128

 leave:
   ret void
 }
 
 define void @f4(i1 %c) {
 ; CHECK-LABEL: 'f4'
 ; CHECK-NEXT:  Classifying expressions for: @f4
 ; CHECK-NEXT:    %start = select i1 %c, i32 127, i32 0
-; CHECK-NEXT:    --> %start U: [0,128) S: [0,128)
+; CHECK-NEXT:    --> (127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) U: [127,1) S: [127,1)
 ; CHECK-NEXT:    %step = select i1 %c, i32 -1, i32 1
-; CHECK-NEXT:    --> %step U: [1,0) S: [-2,2)
+; CHECK-NEXT:    --> (-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw> U: [-1,2) S: [-1,2)
 ; CHECK-NEXT:    %loop.iv = phi i32 [ 0, %entry ], [ %loop.iv.inc, %loop ]
 ; CHECK-NEXT:    --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ]
-; CHECK-NEXT:    --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: ((127 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.trunc = trunc i32 %iv to i16
-; CHECK-NEXT:    --> {(trunc i32 %start to i16),+,(trunc i32 %step to i16)}<%loop> U: full-set S: full-set Exits: ((trunc i32 %start to i16) + (127 * (trunc i32 %step to i16))<nsw>) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(127 + (trunc i32 (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16)),+,(-1 + (trunc i32 (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16))<nsw>}<%loop> U: full-set S: full-set Exits: ((trunc i32 (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16) + (127 * (trunc i32 (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16))<nuw><nsw>) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.next = add i32 %iv, %step
-; CHECK-NEXT:    --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(126 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-1 + (128 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %loop.iv.inc = add i32 %loop.iv, 1
 ; CHECK-NEXT:    --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @f4
 ; CHECK-NEXT:  Loop %loop: backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: max backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is 127
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %loop: Trip multiple is 128

 leave:
   ret void
 }
 
 define void @f5(i1 %c) {
 ; CHECK-LABEL: 'f5'
 ; CHECK-NEXT:  Classifying expressions for: @f5
 ; CHECK-NEXT:    %start = select i1 %c, i32 127, i32 0
-; CHECK-NEXT:    --> %start U: [0,128) S: [0,128)
+; CHECK-NEXT:    --> (127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) U: [127,1) S: [127,1)
 ; CHECK-NEXT:    %step = select i1 %c, i32 -1, i32 1
-; CHECK-NEXT:    --> %step U: [1,0) S: [-2,2)
+; CHECK-NEXT:    --> (-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw> U: [-1,2) S: [-1,2)
 ; CHECK-NEXT:    %loop.iv = phi i16 [ 0, %entry ], [ %loop.iv.inc, %loop ]
 ; CHECK-NEXT:    --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ]
-; CHECK-NEXT:    --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: ((127 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.trunc = trunc i32 %iv to i16
-; CHECK-NEXT:    --> {(trunc i32 %start to i16),+,(trunc i32 %step to i16)}<%loop> U: [0,128) S: [0,128) Exits: ((trunc i32 %start to i16) + (127 * (trunc i32 %step to i16))<nsw>) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(127 + (trunc i32 (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16)),+,(-1 + (trunc i32 (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16))<nsw>}<%loop> U: full-set S: full-set Exits: ((trunc i32 (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16) + (127 * (trunc i32 (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16))<nuw><nsw>) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.next = add i32 %iv, %step
-; CHECK-NEXT:    --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(126 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-1 + (128 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %loop.iv.inc = add i16 %loop.iv, 1
 ; CHECK-NEXT:    --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @f5
 ; CHECK-NEXT:  Loop %loop: backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: max backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is 127
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %loop: Trip multiple is 128

 leave:
   ret void
 }
 
 define void @f6(i1 %c) {
 ; CHECK-LABEL: 'f6'
 ; CHECK-NEXT:  Classifying expressions for: @f6
 ; CHECK-NEXT:    %start = select i1 %c, i32 127, i32 0
-; CHECK-NEXT:    --> %start U: [0,128) S: [0,128)
+; CHECK-NEXT:    --> (127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) U: [127,1) S: [127,1)
 ; CHECK-NEXT:    %step = select i1 %c, i32 -2, i32 0
-; CHECK-NEXT:    --> %step U: [0,-1) S: [-2,2)
+; CHECK-NEXT:    --> (-2 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw> U: [-2,1) S: [-2,1)
 ; CHECK-NEXT:    %loop.iv = phi i16 [ 0, %entry ], [ %loop.iv.inc, %loop ]
 ; CHECK-NEXT:    --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ]
-; CHECK-NEXT:    --> {%start,+,(1 + %step)<nuw><nsw>}<%loop> U: [0,128) S: [0,128) Exits: (127 + (127 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: ((127 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %step.plus.one = add i32 %step, 1
-; CHECK-NEXT:    --> (1 + %step)<nuw><nsw> U: [1,0) S: [-1,3) Exits: (1 + %step)<nuw><nsw> LoopDispositions: { %loop: Invariant }
+; CHECK-NEXT:    --> (-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw> U: [-1,2) S: [-1,2) Exits: (-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw> LoopDispositions: { %loop: Invariant }
 ; CHECK-NEXT:    %iv.next = add i32 %iv, %step.plus.one
-; CHECK-NEXT:    --> {(1 + %step + %start),+,(1 + %step)<nuw><nsw>}<%loop> U: [-128,384) S: [-128,384) Exits: (128 + (128 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(126 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-1 + (128 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.sext = sext i32 %iv to i64
-; CHECK-NEXT:    --> {(zext i32 %start to i64),+,(1 + (sext i32 %step to i64))<nuw><nsw>}<nsw><%loop> U: [0,128) S: [0,128) Exits: (127 + (zext i32 %start to i64) + (127 * (sext i32 %step to i64))<nsw>) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> (sext i32 {(127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) Exits: (sext i32 ((127 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) to i64) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %loop.iv.inc = add i16 %loop.iv, 1
 ; CHECK-NEXT:    --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @f6
 ; CHECK-NEXT:  Loop %loop: backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: max backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is 127
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %loop: Trip multiple is 128

 leave:
   ret void
 }
 
 define void @f7(i1 %c) {
 ; CHECK-LABEL: 'f7'
 ; CHECK-NEXT:  Classifying expressions for: @f7
 ; CHECK-NEXT:    %start = select i1 %c, i32 127, i32 0
-; CHECK-NEXT:    --> %start U: [0,128) S: [0,128)
+; CHECK-NEXT:    --> (127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) U: [127,1) S: [127,1)
 ; CHECK-NEXT:    %step = select i1 %c, i32 -1, i32 1
-; CHECK-NEXT:    --> %step U: [1,0) S: [-2,2)
+; CHECK-NEXT:    --> (-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw> U: [-1,2) S: [-1,2)
 ; CHECK-NEXT:    %loop.iv = phi i16 [ 0, %entry ], [ %loop.iv.inc, %loop ]
 ; CHECK-NEXT:    --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ]
-; CHECK-NEXT:    --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(127 + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: ((127 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.trunc = trunc i32 %iv to i16
-; CHECK-NEXT:    --> {(trunc i32 %start to i16),+,(trunc i32 %step to i16)}<%loop> U: [0,128) S: [0,128) Exits: ((trunc i32 %start to i16) + (127 * (trunc i32 %step to i16))<nsw>) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(127 + (trunc i32 (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16)),+,(-1 + (trunc i32 (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16))<nsw>}<%loop> U: full-set S: full-set Exits: ((trunc i32 (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16) + (127 * (trunc i32 (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16))<nuw><nsw>) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.next = add i32 %iv, %step
-; CHECK-NEXT:    --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(126 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<%loop> U: full-set S: full-set Exits: (-1 + (128 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.trunc.plus.one = add i16 %iv.trunc, 1
-; CHECK-NEXT:    --> {(1 + (trunc i32 %start to i16))<nuw><nsw>,+,(trunc i32 %step to i16)}<%loop> U: [1,129) S: [1,129) Exits: (1 + (trunc i32 %start to i16) + (127 * (trunc i32 %step to i16))<nsw>) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(128 + (trunc i32 (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16)),+,(-1 + (trunc i32 (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16))<nsw>}<%loop> U: full-set S: full-set Exits: (1 + (trunc i32 (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16) + (127 * (trunc i32 (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16))<nuw><nsw>) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.trunc.plus.two = add i16 %iv.trunc, 2
-; CHECK-NEXT:    --> {(2 + (trunc i32 %start to i16))<nuw><nsw>,+,(trunc i32 %step to i16)}<%loop> U: [2,130) S: [2,130) Exits: (2 + (trunc i32 %start to i16) + (127 * (trunc i32 %step to i16))<nsw>) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(129 + (trunc i32 (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16)),+,(-1 + (trunc i32 (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16))<nsw>}<%loop> U: full-set S: full-set Exits: (2 + (trunc i32 (-127 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16) + (127 * (trunc i32 (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i16))<nuw><nsw>) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %loop.iv.inc = add i16 %loop.iv, 1
 ; CHECK-NEXT:    --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @f7
 ; CHECK-NEXT:  Loop %loop: backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: max backedge-taken count is 127
 ; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is 127
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %loop: Trip multiple is 128

llvm/test/Analysis/ScalarEvolution/logical-operations.ll

;
   %r = select i1 %c, i1 true, i1 %x
   ret i1 %r
 }
 
 define i32 @select_x_or_zero(i1 %c, i32 %x) {
 ; CHECK-LABEL: 'select_x_or_zero'
 ; CHECK-NEXT:  Classifying expressions for: @select_x_or_zero
 ; CHECK-NEXT:    %r = select i1 %c, i32 %x, i32 0
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> ((sext i1 %c to i32) umin_seq %x) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_x_or_zero
 ;
   %r = select i1 %c, i32 %x, i32 0
   ret i32 %r
 }
 
 define i32 @select_zero_or_x(i1 %c, i32 %x) {
 ; CHECK-LABEL: 'select_zero_or_x'
 ; CHECK-NEXT:  Classifying expressions for: @select_zero_or_x
 ; CHECK-NEXT:    %r = select i1 %c, i32 0, i32 %x
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> ((-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw> umin_seq %x) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_zero_or_x
 ;
   %r = select i1 %c, i32 0, i32 %x
   ret i32 %r
 }
 
 define i32 @select_x_or_allones(i1 %c, i32 %x) {
 ; CHECK-LABEL: 'select_x_or_allones'
 ; CHECK-NEXT:  Classifying expressions for: @select_x_or_allones
 ; CHECK-NEXT:    %r = select i1 %c, i32 %x, i32 -1
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> (-1 + ((sext i1 %c to i32) umin_seq (1 + %x))) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_x_or_allones
 ;
   %r = select i1 %c, i32 %x, i32 -1
   ret i32 %r
 }
 
 define i32 @select_allones_or_x(i1 %c, i32 %x) {
 ; CHECK-LABEL: 'select_allones_or_x'
 ; CHECK-NEXT:  Classifying expressions for: @select_allones_or_x
 ; CHECK-NEXT:    %r = select i1 %c, i32 -1, i32 %x
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> (-1 + ((-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw> umin_seq (1 + %x))) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_allones_or_x
 ;
   %r = select i1 %c, i32 -1, i32 %x
   ret i32 %r
 }
 
 define i32 @select_x_or_intmax(i1 %c, i32 %x) {
 ; CHECK-LABEL: 'select_x_or_intmax'
 ; CHECK-NEXT:  Classifying expressions for: @select_x_or_intmax
 ; CHECK-NEXT:    %r = select i1 %c, i32 %x, i32 2147483647
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> (2147483647 + ((sext i1 %c to i32) umin_seq (-2147483647 + %x))) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_x_or_intmax
 ;
   %r = select i1 %c, i32 %x, i32 2147483647
   ret i32 %r
 }
 
 define i32 @select_intmax_or_x(i1 %c, i32 %x) {
 ; CHECK-LABEL: 'select_intmax_or_x'
 ; CHECK-NEXT:  Classifying expressions for: @select_intmax_or_x
 ; CHECK-NEXT:    %r = select i1 %c, i32 2147483647, i32 %x
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> (2147483647 + ((-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw> umin_seq (-2147483647 + %x))) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_intmax_or_x
 ;
   %r = select i1 %c, i32 2147483647, i32 %x
   ret i32 %r
 }
 
 define i32 @select_x_or_intmin(i1 %c, i32 %x) {
 ; CHECK-LABEL: 'select_x_or_intmin'
 ; CHECK-NEXT:  Classifying expressions for: @select_x_or_intmin
 ; CHECK-NEXT:    %r = select i1 %c, i32 %x, i32 -2147483648
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> (-2147483648 + ((sext i1 %c to i32) umin_seq (-2147483648 + %x))) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_x_or_intmin
 ;
   %r = select i1 %c, i32 %x, i32 -2147483648
   ret i32 %r
 }
 
 define i32 @select_intmin_or_x(i1 %c, i32 %x) {
 ; CHECK-LABEL: 'select_intmin_or_x'
 ; CHECK-NEXT:  Classifying expressions for: @select_intmin_or_x
 ; CHECK-NEXT:    %r = select i1 %c, i32 -2147483648, i32 %x
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> (-2147483648 + ((-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw> umin_seq (-2147483648 + %x))) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_intmin_or_x
 ;
   %r = select i1 %c, i32 -2147483648, i32 %x
   ret i32 %r
 }
 
 define i32 @select_x_or_constant(i1 %c, i32 %x) {
 ; CHECK-LABEL: 'select_x_or_constant'
 ; CHECK-NEXT:  Classifying expressions for: @select_x_or_constant
 ; CHECK-NEXT:    %r = select i1 %c, i32 %x, i32 42
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> (42 + ((sext i1 %c to i32) umin_seq (-42 + %x))) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_x_or_constant
 ;
   %r = select i1 %c, i32 %x, i32 42
   ret i32 %r
 }
 
 define i32 @select_constant_or_x(i1 %c, i32 %y) {
 ; CHECK-LABEL: 'select_constant_or_x'
 ; CHECK-NEXT:  Classifying expressions for: @select_constant_or_x
 ; CHECK-NEXT:    %r = select i1 %c, i32 42, i32 %y
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> (42 + ((-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw> umin_seq (-42 + %y))) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_constant_or_x
 ;
   %r = select i1 %c, i32 42, i32 %y
   ret i32 %r
 }
 
 define i32 @select_between_constants(i1 %c, i32 %y) {
 ; CHECK-LABEL: 'select_between_constants'
 ; CHECK-NEXT:  Classifying expressions for: @select_between_constants
 ; CHECK-NEXT:    %r = select i1 %c, i32 42, i32 24
-; CHECK-NEXT:    --> %r U: [8,59) S: [8,59)
+; CHECK-NEXT:    --> (42 + (-18 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) U: [42,25) S: [42,25)
 ; CHECK-NEXT:  Determining loop execution counts for: @select_between_constants
 ;
   %r = select i1 %c, i32 42, i32 24
   ret i32 %r
 }
 
 define i32 @select_x_or_y(i1 %c, i32 %x, i32 %y) {
 ; CHECK-LABEL: 'select_x_or_y'

 }
 
 define i32 @umin_seq_x_y(i32 %x, i32 %y) {
 ; CHECK-LABEL: 'umin_seq_x_y'
 ; CHECK-NEXT:  Classifying expressions for: @umin_seq_x_y
 ; CHECK-NEXT:    %umin = call i32 @llvm.umin.i32(i32 %y, i32 %x)
 ; CHECK-NEXT:    --> (%x umin %y) U: full-set S: full-set
 ; CHECK-NEXT:    %r = select i1 %x.is.zero, i32 0, i32 %umin
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> ((-1 + (-1 * (sext i1 %x.is.zero to i32))<nsw>)<nsw> umin_seq (%x umin %y)) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @umin_seq_x_y
 ;
   %umin = call i32 @llvm.umin(i32 %y, i32 %x)
   %x.is.zero = icmp eq i32 %x, 0
   %r = select i1 %x.is.zero, i32 0, i32 %umin
   ret i32 %r
 }
 
 define i32 @umin_seq_y_x(i32 %x, i32 %y) {
 ; CHECK-LABEL: 'umin_seq_y_x'
 ; CHECK-NEXT:  Classifying expressions for: @umin_seq_y_x
 ; CHECK-NEXT:    %umin = call i32 @llvm.umin.i32(i32 %x, i32 %y)
 ; CHECK-NEXT:    --> (%x umin %y) U: full-set S: full-set
 ; CHECK-NEXT:    %r = select i1 %x.is.zero, i32 0, i32 %umin
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> ((-1 + (-1 * (sext i1 %x.is.zero to i32))<nsw>)<nsw> umin_seq (%x umin %y)) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @umin_seq_y_x
 ;
   %umin = call i32 @llvm.umin(i32 %x, i32 %y)
   %x.is.zero = icmp eq i32 %y, 0
   %r = select i1 %x.is.zero, i32 0, i32 %umin
   ret i32 %r
 }
 
 define i32 @umin_seq_x_y_z(i32 %x, i32 %y, i32 %z) {
 ; CHECK-LABEL: 'umin_seq_x_y_z'
 ; CHECK-NEXT:  Classifying expressions for: @umin_seq_x_y_z
 ; CHECK-NEXT:    %umin0 = call i32 @llvm.umin.i32(i32 %z, i32 %x)
 ; CHECK-NEXT:    --> (%x umin %z) U: full-set S: full-set
 ; CHECK-NEXT:    %umin = call i32 @llvm.umin.i32(i32 %umin0, i32 %y)
 ; CHECK-NEXT:    --> (%x umin %y umin %z) U: full-set S: full-set
 ; CHECK-NEXT:    %r0 = select i1 %y.is.zero, i32 0, i32 %umin
-; CHECK-NEXT:    --> %r0 U: full-set S: full-set
+; CHECK-NEXT:    --> ((-1 + (-1 * (sext i1 %y.is.zero to i32))<nsw>)<nsw> umin_seq (%x umin %y umin %z)) U: full-set S: full-set
 ; CHECK-NEXT:    %r = select i1 %x.is.zero, i32 0, i32 %r0
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> ((-1 + (-1 * (sext i1 %x.is.zero to i32))<nsw>)<nsw> umin_seq (-1 + (-1 * (sext i1 %y.is.zero to i32))<nsw>)<nsw> umin_seq (%x umin %y umin %z)) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @umin_seq_x_y_z
 ;
   %umin0 = call i32 @llvm.umin(i32 %z, i32 %x)
   %umin = call i32 @llvm.umin(i32 %umin0, i32 %y)
   %x.is.zero = icmp eq i32 %x, 0
   %y.is.zero = icmp eq i32 %y, 0
   %r0 = select i1 %y.is.zero, i32 0, i32 %umin
   %r = select i1 %x.is.zero, i32 0, i32 %r0
   ret i32 %r
 }
 
 define i32 @select_x_or_zero_expanded(i1 %c, i32 %x) {
 ; CHECK-LABEL: 'select_x_or_zero_expanded'
 ; CHECK-NEXT:  Classifying expressions for: @select_x_or_zero_expanded
 ; CHECK-NEXT:    %c.splat = sext i1 %c to i32
 ; CHECK-NEXT:    --> (sext i1 %c to i32) U: [-1,1) S: [-1,1)
 ; CHECK-NEXT:    %umin = call i32 @llvm.umin.i32(i32 %c.splat, i32 %x)
 ; CHECK-NEXT:    --> ((sext i1 %c to i32) umin %x) U: full-set S: full-set
 ; CHECK-NEXT:    %r = select i1 %v0.is.zero, i32 0, i32 %umin
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> ((-1 + (-1 * (sext i1 %v0.is.zero to i32))<nsw>)<nsw> umin_seq ((sext i1 %c to i32) umin %x)) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_x_or_zero_expanded
 ;
   %c.splat = sext i1 %c to i32
   %umin = call i32 @llvm.umin(i32 %c.splat, i32 %x)
   %v0.is.zero = icmp eq i32 %c.splat, 0
   %r = select i1 %v0.is.zero, i32 0, i32 %umin
   ret i32 %r
 }
 
 define i32 @select_zero_or_x_expanded(i1 %c, i32 %y) {
 ; CHECK-LABEL: 'select_zero_or_x_expanded'
 ; CHECK-NEXT:  Classifying expressions for: @select_zero_or_x_expanded
 ; CHECK-NEXT:    %c.splat = sext i1 %c to i32
 ; CHECK-NEXT:    --> (sext i1 %c to i32) U: [-1,1) S: [-1,1)
 ; CHECK-NEXT:    %c.splat.not = xor i32 %c.splat, -1
 ; CHECK-NEXT:    --> (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw> U: [-1,1) S: [-1,1)
 ; CHECK-NEXT:    %umin = call i32 @llvm.umin.i32(i32 %c.splat.not, i32 %y)
 ; CHECK-NEXT:    --> ((-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw> umin %y) U: full-set S: full-set
 ; CHECK-NEXT:    %r = select i1 %v0.is.zero, i32 0, i32 %umin
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> ((-1 + (-1 * (sext i1 %v0.is.zero to i32))<nsw>)<nsw> umin_seq ((-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw> umin %y)) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_zero_or_x_expanded
 ;
   %c.splat = sext i1 %c to i32
   %c.splat.not = xor i32 %c.splat, -1
   %umin = call i32 @llvm.umin(i32 %c.splat.not, i32 %y)
   %v0.is.zero = icmp eq i32 %c.splat.not, 0
   %r = select i1 %v0.is.zero, i32 0, i32 %umin
   ret i32 %r
 }
 define i32 @select_zero_or_x_expanded2(i1 %c, i32 %y) {
 ; CHECK-LABEL: 'select_zero_or_x_expanded2'
 ; CHECK-NEXT:  Classifying expressions for: @select_zero_or_x_expanded2
 ; CHECK-NEXT:    %c.not = xor i1 %c, true
 ; CHECK-NEXT:    --> (true + %c) U: full-set S: full-set
 ; CHECK-NEXT:    %c.not.splat = sext i1 %c.not to i32
 ; CHECK-NEXT:    --> (sext i1 (true + %c) to i32) U: [-1,1) S: [-1,1)
 ; CHECK-NEXT:    %umin = call i32 @llvm.umin.i32(i32 %c.not.splat, i32 %y)
 ; CHECK-NEXT:    --> ((sext i1 (true + %c) to i32) umin %y) U: full-set S: full-set
 ; CHECK-NEXT:    %r = select i1 %v0.is.zero, i32 0, i32 %umin
-; CHECK-NEXT:    --> %r U: full-set S: full-set
+; CHECK-NEXT:    --> ((-1 + (-1 * (sext i1 %v0.is.zero to i32))<nsw>)<nsw> umin_seq ((sext i1 (true + %c) to i32) umin %y)) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_zero_or_x_expanded2
 ;
   %c.not = xor i1 %c, -1
   %c.not.splat = sext i1 %c.not to i32
   %umin = call i32 @llvm.umin(i32 %c.not.splat, i32 %y)
   %v0.is.zero = icmp eq i32 %c.not.splat, 0
   %r = select i1 %v0.is.zero, i32 0, i32 %umin
   ret i32 %r
 }
 
 define i32 @select_x_or_constant_expanded(i1 %c, i32 %x) {
 ; CHECK-LABEL: 'select_x_or_constant_expanded'
 ; CHECK-NEXT:  Classifying expressions for: @select_x_or_constant_expanded
 ; CHECK-NEXT:    %c.splat = sext i1 %c to i32
 ; CHECK-NEXT:    --> (sext i1 %c to i32) U: [-1,1) S: [-1,1)
 ; CHECK-NEXT:    %x.off = sub i32 %x, 42
 ; CHECK-NEXT:    --> (-42 + %x) U: full-set S: full-set
 ; CHECK-NEXT:    %umin = call i32 @llvm.umin.i32(i32 %c.splat, i32 %x.off)
 ; CHECK-NEXT:    --> ((sext i1 %c to i32) umin (-42 + %x)) U: full-set S: full-set
 ; CHECK-NEXT:    %r.off = select i1 %v0.is.zero, i32 0, i32 %umin
-; CHECK-NEXT:    --> %r.off U: full-set S: full-set
+; CHECK-NEXT:    --> ((-1 + (-1 * (sext i1 %v0.is.zero to i32))<nsw>)<nsw> umin_seq ((sext i1 %c to i32) umin (-42 + %x))) U: full-set S: full-set
 ; CHECK-NEXT:    %r = add i32 %r.off, 42
-; CHECK-NEXT:    --> (42 + %r.off) U: full-set S: full-set
+; CHECK-NEXT:    --> (42 + ((-1 + (-1 * (sext i1 %v0.is.zero to i32))<nsw>)<nsw> umin_seq ((sext i1 %c to i32) umin (-42 + %x)))) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_x_or_constant_expanded
 ;
   %c.splat = sext i1 %c to i32
   %x.off = sub i32 %x, 42
   %umin = call i32 @llvm.umin(i32 %c.splat, i32 %x.off)
   %v0.is.zero = icmp eq i32 %c.splat, 0
   %r.off = select i1 %v0.is.zero, i32 0, i32 %umin
   %r = add i32 %r.off, 42
   ret i32 %r
 }
 
 define i32 @select_constant_or_y_expanded(i1 %c, i32 %y) {
 ; CHECK-LABEL: 'select_constant_or_y_expanded'
 ; CHECK-NEXT:  Classifying expressions for: @select_constant_or_y_expanded
 ; CHECK-NEXT:    %c.splat = sext i1 %c to i32
 ; CHECK-NEXT:    --> (sext i1 %c to i32) U: [-1,1) S: [-1,1)
 ; CHECK-NEXT:    %c.splat.not = xor i32 %c.splat, -1
 ; CHECK-NEXT:    --> (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw> U: [-1,1) S: [-1,1)
 ; CHECK-NEXT:    %y.off = sub i32 %y, 42
 ; CHECK-NEXT:    --> (-42 + %y) U: full-set S: full-set
 ; CHECK-NEXT:    %umin = call i32 @llvm.umin.i32(i32 %c.splat.not, i32 %y.off)
 ; CHECK-NEXT:    --> ((-42 + %y) umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) U: full-set S: full-set
 ; CHECK-NEXT:    %r.off = select i1 %v0.is.zero, i32 0, i32 %umin
-; CHECK-NEXT:    --> %r.off U: full-set S: full-set
+; CHECK-NEXT:    --> ((-1 + (-1 * (sext i1 %v0.is.zero to i32))<nsw>)<nsw> umin_seq ((-42 + %y) umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) U: full-set S: full-set
 ; CHECK-NEXT:    %r = add i32 %r.off, 42
-; CHECK-NEXT:    --> (42 + %r.off) U: full-set S: full-set
+; CHECK-NEXT:    --> (42 + ((-1 + (-1 * (sext i1 %v0.is.zero to i32))<nsw>)<nsw> umin_seq ((-42 + %y) umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @select_constant_or_y_expanded
 ;
   %c.splat = sext i1 %c to i32
   %c.splat.not = xor i32 %c.splat, -1
   %y.off = sub i32 %y, 42
   %umin = call i32 @llvm.umin(i32 %c.splat.not, i32 %y.off)
   %v0.is.zero = icmp eq i32 %c.splat.not, 0
   %r.off = select i1 %v0.is.zero, i32 0, i32 %umin
   %r = add i32 %r.off, 42
   ret i32 %r
 }
 
 declare i32 @llvm.umin(i32, i32)

llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info-rewrite-expressions.ll

 }
 
 define void @guard_pessimizes_analysis_step2(i1 %c, i32 %N) {
 ; CHECK-LABEL: 'guard_pessimizes_analysis_step2'
 ; CHECK-NEXT:  Classifying expressions for: @guard_pessimizes_analysis_step2
 ; CHECK-NEXT:    %N.ext = zext i32 %N to i64
 ; CHECK-NEXT:    --> (zext i32 %N to i64) U: [0,4294967296) S: [0,4294967296)
 ; CHECK-NEXT:    %init = phi i64 [ 2, %entry ], [ 4, %bb1 ]
-; CHECK-NEXT:    --> %init U: [2,5) S: [2,5)
+; CHECK-NEXT:    --> (4 + (-2 umin (-1 + (-1 * (sext i1 %c to i64))<nsw>)<nsw>)) U: [4,3) S: [4,3)
 ; CHECK-NEXT:    %iv = phi i64 [ %iv.next, %loop ], [ %init, %loop.ph ]
-; CHECK-NEXT:    --> {%init,+,2}<%loop> U: [2,17) S: [2,17) Exits: ((2 * ((14 + (-1 * %init)<nsw>)<nsw> /u 2))<nuw><nsw> + %init) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(4 + (-2 umin (-1 + (-1 * (sext i1 %c to i64))<nsw>)<nsw>)),+,2}<%loop> U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.next = add i64 %iv, 2
-; CHECK-NEXT:    --> {(2 + %init)<nuw><nsw>,+,2}<%loop> U: [4,19) S: [4,19) Exits: (2 + (2 * ((14 + (-1 * %init)<nsw>)<nsw> /u 2))<nuw><nsw> + %init) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(6 + (-2 umin (-1 + (-1 * (sext i1 %c to i64))<nsw>)<nsw>)),+,2}<%loop> U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @guard_pessimizes_analysis_step2
-; CHECK-NEXT:  Loop %loop: backedge-taken count is ((14 + (-1 * %init)<nsw>)<nsw> /u 2)
-; CHECK-NEXT:  Loop %loop: max backedge-taken count is 6
-; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is ((14 + (-1 * %init)<nsw>)<nsw> /u 2)
-; CHECK-NEXT:   Predicates:
-; CHECK:       Loop %loop: Trip multiple is 1
+; CHECK-NEXT:  Loop %loop: Unpredictable backedge-taken count.
+; CHECK-NEXT:  Loop %loop: Unpredictable max backedge-taken count.
+; CHECK-NEXT:  Loop %loop: Unpredictable predicated backedge-taken count.
 ;
 entry:
   %N.ext = zext i32 %N to i64
   br i1 %c, label %bb1, label %guard
 
 bb1:
   br label %guard
 

llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll

 
 ; Function Attrs: nounwind willreturn
 declare void @llvm.assume(i1 noundef)
 
 define void @guard_pessimizes_analysis_step1(i1 %c, i32 %N) {
 ; CHECK-LABEL: 'guard_pessimizes_analysis_step1'
 ; CHECK-NEXT:  Classifying expressions for: @guard_pessimizes_analysis_step1
 ; CHECK-NEXT:    %init = phi i32 [ 2, %entry ], [ 3, %bb1 ]
-; CHECK-NEXT:    --> %init U: [2,4) S: [2,4)
+; CHECK-NEXT:    --> (2 + (-1 * (sext i1 %c to i32))<nsw>)<nuw><nsw> U: [2,4) S: [2,4)
 ; CHECK-NEXT:    %iv = phi i32 [ %iv.next, %loop ], [ %init, %loop.ph ]
-; CHECK-NEXT:    --> {%init,+,1}<%loop> U: [2,11) S: [2,11) Exits: 9 LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(2 + (-1 * (sext i1 %c to i32))<nsw>)<nuw><nsw>,+,1}<%loop> U: [2,11) S: [2,11) Exits: 9 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.next = add i32 %iv, 1
-; CHECK-NEXT:    --> {(1 + %init)<nuw><nsw>,+,1}<%loop> U: [3,12) S: [3,12) Exits: 10 LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(3 + (-1 * (sext i1 %c to i32))<nsw>)<nuw><nsw>,+,1}<%loop> U: [3,12) S: [3,12) Exits: 10 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @guard_pessimizes_analysis_step1
-; CHECK-NEXT:  Loop %loop: backedge-taken count is (9 + (-1 * %init)<nsw>)<nsw>
+; CHECK-NEXT:  Loop %loop: backedge-taken count is (7 + (sext i1 %c to i32))<nsw>
 ; CHECK-NEXT:  Loop %loop: max backedge-taken count is 7
-; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is (9 + (-1 * %init)<nsw>)<nsw>
+; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is (7 + (sext i1 %c to i32))<nsw>
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %loop: Trip multiple is 1
 ;
 entry:
   br i1 %c, label %bb1, label %guard
 
 bb1:
   br label %guard

 exit:
   ret void
 }
 
 define void @guard_pessimizes_analysis_step2(i1 %c, i32 %N) {
 ; CHECK-LABEL: 'guard_pessimizes_analysis_step2'
 ; CHECK-NEXT:  Classifying expressions for: @guard_pessimizes_analysis_step2
 ; CHECK-NEXT:    %init = phi i32 [ 2, %entry ], [ 3, %bb1 ]
-; CHECK-NEXT:    --> %init U: [2,4) S: [2,4)
+; CHECK-NEXT:    --> (2 + (-1 * (sext i1 %c to i32))<nsw>)<nuw><nsw> U: [2,4) S: [2,4)
 ; CHECK-NEXT:    %iv = phi i32 [ %iv.next, %loop ], [ %init, %loop.ph ]
-; CHECK-NEXT:    --> {%init,+,2}<nuw><nsw><%loop> U: [2,10) S: [2,10) Exits: ((2 * ((8 + (-1 * %init)<nsw>)<nsw> /u 2))<nuw><nsw> + %init) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(2 + (-1 * (sext i1 %c to i32))<nsw>)<nuw><nsw>,+,2}<nuw><nsw><%loop> U: [2,10) S: [2,10) Exits: (2 + (2 * ((6 + (sext i1 %c to i32))<nsw> /u 2))<nuw><nsw> + (-1 * (sext i1 %c to i32))<nsw>) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.next = add nuw nsw i32 %iv, 2
-; CHECK-NEXT:    --> {(2 + %init)<nuw><nsw>,+,2}<nuw><nsw><%loop> U: [4,12) S: [4,12) Exits: (2 + (2 * ((8 + (-1 * %init)<nsw>)<nsw> /u 2))<nuw><nsw> + %init) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(4 + (-1 * (sext i1 %c to i32))<nsw>)<nuw><nsw>,+,2}<nuw><nsw><%loop> U: [4,12) S: [4,12) Exits: (4 + (2 * ((6 + (sext i1 %c to i32))<nsw> /u 2))<nuw><nsw> + (-1 * (sext i1 %c to i32))<nsw>) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @guard_pessimizes_analysis_step2
-; CHECK-NEXT:  Loop %loop: backedge-taken count is ((8 + (-1 * %init)<nsw>)<nsw> /u 2)
+; CHECK-NEXT:  Loop %loop: backedge-taken count is ((6 + (sext i1 %c to i32))<nsw> /u 2)
 ; CHECK-NEXT:  Loop %loop: max backedge-taken count is 3
-; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is ((8 + (-1 * %init)<nsw>)<nsw> /u 2)
+; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is ((6 + (sext i1 %c to i32))<nsw> /u 2)
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %loop: Trip multiple is 1
 ;
 entry:
   br i1 %c, label %bb1, label %guard
 
 bb1:
   br label %guard

 }
 
 ; Same as @optimized_range_check_unsigned, but %N already has a range limited
 ; to [2,4) beforehand.
 define void @optimized_range_check_unsigned3(i16* %pred, i1 %c) {
 ; CHECK-LABEL: 'optimized_range_check_unsigned3'
 ; CHECK-NEXT:  Classifying expressions for: @optimized_range_check_unsigned3
 ; CHECK-NEXT:    %N = select i1 %c, i32 2, i32 3
-; CHECK-NEXT:    --> %N U: [2,4) S: [2,4)
+; CHECK-NEXT:    --> (2 + (1 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> U: [2,4) S: [2,4)
 ; CHECK-NEXT:    %N.off = add i32 %N, -1
-; CHECK-NEXT:    --> (-1 + %N)<nsw> U: [1,3) S: [1,3)
+; CHECK-NEXT:    --> (1 + (1 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> U: [1,3) S: [1,3)
 ; CHECK-NEXT:    %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
-; CHECK-NEXT:    --> {0,+,1}<nuw><nsw><%loop> U: [0,3) S: [0,3) Exits: (-1 + %N)<nsw> LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {0,+,1}<nuw><nsw><%loop> U: [0,3) S: [0,3) Exits: (1 + (1 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %gep = getelementptr inbounds i16, i16* %pred, i32 %iv
-; CHECK-NEXT:    --> {%pred,+,2}<nuw><%loop> U: full-set S: full-set Exits: ((2 * (zext i32 (-1 + %N)<nsw> to i64))<nuw><nsw> + %pred) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {%pred,+,2}<nuw><%loop> U: full-set S: full-set Exits: (2 + (2 * (zext i32 (1 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i64))<nuw><nsw> + %pred) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.next = add nuw nsw i32 %iv, 1
-; CHECK-NEXT:    --> {1,+,1}<nuw><nsw><%loop> U: [1,4) S: [1,4) Exits: %N LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {1,+,1}<nuw><nsw><%loop> U: [1,4) S: [1,4) Exits: (2 + (1 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @optimized_range_check_unsigned3
-; CHECK-NEXT:  Loop %loop: backedge-taken count is (-1 + %N)<nsw>
+; CHECK-NEXT:  Loop %loop: backedge-taken count is (1 + (1 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw>
 ; CHECK-NEXT:  Loop %loop: max backedge-taken count is 2
-; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is (-1 + %N)<nsw>
+; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is (1 + (1 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw>
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %loop: Trip multiple is 1
 ;
 entry:
   %N = select i1 %c, i32 2, i32 3
   %N.off = add i32 %N, -1
   %cmp = icmp ult i32 %N.off, 7
   br i1 %cmp, label %loop, label %exit

llvm/test/Analysis/ScalarEvolution/nsw.ll

 define void @select_cond_poison_propagation(double* %p, i32 %x) nounwind {
 ; CHECK-LABEL: 'select_cond_poison_propagation'
 ; CHECK-NEXT:  Classifying expressions for: @select_cond_poison_propagation
 ; CHECK-NEXT:    %iv = phi i32 [ %iv.next, %loop ], [ 0, %entry ]
 ; CHECK-NEXT:    --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.next = add nsw i32 %iv, 1
 ; CHECK-NEXT:    --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %sel = select i1 %cmp, i32 10, i32 20
-; CHECK-NEXT:    --> %sel U: [0,31) S: [0,31) Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
+; CHECK-NEXT:    --> (10 + (10 umin (-1 + (-1 * (sext i1 %cmp to i32))<nsw>)<nsw>))<nuw><nsw> U: [10,21) S: [10,21) Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
 ; CHECK-NEXT:    %cond = call i1 @cond()
 ; CHECK-NEXT:    --> %cond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
 ; CHECK-NEXT:  Determining loop execution counts for: @select_cond_poison_propagation
 ; CHECK-NEXT:  Loop %loop: Unpredictable backedge-taken count.
 ; CHECK-NEXT:  Loop %loop: Unpredictable max backedge-taken count.
 ; CHECK-NEXT:  Loop %loop: Unpredictable predicated backedge-taken count.
 ;
 entry:

llvm/test/Analysis/ScalarEvolution/ptrtoint-constantexpr-loop.ll

 }
 
 define void @zext_ptr_to_i32(i32 %arg, i32 %arg6) {
 ; PTR64_IDX64-LABEL: 'zext_ptr_to_i32'
 ; PTR64_IDX64-NEXT:  Classifying expressions for: @zext_ptr_to_i32
 ; PTR64_IDX64-NEXT:    %tmp = sub i32 %arg, ptrtoint ([0 x i8]* @global to i32)
 ; PTR64_IDX64-NEXT:    --> ((-1 * (trunc i64 (ptrtoint [0 x i8]* @global to i64) to i32)) + %arg) U: full-set S: full-set Exits: ((-1 * (trunc i64 (ptrtoint [0 x i8]* @global to i64) to i32)) + %arg) LoopDispositions: { %bb7: Invariant }
 ; PTR64_IDX64-NEXT:    %tmp9 = select i1 %tmp8, i16 0, i16 1
-; PTR64_IDX64-NEXT:    --> %tmp9 U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
+; PTR64_IDX64-NEXT:    --> (1 umin (-1 + (-1 * (sext i1 %tmp8 to i16))<nsw>)<nsw>) U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
 ; PTR64_IDX64-NEXT:  Determining loop execution counts for: @zext_ptr_to_i32
 ; PTR64_IDX64-NEXT:  Loop %bb7: Unpredictable backedge-taken count.
 ; PTR64_IDX64-NEXT:  Loop %bb7: Unpredictable max backedge-taken count.
 ; PTR64_IDX64-NEXT:  Loop %bb7: Unpredictable predicated backedge-taken count.
 ;
 ; PTR64_IDX32-LABEL: 'zext_ptr_to_i32'
 ; PTR64_IDX32-NEXT:  Classifying expressions for: @zext_ptr_to_i32
 ; PTR64_IDX32-NEXT:    %tmp = sub i32 %arg, ptrtoint ([0 x i8]* @global to i32)
 ; PTR64_IDX32-NEXT:    --> ((-1 * ptrtoint ([0 x i8]* @global to i32)) + %arg) U: full-set S: full-set Exits: ((-1 * ptrtoint ([0 x i8]* @global to i32)) + %arg) LoopDispositions: { %bb7: Invariant }
 ; PTR64_IDX32-NEXT:    %tmp9 = select i1 %tmp8, i16 0, i16 1
-; PTR64_IDX32-NEXT:    --> %tmp9 U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
+; PTR64_IDX32-NEXT:    --> (1 umin (-1 + (-1 * (sext i1 %tmp8 to i16))<nsw>)<nsw>) U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
 ; PTR64_IDX32-NEXT:  Determining loop execution counts for: @zext_ptr_to_i32
 ; PTR64_IDX32-NEXT:  Loop %bb7: Unpredictable backedge-taken count.
 ; PTR64_IDX32-NEXT:  Loop %bb7: Unpredictable max backedge-taken count.
 ; PTR64_IDX32-NEXT:  Loop %bb7: Unpredictable predicated backedge-taken count.
 ;
 ; PTR16_IDX16-LABEL: 'zext_ptr_to_i32'
 ; PTR16_IDX16-NEXT:  Classifying expressions for: @zext_ptr_to_i32
 ; PTR16_IDX16-NEXT:    %tmp = sub i32 %arg, ptrtoint ([0 x i8]* @global to i32)
 ; PTR16_IDX16-NEXT:    --> ((-1 * (zext i16 (ptrtoint [0 x i8]* @global to i16) to i32))<nsw> + %arg) U: full-set S: full-set Exits: ((-1 * (zext i16 (ptrtoint [0 x i8]* @global to i16) to i32))<nsw> + %arg) LoopDispositions: { %bb7: Invariant }
 ; PTR16_IDX16-NEXT:    %tmp9 = select i1 %tmp8, i16 0, i16 1
-; PTR16_IDX16-NEXT:    --> %tmp9 U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
+; PTR16_IDX16-NEXT:    --> (1 umin (-1 + (-1 * (sext i1 %tmp8 to i16))<nsw>)<nsw>) U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
 ; PTR16_IDX16-NEXT:  Determining loop execution counts for: @zext_ptr_to_i32
 ; PTR16_IDX16-NEXT:  Loop %bb7: Unpredictable backedge-taken count.
 ; PTR16_IDX16-NEXT:  Loop %bb7: Unpredictable max backedge-taken count.
 ; PTR16_IDX16-NEXT:  Loop %bb7: Unpredictable predicated backedge-taken count.
 ;
 ; PTR16_IDX32-LABEL: 'zext_ptr_to_i32'
 ; PTR16_IDX32-NEXT:  Classifying expressions for: @zext_ptr_to_i32
 ; PTR16_IDX32-NEXT:    %tmp = sub i32 %arg, ptrtoint ([0 x i8]* @global to i32)
 ; PTR16_IDX32-NEXT:    --> ((-1 * ptrtoint ([0 x i8]* @global to i32))<nsw> + %arg) U: full-set S: full-set Exits: ((-1 * ptrtoint ([0 x i8]* @global to i32))<nsw> + %arg) LoopDispositions: { %bb7: Invariant }
 ; PTR16_IDX32-NEXT:    %tmp9 = select i1 %tmp8, i16 0, i16 1
-; PTR16_IDX32-NEXT:    --> %tmp9 U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
+; PTR16_IDX32-NEXT:    --> (1 umin (-1 + (-1 * (sext i1 %tmp8 to i16))<nsw>)<nsw>) U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
 ; PTR16_IDX32-NEXT:  Determining loop execution counts for: @zext_ptr_to_i32
 ; PTR16_IDX32-NEXT:  Loop %bb7: Unpredictable backedge-taken count.
 ; PTR16_IDX32-NEXT:  Loop %bb7: Unpredictable max backedge-taken count.
 ; PTR16_IDX32-NEXT:  Loop %bb7: Unpredictable predicated backedge-taken count.
 ;
 bb:
   br label %bb7
 

 }
 
 define void @sext_to_i32(i32 %arg, i32 %arg6) {
 ; PTR64_IDX64-LABEL: 'sext_to_i32'
 ; PTR64_IDX64-NEXT:  Classifying expressions for: @sext_to_i32
 ; PTR64_IDX64-NEXT:    %tmp = sub i32 %arg, sext (i16 ptrtoint ([0 x i8]* @global to i16) to i32)
 ; PTR64_IDX64-NEXT:    --> ((-1 * (sext i16 (trunc i64 (ptrtoint [0 x i8]* @global to i64) to i16) to i32))<nsw> + %arg) U: full-set S: full-set Exits: ((-1 * (sext i16 (trunc i64 (ptrtoint [0 x i8]* @global to i64) to i16) to i32))<nsw> + %arg) LoopDispositions: { %bb7: Invariant }
 ; PTR64_IDX64-NEXT:    %tmp9 = select i1 %tmp8, i16 0, i16 1
-; PTR64_IDX64-NEXT:    --> %tmp9 U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
+; PTR64_IDX64-NEXT:    --> (1 umin (-1 + (-1 * (sext i1 %tmp8 to i16))<nsw>)<nsw>) U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
 ; PTR64_IDX64-NEXT:  Determining loop execution counts for: @sext_to_i32
 ; PTR64_IDX64-NEXT:  Loop %bb7: Unpredictable backedge-taken count.
 ; PTR64_IDX64-NEXT:  Loop %bb7: Unpredictable max backedge-taken count.
 ; PTR64_IDX64-NEXT:  Loop %bb7: Unpredictable predicated backedge-taken count.
 ;
 ; PTR64_IDX32-LABEL: 'sext_to_i32'
 ; PTR64_IDX32-NEXT:  Classifying expressions for: @sext_to_i32
 ; PTR64_IDX32-NEXT:    %tmp = sub i32 %arg, sext (i16 ptrtoint ([0 x i8]* @global to i16) to i32)
 ; PTR64_IDX32-NEXT:    --> ((-1 * (sext i16 ptrtoint ([0 x i8]* @global to i16) to i32))<nsw> + %arg) U: full-set S: full-set Exits: ((-1 * (sext i16 ptrtoint ([0 x i8]* @global to i16) to i32))<nsw> + %arg) LoopDispositions: { %bb7: Invariant }
 ; PTR64_IDX32-NEXT:    %tmp9 = select i1 %tmp8, i16 0, i16 1
-; PTR64_IDX32-NEXT:    --> %tmp9 U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
+; PTR64_IDX32-NEXT:    --> (1 umin (-1 + (-1 * (sext i1 %tmp8 to i16))<nsw>)<nsw>) U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
 ; PTR64_IDX32-NEXT:  Determining loop execution counts for: @sext_to_i32
 ; PTR64_IDX32-NEXT:  Loop %bb7: Unpredictable backedge-taken count.
 ; PTR64_IDX32-NEXT:  Loop %bb7: Unpredictable max backedge-taken count.
 ; PTR64_IDX32-NEXT:  Loop %bb7: Unpredictable predicated backedge-taken count.
 ;
 ; PTR16_IDX16-LABEL: 'sext_to_i32'
 ; PTR16_IDX16-NEXT:  Classifying expressions for: @sext_to_i32
 ; PTR16_IDX16-NEXT:    %tmp = sub i32 %arg, sext (i16 ptrtoint ([0 x i8]* @global to i16) to i32)
 ; PTR16_IDX16-NEXT:    --> ((-1 * (sext i16 (ptrtoint [0 x i8]* @global to i16) to i32))<nsw> + %arg) U: full-set S: full-set Exits: ((-1 * (sext i16 (ptrtoint [0 x i8]* @global to i16) to i32))<nsw> + %arg) LoopDispositions: { %bb7: Invariant }
 ; PTR16_IDX16-NEXT:    %tmp9 = select i1 %tmp8, i16 0, i16 1
-; PTR16_IDX16-NEXT:    --> %tmp9 U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
+; PTR16_IDX16-NEXT:    --> (1 umin (-1 + (-1 * (sext i1 %tmp8 to i16))<nsw>)<nsw>) U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
 ; PTR16_IDX16-NEXT:  Determining loop execution counts for: @sext_to_i32
 ; PTR16_IDX16-NEXT:  Loop %bb7: Unpredictable backedge-taken count.
 ; PTR16_IDX16-NEXT:  Loop %bb7: Unpredictable max backedge-taken count.
 ; PTR16_IDX16-NEXT:  Loop %bb7: Unpredictable predicated backedge-taken count.
 ;
 ; PTR16_IDX32-LABEL: 'sext_to_i32'
 ; PTR16_IDX32-NEXT:  Classifying expressions for: @sext_to_i32
 ; PTR16_IDX32-NEXT:    %tmp = sub i32 %arg, sext (i16 ptrtoint ([0 x i8]* @global to i16) to i32)
 ; PTR16_IDX32-NEXT:    --> ((-1 * (sext i16 ptrtoint ([0 x i8]* @global to i16) to i32))<nsw> + %arg) U: full-set S: full-set Exits: ((-1 * (sext i16 ptrtoint ([0 x i8]* @global to i16) to i32))<nsw> + %arg) LoopDispositions: { %bb7: Invariant }
 ; PTR16_IDX32-NEXT:    %tmp9 = select i1 %tmp8, i16 0, i16 1
-; PTR16_IDX32-NEXT:    --> %tmp9 U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
+; PTR16_IDX32-NEXT:    --> (1 umin (-1 + (-1 * (sext i1 %tmp8 to i16))<nsw>)<nsw>) U: [0,2) S: [0,2) Exits: <<Unknown>> LoopDispositions: { %bb7: Variant }
 ; PTR16_IDX32-NEXT:  Determining loop execution counts for: @sext_to_i32
 ; PTR16_IDX32-NEXT:  Loop %bb7: Unpredictable backedge-taken count.
 ; PTR16_IDX32-NEXT:  Loop %bb7: Unpredictable max backedge-taken count.
 ; PTR16_IDX32-NEXT:  Loop %bb7: Unpredictable predicated backedge-taken count.
 ;
 bb:
   br label %bb7
 

llvm/test/Analysis/ScalarEvolution/sext-to-zext.ll

 ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
 ; RUN: opt -disable-output "-passes=print<scalar-evolution>" < %s 2>&1 | FileCheck %s
 
 define void @f(i1 %c) {
 ; CHECK-LABEL: 'f'
 ; CHECK-NEXT:  Classifying expressions for: @f
 ; CHECK-NEXT:    %start = select i1 %c, i32 100, i32 0
-; CHECK-NEXT:    --> %start U: [0,101) S: [0,101)
+; CHECK-NEXT:    --> (100 + (-100 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) U: [100,1) S: [100,1)
 ; CHECK-NEXT:    %step = select i1 %c, i32 -1, i32 1
-; CHECK-NEXT:    --> %step U: [1,0) S: [-2,2)
+; CHECK-NEXT:    --> (-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw> U: [-1,2) S: [-1,2)
 ; CHECK-NEXT:    %iv = phi i32 [ %start, %entry ], [ %iv.dec, %loop ]
-; CHECK-NEXT:    --> {%start,+,%step}<nsw><%loop> U: [0,101) S: [0,101) Exits: ((99 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(100 + (-100 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<nsw><%loop> U: full-set S: full-set Exits: (1 + (99 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-100 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.tc = phi i32 [ 0, %entry ], [ %iv.tc.inc, %loop ]
 ; CHECK-NEXT:    --> {0,+,1}<%loop> U: [0,100) S: [0,100) Exits: 99 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.tc.inc = add i32 %iv.tc, 1
 ; CHECK-NEXT:    --> {1,+,1}<%loop> U: [1,101) S: [1,101) Exits: 100 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.dec = add nsw i32 %iv, %step
-; CHECK-NEXT:    --> {(%step + %start),+,%step}<nw><%loop> U: [-200,201) S: [-200,201) Exits: ((100 * %step)<nsw> + %start) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(99 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) + (-100 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)),+,(-1 + (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nsw>}<nw><%loop> U: full-set S: full-set Exits: ((100 * (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>))<nuw><nsw> + (-100 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.sext = sext i32 %iv to i64
-; CHECK-NEXT:    --> {(zext i32 %start to i64),+,(sext i32 %step to i64)}<nsw><%loop> U: [0,101) S: [0,101) Exits: ((zext i32 %start to i64) + (99 * (sext i32 %step to i64))<nsw>) LoopDispositions: { %loop: Computable }
+; CHECK-NEXT:    --> {(sext i32 (100 + (-100 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) to i64),+,(-1 + (zext i32 (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i64))<nsw>}<nsw><%loop> U: [-2147483747,2147483747) S: [-2147483747,2147483747) Exits: (-99 + (sext i32 (100 + (-100 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>)) to i64) + (99 * (zext i32 (2 umin (-1 + (-1 * (sext i1 %c to i32))<nsw>)<nsw>) to i64))<nuw><nsw>) LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @f
 ; CHECK-NEXT:  Loop %loop: backedge-taken count is 99
 ; CHECK-NEXT:  Loop %loop: max backedge-taken count is 99
 ; CHECK-NEXT:  Loop %loop: Predicated backedge-taken count is 99
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %loop: Trip multiple is 100
 ;
 entry:

llvm/test/Analysis/ScalarEvolution/shift-recurrences.ll

exit:
   ret void
 }
 
 ; Variable shift with a tight upper bound
 define void @test_shl3(i1 %c) {
 ; CHECK-LABEL: 'test_shl3'
 ; CHECK-NEXT:  Classifying expressions for: @test_shl3
 ; CHECK-NEXT:    %shiftamt = select i1 %c, i64 1, i64 0
-; CHECK-NEXT:    --> %shiftamt U: [0,2) S: [0,2)
+; CHECK-NEXT:    --> (-1 * (sext i1 %c to i64))<nsw> U: [0,2) S: [0,2)
 ; CHECK-NEXT:    %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
 ; CHECK-NEXT:    --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.shl = phi i64 [ 4, %entry ], [ %iv.shl.next, %loop ]
 ; CHECK-NEXT:    --> %iv.shl U: [4,65) S: [4,65) Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
 ; CHECK-NEXT:    %iv.next = add i64 %iv, 1
 ; CHECK-NEXT:    --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable }
 ; CHECK-NEXT:    %iv.shl.next = shl i64 %iv.shl, %shiftamt
 ; CHECK-NEXT:    --> %iv.shl.next U: [0,-3) S: [-9223372036854775808,9223372036854775805) Exits: <<Unknown>> LoopDispositions: { %loop: Variant }

llvm/test/Analysis/StackSafetyAnalysis/local.ll

entry:
   ret void
 }
 
 define void @NonConstantOffset(i1 zeroext %z) {
 ; CHECK-LABEL: @NonConstantOffset dso_preemptable{{$}}
 ; CHECK-NEXT: args uses:
 ; CHECK-NEXT: allocas uses:
 ; FIXME: SCEV can't look through selects.
-; CHECK-NEXT: x[4]: [0,4){{$}}
+; CHECK-NEXT: x[4]: [1,3){{$}}
 ; GLOBAL-NEXT: safe accesses:
 ; GLOBAL-NEXT: store i8 0, i8* %x2, align 1
 ; CHECK-EMPTY:
 entry:
   %x = alloca i32, align 4
   %x1 = bitcast i32* %x to i8*
   %idx = select i1 %z, i64 1, i64 2
   %x2 = getelementptr i8, i8* %x1, i64 %idx
entry:
   store i32 0, i32* %x2, align 1
   ret void
 }
 
 define void @NonConstantOffsetOOB(i1 zeroext %z) {
 ; CHECK-LABEL: @NonConstantOffsetOOB dso_preemptable{{$}}
 ; CHECK-NEXT: args uses:
 ; CHECK-NEXT: allocas uses:
-; CHECK-NEXT: x[4]: [0,6){{$}}
+; CHECK-NEXT: x[4]: [1,5){{$}}
 ; GLOBAL-NEXT: safe accesses:
 ; CHECK-EMPTY:
 entry:
   %x = alloca i32, align 4
   %x1 = bitcast i32* %x to i8*
   %idx = select i1 %z, i64 1, i64 4
   %x2 = getelementptr i8, i8* %x1, i64 %idx
   store i8 0, i8* %x2, align 1

 ; CHECK-LABEL: @ZeroSize dso_preemptable{{$}}
 ; CHECK-NEXT: args uses:
 ; CHECK-NEXT:   p[]: empty-set
 ; CHECK-NEXT: allocas uses:
 ; CHECK-NEXT:   x[0]: empty-set
 ; GLOBAL-NEXT: safe accesses:
 ; GLOBAL-NEXT: store %zerosize_type undef, %zerosize_type* %x, align 4
 ; GLOBAL-NEXT: store %zerosize_type undef, %zerosize_type* undef, align 4
-; GLOBAL-NEXT: load %zerosize_type, %zerosize_type* %p, align 
+; GLOBAL-NEXT: load %zerosize_type, %zerosize_type* %p, align
 ; CHECK-EMPTY:
 entry:
   %x = alloca %zerosize_type, align 4
   store %zerosize_type undef, %zerosize_type* %x, align 4
   store %zerosize_type undef, %zerosize_type* undef, align 4
   %val = load %zerosize_type, %zerosize_type* %p, align 4
   ret void
 }

llvm/test/Analysis/StackSafetyAnalysis/memintrin.ll

 }
 
 ; FIXME: memintrinsics should look at size range when possible
 ; Right now we refuse any non-constant size.
 define void @MemsetNonConstInBounds(i1 zeroext %z) {
 ; CHECK-LABEL: MemsetNonConstInBounds dso_preemptable{{$}}
 ; CHECK-NEXT: args uses:
 ; CHECK-NEXT: allocas uses:
-; CHECK-NEXT: x[4]: [0,7){{$}}
+; CHECK-NEXT: x[4]: [0,4){{$}}
 ; GLOBAL-NEXT: safe accesses:
+; GLOBAL-NEXT: call void @llvm.memset.p0i8.i32(i8* %x1, i8 42, i32 %size, i1 false)
 ; CHECK-EMPTY:
 entry:
   %x = alloca i32, align 4
   %x1 = bitcast i32* %x to i8*
   %size = select i1 %z, i32 3, i32 4
   call void @llvm.memset.p0i8.i32(i8* %x1, i8 42, i32 %size, i1 false)
   ret void
 }

llvm/test/CodeGen/PowerPC/prefer-dqform.ll

 ; CHECK-P9-NEXT:    srawi r5, r5, 1
 ; CHECK-P9-NEXT:    slwi r4, r4, 4
 ; CHECK-P9-NEXT:    addze r5, r5
 ; CHECK-P9-NEXT:    sub r4, r4, r10
 ; CHECK-P9-NEXT:    cmpw r3, r4
 ; CHECK-P9-NEXT:    bgtlr cr0
 ; CHECK-P9-NEXT:  # %bb.1: # %_loop_2_do_.lr.ph
 ; CHECK-P9-NEXT:    extswsli r5, r5, 3
-; CHECK-P9-NEXT:    extsw r10, r4
+; CHECK-P9-NEXT:    clrldi r10, r3, 32
+; CHECK-P9-NEXT:    extsw r11, r4
+; CHECK-P9-NEXT:    rldic r3, r3, 3, 29
 ; CHECK-P9-NEXT:    add r5, r8, r5
-; CHECK-P9-NEXT:    clrldi r8, r3, 32
-; CHECK-P9-NEXT:    lwa r3, 0(r7)
-; CHECK-P9-NEXT:    addi r4, r8, 1
-; CHECK-P9-NEXT:    addi r5, r5, -8
-; CHECK-P9-NEXT:    lxvdsx vs0, 0, r5
-; CHECK-P9-NEXT:    sub r3, r4, r3
+; CHECK-P9-NEXT:    addi r3, r3, -8
+; CHECK-P9-NEXT:    addi r8, r5, -8
+; CHECK-P9-NEXT:    lwa r5, 0(r7)
+; CHECK-P9-NEXT:    lxvdsx vs0, 0, r8
+; CHECK-P9-NEXT:    extswsli r7, r5, 3
+; CHECK-P9-NEXT:    subfic r4, r5, 2
+; CHECK-P9-NEXT:    sub r5, r6, r7
+; CHECK-P9-NEXT:    sub r7, r11, r10
 ; CHECK-P9-NEXT:    sldi r4, r4, 3
-; CHECK-P9-NEXT:    sldi r3, r3, 3
-; CHECK-P9-NEXT:    add r4, r9, r4
-; CHECK-P9-NEXT:    add r3, r6, r3
-; CHECK-P9-NEXT:    sub r6, r10, r8
-; CHECK-P9-NEXT:    rldicl r6, r6, 60, 4
-; CHECK-P9-NEXT:    addi r6, r6, 1
-; CHECK-P9-NEXT:    mtctr r6
+; CHECK-P9-NEXT:    rldicl r7, r7, 60, 4
+; CHECK-P9-NEXT:    add r4, r6, r4
+; CHECK-P9-NEXT:    addi r6, r9, 16
+; CHECK-P9-NEXT:    addi r7, r7, 1
+; CHECK-P9-NEXT:    mtctr r7
 ; CHECK-P9-NEXT:    .p2align 4
 ; CHECK-P9-NEXT:  .LBB0_2: # %_loop_2_do_
 ; CHECK-P9-NEXT:    #
-; CHECK-P9-NEXT:    lxv vs1, -16(r4)
-; CHECK-P9-NEXT:    lxv vs2, 0(r4)
-; CHECK-P9-NEXT:    lxv vs3, -16(r3)
-; CHECK-P9-NEXT:    lxv vs4, 0(r3)
-; CHECK-P9-NEXT:    addi r3, r3, 128
+; CHECK-P9-NEXT:    lxvx vs1, r9, r3
+; CHECK-P9-NEXT:    lxvx vs2, r6, r3
+; CHECK-P9-NEXT:    lxvx vs3, r5, r3
+; CHECK-P9-NEXT:    lxvx vs4, r4, r3
 ; CHECK-P9-NEXT:    xvmaddadp vs1, vs3, vs1
-; CHECK-P9-NEXT:    stxv vs1, -16(r4)
 ; CHECK-P9-NEXT:    xvmaddadp vs2, vs4, vs0
-; CHECK-P9-NEXT:    stxv vs2, 0(r4)
-; CHECK-P9-NEXT:    addi r4, r4, 128
+; CHECK-P9-NEXT:    stxvx vs1, r9, r3
+; CHECK-P9-NEXT:    stxvx vs2, r6, r3
+; CHECK-P9-NEXT:    addi r3, r3, 128
 ; CHECK-P9-NEXT:    bdnz .LBB0_2
 ; CHECK-P9-NEXT:  # %bb.3: # %_return_bb
 ; CHECK-P9-NEXT:    blr
 ;
 ; CHECK-P10-LABEL: test:
 ; CHECK-P10:       # %bb.0: # %test_entry
 ; CHECK-P10-NEXT:    lwz r4, 0(r4)
 ; CHECK-P10-NEXT:    andi. r3, r6, 15

 ; CHECK-P10-NEXT:    srawi r5, r5, 1
 ; CHECK-P10-NEXT:    slwi r4, r4, 4
 ; CHECK-P10-NEXT:    addze r5, r5
 ; CHECK-P10-NEXT:    sub r4, r4, r10
 ; CHECK-P10-NEXT:    cmpw r3, r4
 ; CHECK-P10-NEXT:    bgtlr cr0
 ; CHECK-P10-NEXT:  # %bb.1: # %_loop_2_do_.lr.ph
 ; CHECK-P10-NEXT:    extswsli r5, r5, 3
-; CHECK-P10-NEXT:    extsw r10, r4
+; CHECK-P10-NEXT:    clrldi r10, r3, 32
+; CHECK-P10-NEXT:    extsw r11, r4
+; CHECK-P10-NEXT:    rldic r3, r3, 3, 29
 ; CHECK-P10-NEXT:    add r5, r8, r5
-; CHECK-P10-NEXT:    clrldi r8, r3, 32
-; CHECK-P10-NEXT:    lwa r3, 0(r7)
-; CHECK-P10-NEXT:    addi r4, r8, 1
-; CHECK-P10-NEXT:    addi r5, r5, -8
-; CHECK-P10-NEXT:    lxvdsx vs0, 0, r5
-; CHECK-P10-NEXT:    sub r3, r4, r3
+; CHECK-P10-NEXT:    addi r3, r3, -8
+; CHECK-P10-NEXT:    addi r8, r5, -8
+; CHECK-P10-NEXT:    lwa r5, 0(r7)
+; CHECK-P10-NEXT:    lxvdsx vs0, 0, r8
+; CHECK-P10-NEXT:    extswsli r7, r5, 3
+; CHECK-P10-NEXT:    subfic r4, r5, 2
+; CHECK-P10-NEXT:    sub r5, r6, r7
+; CHECK-P10-NEXT:    sub r7, r11, r10
 ; CHECK-P10-NEXT:    sldi r4, r4, 3
-; CHECK-P10-NEXT:    add r4, r9, r4
-; CHECK-P10-NEXT:    sldi r3, r3, 3
-; CHECK-P10-NEXT:    add r3, r6, r3
-; CHECK-P10-NEXT:    sub r6, r10, r8
-; CHECK-P10-NEXT:    rldicl r6, r6, 60, 4
-; CHECK-P10-NEXT:    addi r6, r6, 1
-; CHECK-P10-NEXT:    mtctr r6
+; CHECK-P10-NEXT:    add r4, r6, r4
+; CHECK-P10-NEXT:    addi r6, r9, 16
+; CHECK-P10-NEXT:    rldicl r7, r7, 60, 4
+; CHECK-P10-NEXT:    addi r7, r7, 1
+; CHECK-P10-NEXT:    mtctr r7
 ; CHECK-P10-NEXT:    .p2align 4
 ; CHECK-P10-NEXT:  .LBB0_2: # %_loop_2_do_
 ; CHECK-P10-NEXT:    #
-; CHECK-P10-NEXT:    lxv vs1, -16(r4)
-; CHECK-P10-NEXT:    lxv vs2, 0(r4)
-; CHECK-P10-NEXT:    lxv vs3, -16(r3)
+; CHECK-P10-NEXT:    lxvx vs1, r9, r3
+; CHECK-P10-NEXT:    lxvx vs2, r6, r3
+; CHECK-P10-NEXT:    lxvx vs3, r5, r3
 ; CHECK-P10-NEXT:    xvmaddadp vs1, vs3, vs1
-; CHECK-P10-NEXT:    lxv vs4, 0(r3)
+; CHECK-P10-NEXT:    lxvx vs4, r4, r3
 ; CHECK-P10-NEXT:    xvmaddadp vs2, vs4, vs0
+; CHECK-P10-NEXT:    stxvx vs1, r9, r3
+; CHECK-P10-NEXT:    stxvx vs2, r6, r3
 ; CHECK-P10-NEXT:    addi r3, r3, 128
-; CHECK-P10-NEXT:    stxv vs1, -16(r4)
-; CHECK-P10-NEXT:    stxv vs2, 0(r4)
-; CHECK-P10-NEXT:    addi r4, r4, 128
 ; CHECK-P10-NEXT:    bdnz .LBB0_2
 ; CHECK-P10-NEXT:  # %bb.3: # %_return_bb
 ; CHECK-P10-NEXT:    blr
 ; FIXME: use pair load/store instructions lxvp/stxvp
 test_entry:
   %_conv5 = ptrtoint [0 x %_elem_type_of_a]* %.a to i64
   %_andi_tmp = and i64 %_conv5, 15
   %_equ_tmp = icmp eq i64 %_andi_tmp, 0

llvm/test/CodeGen/Thumb2/mve-memtp-loop.ll

 @arr_22 = external dso_local local_unnamed_addr global [17 x [12 x [19 x i16]]], align 2
 define i32 @reverted(i1 zeroext %b) {
 ; CHECK-LABEL: reverted:
 ; CHECK:       @ %bb.0: @ %entry
 ; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
 ; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
 ; CHECK-NEXT:    .pad #12
 ; CHECK-NEXT:    sub sp, #12
+; CHECK-NEXT:    mov.w r3, #418
 ; CHECK-NEXT:    cmp r0, #0
-; CHECK-NEXT:    mov.w r1, #11
-; CHECK-NEXT:    cinc r1, r1, ne
-; CHECK-NEXT:    movs r0, #38
-; CHECK-NEXT:    mul r2, r1, r0
-; CHECK-NEXT:    str r1, [sp, #8] @ 4-byte Spill
-; CHECK-NEXT:    movw r0, :lower16:arr_22
+; CHECK-NEXT:    it ne
+; CHECK-NEXT:    movne.w r3, #456
+; CHECK-NEXT:    add.w r2, r3, #15
+; CHECK-NEXT:    movw r1, :lower16:arr_22
 ; CHECK-NEXT:    vmov.i32 q0, #0x0
-; CHECK-NEXT:    movt r0, :upper16:arr_22
-; CHECK-NEXT:    add.w r1, r2, #15
-; CHECK-NEXT:    lsrs r3, r1, #4
-; CHECK-NEXT:    strd r3, r2, [sp] @ 8-byte Folded Spill
-; CHECK-NEXT:    wlstp.8 lr, r2, .LBB19_2
+; CHECK-NEXT:    lsrs r7, r2, #4
+; CHECK-NEXT:    movt r1, :upper16:arr_22
+; CHECK-NEXT:    str r3, [sp, #8] @ 4-byte Spill
+; CHECK-NEXT:    str r7, [sp] @ 4-byte Spill
+; CHECK-NEXT:    wlstp.8 lr, r3, .LBB19_2
 ; CHECK-NEXT:  .LBB19_1: @ =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    vstrb.8 q0, [r0], #16
+; CHECK-NEXT:    vstrb.8 q0, [r1], #16
 ; CHECK-NEXT:    letp lr, .LBB19_1
 ; CHECK-NEXT:  .LBB19_2: @ %entry
-; CHECK-NEXT:    ldr r0, [sp, #8] @ 4-byte Reload
-; CHECK-NEXT:    movw r6, :lower16:arr_20
-; CHECK-NEXT:    movt r6, :upper16:arr_20
-; CHECK-NEXT:    add.w r3, r6, #80
+; CHECK-NEXT:    movw r12, :lower16:arr_20
+; CHECK-NEXT:    movw r1, :lower16:arr_21
+; CHECK-NEXT:    adds r0, #11
+; CHECK-NEXT:    str r0, [sp, #4] @ 4-byte Spill
+; CHECK-NEXT:    movt r12, :upper16:arr_20
+; CHECK-NEXT:    movt r1, :upper16:arr_21
 ; CHECK-NEXT:    dls lr, r0
-; CHECK-NEXT:    movw r0, :lower16:arr_21
-; CHECK-NEXT:    movt r0, :upper16:arr_21
-; CHECK-NEXT:    add.w r5, r0, #36
-; CHECK-NEXT:    add.w r11, r6, #128
-; CHECK-NEXT:    add.w r7, r6, #112
-; CHECK-NEXT:    add.w r2, r6, #96
-; CHECK-NEXT:    add.w r4, r6, #64
-; CHECK-NEXT:    add.w r0, r6, #48
-; CHECK-NEXT:    add.w r1, r6, #32
-; CHECK-NEXT:    add.w r12, r6, #16
-; CHECK-NEXT:    adr r6, .LCPI19_0
-; CHECK-NEXT:    vldrw.u32 q0, [r6]
-; CHECK-NEXT:    movw r6, :lower16:arr_20
-; CHECK-NEXT:    mov.w r8, #327685
-; CHECK-NEXT:    mov.w r9, #5
+; CHECK-NEXT:    adr r0, .LCPI19_0
+; CHECK-NEXT:    add.w r5, r1, #36
+; CHECK-NEXT:    vldrw.u32 q0, [r0]
+; CHECK-NEXT:    movw r0, :lower16:arr_20
+; CHECK-NEXT:    add.w r4, r12, #80
+; CHECK-NEXT:    add.w r11, r12, #128
+; CHECK-NEXT:    add.w r7, r12, #112
+; CHECK-NEXT:    add.w r3, r12, #96
+; CHECK-NEXT:    add.w r1, r12, #64
+; CHECK-NEXT:    add.w r2, r12, #48
+; CHECK-NEXT:    add.w r6, r12, #32
+; CHECK-NEXT:    add.w r12, r12, #16
+; CHECK-NEXT:    mov.w r9, #327685
+; CHECK-NEXT:    mov.w r8, #5
 ; CHECK-NEXT:    vmov.i16 q1, #0x5
 ; CHECK-NEXT:    mov.w r10, #0
-; CHECK-NEXT:    movt r6, :upper16:arr_20
+; CHECK-NEXT:    movt r0, :upper16:arr_20
 ; CHECK-NEXT:  .LBB19_3: @ %for.cond8.preheader
 ; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    str r8, [r5, #-4]
+; CHECK-NEXT:    str r9, [r5, #-4]
 ; CHECK-NEXT:    vstrh.16 q1, [r5, #-36]
-; CHECK-NEXT:    strh.w r9, [r5]
+; CHECK-NEXT:    strh.w r8, [r5]
 ; CHECK-NEXT:    vstrh.16 q1, [r5, #-20]
-; CHECK-NEXT:    vstrw.32 q0, [r3]
+; CHECK-NEXT:    vstrw.32 q0, [r4]
 ; CHECK-NEXT:    vstrh.16 q0, [r12], #152
-; CHECK-NEXT:    vstrh.16 q0, [r6], #152
-; CHECK-NEXT:    vstrh.16 q0, [r1], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r0], #152
-; CHECK-NEXT:    vstrh.16 q0, [r4], #152
+; CHECK-NEXT:    vstrh.16 q0, [r6], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r2], #152
+; CHECK-NEXT:    vstrh.16 q0, [r1], #152
+; CHECK-NEXT:    vstrh.16 q0, [r3], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r7], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r11], #152
-; CHECK-NEXT:    strd r9, r10, [r3, #64]
+; CHECK-NEXT:    strd r8, r10, [r4, #64]
 ; CHECK-NEXT:    adds r5, #38
-; CHECK-NEXT:    adds r3, #152
+; CHECK-NEXT:    adds r4, #152
 ; CHECK-NEXT:    le lr, .LBB19_3
 ; CHECK-NEXT:  @ %bb.4: @ %for.cond.cleanup6
 ; CHECK-NEXT:    movw r0, :lower16:arr_22
-; CHECK-NEXT:    ldr r2, [sp, #4] @ 4-byte Reload
+; CHECK-NEXT:    ldr r2, [sp, #8] @ 4-byte Reload
 ; CHECK-NEXT:    movt r0, :upper16:arr_22
 ; CHECK-NEXT:    ldr r3, [sp] @ 4-byte Reload
 ; CHECK-NEXT:    add.w r0, r0, #1824
 ; CHECK-NEXT:    vmov.i32 q1, #0x0
 ; CHECK-NEXT:    wlstp.8 lr, r2, .LBB19_6
 ; CHECK-NEXT:  .LBB19_5: @ =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    vstrb.8 q1, [r0], #16
 ; CHECK-NEXT:    letp lr, .LBB19_5
 ; CHECK-NEXT:  .LBB19_6: @ %for.cond.cleanup6
-; CHECK-NEXT:    movw r6, :lower16:arr_20
+; CHECK-NEXT:    movw r3, :lower16:arr_20
 ; CHECK-NEXT:    movw r0, #7376
-; CHECK-NEXT:    movt r6, :upper16:arr_20
-; CHECK-NEXT:    adds r3, r6, r0
+; CHECK-NEXT:    movt r3, :upper16:arr_20
+; CHECK-NEXT:    adds r4, r3, r0
 ; CHECK-NEXT:    movw r0, #7408
-; CHECK-NEXT:    add.w r12, r6, r0
+; CHECK-NEXT:    add.w r12, r3, r0
 ; CHECK-NEXT:    movw r0, #7344
-; CHECK-NEXT:    add.w r9, r6, r0
+; CHECK-NEXT:    add.w r11, r3, r0
 ; CHECK-NEXT:    movw r0, #7312
-; CHECK-NEXT:    adds r2, r6, r0
+; CHECK-NEXT:    ldr r1, [sp, #4] @ 4-byte Reload
+; CHECK-NEXT:    add.w r8, r3, r0
 ; CHECK-NEXT:    movw r0, :lower16:arr_21
-; CHECK-NEXT:    add.w r1, r6, #7424
-; CHECK-NEXT:    add.w r7, r6, #7392
-; CHECK-NEXT:    add.w r4, r6, #7360
-; CHECK-NEXT:    add.w r5, r6, #7328
-; CHECK-NEXT:    add.w r8, r6, #7296
-; CHECK-NEXT:    ldr r6, [sp, #8] @ 4-byte Reload
 ; CHECK-NEXT:    movt r0, :upper16:arr_21
-; CHECK-NEXT:    addw r0, r0, #1860
-; CHECK-NEXT:    mov.w r10, #5
-; CHECK-NEXT:    dls lr, r6
-; CHECK-NEXT:    mov.w r6, #327685
+; CHECK-NEXT:    addw r2, r0, #1860
+; CHECK-NEXT:    dls lr, r1
+; CHECK-NEXT:    add.w r7, r3, #7424
+; CHECK-NEXT:    add.w r6, r3, #7392
+; CHECK-NEXT:    add.w r0, r3, #7360
+; CHECK-NEXT:    add.w r5, r3, #7328
+; CHECK-NEXT:    add.w r3, r3, #7296
+; CHECK-NEXT:    mov.w r1, #327685
+; CHECK-NEXT:    mov.w r9, #5
 ; CHECK-NEXT:    vmov.i16 q1, #0x5
-; CHECK-NEXT:    mov.w r11, #0
+; CHECK-NEXT:    mov.w r10, #0
 ; CHECK-NEXT:  .LBB19_7: @ %for.cond8.preheader.1
 ; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    str r6, [r0, #-4]
-; CHECK-NEXT:    vstrh.16 q1, [r0, #-36]
-; CHECK-NEXT:    strh.w r10, [r0]
-; CHECK-NEXT:    vstrh.16 q1, [r0, #-20]
-; CHECK-NEXT:    vstrw.32 q0, [r3]
-; CHECK-NEXT:    vstrh.16 q0, [r2], #152
+; CHECK-NEXT:    str r1, [r2, #-4]
+; CHECK-NEXT:    vstrh.16 q1, [r2, #-36]
+; CHECK-NEXT:    strh.w r9, [r2]
+; CHECK-NEXT:    vstrh.16 q1, [r2, #-20]
+; CHECK-NEXT:    vstrw.32 q0, [r4]
 ; CHECK-NEXT:    vstrh.16 q0, [r8], #152
+; CHECK-NEXT:    vstrh.16 q0, [r3], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r5], #152
-; CHECK-NEXT:    vstrh.16 q0, [r9], #152
-; CHECK-NEXT:    vstrh.16 q0, [r4], #152
-; CHECK-NEXT:    vstrh.16 q0, [r7], #152
+; CHECK-NEXT:    vstrh.16 q0, [r11], #152
+; CHECK-NEXT:    vstrh.16 q0, [r0], #152
+; CHECK-NEXT:    vstrh.16 q0, [r6], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r12], #152
-; CHECK-NEXT:    vstrh.16 q0, [r1], #152
-; CHECK-NEXT:    strd r10, r11, [r3, #64]
-; CHECK-NEXT:    adds r0, #38
-; CHECK-NEXT:    adds r3, #152
+; CHECK-NEXT:    vstrh.16 q0, [r7], #152
+; CHECK-NEXT:    strd r9, r10, [r4, #64]
+; CHECK-NEXT:    adds r2, #38
+; CHECK-NEXT:    adds r4, #152
 ; CHECK-NEXT:    le lr, .LBB19_7
 ; CHECK-NEXT:  @ %bb.8: @ %for.cond.cleanup6.1
 ; CHECK-NEXT:    movw r0, :lower16:arr_22
-; CHECK-NEXT:    ldr r2, [sp, #4] @ 4-byte Reload
+; CHECK-NEXT:    ldr r2, [sp, #8] @ 4-byte Reload
 ; CHECK-NEXT:    movt r0, :upper16:arr_22
 ; CHECK-NEXT:    ldr r3, [sp] @ 4-byte Reload
 ; CHECK-NEXT:    add.w r0, r0, #3648
 ; CHECK-NEXT:    vmov.i32 q1, #0x0
 ; CHECK-NEXT:    wlstp.8 lr, r2, .LBB19_10
 ; CHECK-NEXT:  .LBB19_9: @ =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    vstrb.8 q1, [r0], #16
 ; CHECK-NEXT:    letp lr, .LBB19_9
 ; CHECK-NEXT:  .LBB19_10: @ %for.cond.cleanup6.1
-; CHECK-NEXT:    movw r7, :lower16:arr_20
+; CHECK-NEXT:    movw r6, :lower16:arr_20
 ; CHECK-NEXT:    movw r0, #14672
-; CHECK-NEXT:    movt r7, :upper16:arr_20
-; CHECK-NEXT:    adds r3, r7, r0
+; CHECK-NEXT:    movt r6, :upper16:arr_20
+; CHECK-NEXT:    adds r4, r6, r0
 ; CHECK-NEXT:    movw r0, #14704
-; CHECK-NEXT:    add.w r12, r7, r0
+; CHECK-NEXT:    add.w r12, r6, r0
 ; CHECK-NEXT:    movw r0, #14688
-; CHECK-NEXT:    add.w r8, r7, r0
+; CHECK-NEXT:    add.w r11, r6, r0
 ; CHECK-NEXT:    movw r0, #14640
-; CHECK-NEXT:    add.w r9, r7, r0
+; CHECK-NEXT:    add.w r8, r6, r0
 ; CHECK-NEXT:    movw r0, #14624
-; CHECK-NEXT:    adds r2, r7, r0
+; CHECK-NEXT:    adds r1, r6, r0
 ; CHECK-NEXT:    movw r0, #14608
-; CHECK-NEXT:    movw r1, :lower16:arr_21
-; CHECK-NEXT:    add r0, r7
-; CHECK-NEXT:    add.w r4, r7, #14720
-; CHECK-NEXT:    add.w r5, r7, #14656
-; CHECK-NEXT:    add.w r6, r7, #14592
-; CHECK-NEXT:    ldr r7, [sp, #8] @ 4-byte Reload
-; CHECK-NEXT:    movt r1, :upper16:arr_21
-; CHECK-NEXT:    addw r1, r1, #3684
-; CHECK-NEXT:    mov.w r10, #5
-; CHECK-NEXT:    dls lr, r7
-; CHECK-NEXT:    mov.w r7, #327685
+; CHECK-NEXT:    ldr r3, [sp, #4] @ 4-byte Reload
+; CHECK-NEXT:    adds r2, r6, r0
+; CHECK-NEXT:    movw r0, :lower16:arr_21
+; CHECK-NEXT:    movt r0, :upper16:arr_21
+; CHECK-NEXT:    addw r7, r0, #3684
+; CHECK-NEXT:    dls lr, r3
+; CHECK-NEXT:    add.w r0, r6, #14720
+; CHECK-NEXT:    add.w r5, r6, #14656
+; CHECK-NEXT:    add.w r6, r6, #14592
+; CHECK-NEXT:    mov.w r3, #327685
+; CHECK-NEXT:    mov.w r9, #5
 ; CHECK-NEXT:    vmov.i16 q1, #0x5
-; CHECK-NEXT:    mov.w r11, #0
+; CHECK-NEXT:    mov.w r10, #0
 ; CHECK-NEXT:  .LBB19_11: @ %for.cond8.preheader.2
 ; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    str r7, [r1, #-4]
-; CHECK-NEXT:    vstrh.16 q1, [r1, #-36]
-; CHECK-NEXT:    strh.w r10, [r1]
-; CHECK-NEXT:    vstrh.16 q1, [r1, #-20]
-; CHECK-NEXT:    vstrw.32 q0, [r3]
-; CHECK-NEXT:    vstrh.16 q0, [r0], #152
-; CHECK-NEXT:    vstrh.16 q0, [r6], #152
+; CHECK-NEXT:    str r3, [r7, #-4]
+; CHECK-NEXT:    vstrh.16 q1, [r7, #-36]
+; CHECK-NEXT:    strh.w r9, [r7]
+; CHECK-NEXT:    vstrh.16 q1, [r7, #-20]
+; CHECK-NEXT:    vstrw.32 q0, [r4]
 ; CHECK-NEXT:    vstrh.16 q0, [r2], #152
-; CHECK-NEXT:    vstrh.16 q0, [r9], #152
-; CHECK-NEXT:    vstrh.16 q0, [r5], #152
+; CHECK-NEXT:    vstrh.16 q0, [r6], #152
+; CHECK-NEXT:    vstrh.16 q0, [r1], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r8], #152
+; CHECK-NEXT:    vstrh.16 q0, [r5], #152
+; CHECK-NEXT:    vstrh.16 q0, [r11], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r12], #152
-; CHECK-NEXT:    vstrh.16 q0, [r4], #152
-; CHECK-NEXT:    strd r10, r11, [r3, #64]
-; CHECK-NEXT:    adds r1, #38
-; CHECK-NEXT:    adds r3, #152
+; CHECK-NEXT:    vstrh.16 q0, [r0], #152
+; CHECK-NEXT:    strd r9, r10, [r4, #64]
+; CHECK-NEXT:    adds r7, #38
+; CHECK-NEXT:    adds r4, #152
 ; CHECK-NEXT:    le lr, .LBB19_11
 ; CHECK-NEXT:  @ %bb.12: @ %for.cond.cleanup6.2
 ; CHECK-NEXT:    movw r0, :lower16:arr_22
-; CHECK-NEXT:    ldrd r2, r1, [sp] @ 8-byte Folded Reload
+; CHECK-NEXT:    ldr r1, [sp, #8] @ 4-byte Reload
 ; CHECK-NEXT:    movt r0, :upper16:arr_22
-; CHECK-NEXT:    vmov.i32 q1, #0x0
+; CHECK-NEXT:    ldr r2, [sp] @ 4-byte Reload
 ; CHECK-NEXT:    add.w r0, r0, #5472
+; CHECK-NEXT:    vmov.i32 q1, #0x0
 ; CHECK-NEXT:    wlstp.8 lr, r1, .LBB19_14
 ; CHECK-NEXT:  .LBB19_13: @ =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    vstrb.8 q1, [r0], #16
 ; CHECK-NEXT:    letp lr, .LBB19_13
 ; CHECK-NEXT:  .LBB19_14: @ %for.cond.cleanup6.2
 ; CHECK-NEXT:    movw r2, :lower16:arr_21
 ; CHECK-NEXT:    movw r1, #5508
 ; CHECK-NEXT:    movt r2, :upper16:arr_21
 ; CHECK-NEXT:    movw r7, :lower16:arr_20
-; CHECK-NEXT:    add r2, r1
-; CHECK-NEXT:    movw r1, #22000
+; CHECK-NEXT:    add r1, r2
+; CHECK-NEXT:    movw r2, #22000
 ; CHECK-NEXT:    movt r7, :upper16:arr_20
-; CHECK-NEXT:    add.w r12, r7, r1
-; CHECK-NEXT:    movw r1, #21984
-; CHECK-NEXT:    add.w r8, r7, r1
-; CHECK-NEXT:    movw r1, #21952
-; CHECK-NEXT:    add.w r9, r7, r1
-; CHECK-NEXT:    movw r1, #21936
+; CHECK-NEXT:    add.w r12, r7, r2
+; CHECK-NEXT:    movw r2, #21984
+; CHECK-NEXT:    ldr r6, [sp, #4] @ 4-byte Reload
+; CHECK-NEXT:    add.w r8, r7, r2
+; CHECK-NEXT:    movw r2, #21952
+; CHECK-NEXT:    movw r3, #21920
 ; CHECK-NEXT:    movw r0, #21968
-; CHECK-NEXT:    adds r5, r7, r1
-; CHECK-NEXT:    movw r1, #21920
+; CHECK-NEXT:    add.w r9, r7, r2
+; CHECK-NEXT:    movw r2, #21936
+; CHECK-NEXT:    adds r5, r7, r3
 ; CHECK-NEXT:    movw r3, #21904
 ; CHECK-NEXT:    adds r4, r7, r3
+; CHECK-NEXT:    dls lr, r6
 ; CHECK-NEXT:    add r0, r7
-; CHECK-NEXT:    add r1, r7
+; CHECK-NEXT:    add r2, r7
 ; CHECK-NEXT:    add.w r3, r7, #22016
-; CHECK-NEXT:    add.w r6, r7, #21888
-; CHECK-NEXT:    ldr r7, [sp, #8] @ 4-byte Reload
+; CHECK-NEXT:    add.w r7, r7, #21888
+; CHECK-NEXT:    mov.w r6, #327685
 ; CHECK-NEXT:    mov.w r10, #5
 ; CHECK-NEXT:    vmov.i16 q1, #0x5
 ; CHECK-NEXT:    mov.w r11, #0
-; CHECK-NEXT:    dls lr, r7
-; CHECK-NEXT:    mov.w r7, #327685
 ; CHECK-NEXT:  .LBB19_15: @ %for.cond8.preheader.3
 ; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    str r7, [r2, #-4]
-; CHECK-NEXT:    vstrh.16 q1, [r2, #-36]
-; CHECK-NEXT:    strh.w r10, [r2]
-; CHECK-NEXT:    vstrh.16 q1, [r2, #-20]
+; CHECK-NEXT:    str r6, [r1, #-4]
+; CHECK-NEXT:    vstrh.16 q1, [r1, #-36]
+; CHECK-NEXT:    strh.w r10, [r1]
+; CHECK-NEXT:    vstrh.16 q1, [r1, #-20]
 ; CHECK-NEXT:    vstrw.32 q0, [r0]
 ; CHECK-NEXT:    vstrh.16 q0, [r4], #152
-; CHECK-NEXT:    vstrh.16 q0, [r6], #152
-; CHECK-NEXT:    vstrh.16 q0, [r1], #152
+; CHECK-NEXT:    vstrh.16 q0, [r7], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r5], #152
+; CHECK-NEXT:    vstrh.16 q0, [r2], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r9], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r8], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r12], #152
 ; CHECK-NEXT:    vstrh.16 q0, [r3], #152
 ; CHECK-NEXT:    strd r10, r11, [r0, #64]
-; CHECK-NEXT:    adds r2, #38
+; CHECK-NEXT:    adds r1, #38
 ; CHECK-NEXT:    adds r0, #152
 ; CHECK-NEXT:    le lr, .LBB19_15
 ; CHECK-NEXT:  @ %bb.16: @ %for.cond.cleanup6.3
 ; CHECK-NEXT:    add sp, #12
 ; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
 ; CHECK-NEXT:    .p2align 4
 ; CHECK-NEXT:  @ %bb.17:
 ; CHECK-NEXT:  .LCPI19_0:

llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll

 ; CHECK-NEXT:    je .LBB0_10
 ; CHECK-NEXT:  # %bb.3: # %cond_next.i
 ; CHECK-NEXT:    testb $1, %al
 ; CHECK-NEXT:    jne .LBB0_10
 ; CHECK-NEXT:  # %bb.4: # %cond_next36.i
 ; CHECK-NEXT:    movl $0, 0
 ; CHECK-NEXT:    movzbl %al, %ebp
 ; CHECK-NEXT:    andl $1, %ebp
+; CHECK-NEXT:    negl %ebp
 ; CHECK-NEXT:    xorpd %xmm0, %xmm0
 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    xorl %ecx, %ecx
 ; CHECK-NEXT:    xorpd %xmm1, %xmm1
 ; CHECK-NEXT:    .p2align 4, 0x90
 ; CHECK-NEXT:  .LBB0_5: # %bb.i28.i
 ; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    cvttsd2si %xmm1, %edx
 ; CHECK-NEXT:    cmpl %esi, %edx
 ; CHECK-NEXT:    cmovgel %eax, %edx
 ; CHECK-NEXT:    addl $2, %ecx
 ; CHECK-NEXT:    xorps %xmm2, %xmm2
 ; CHECK-NEXT:    cvtsi2sd %edx, %xmm2
 ; CHECK-NEXT:    xorpd %xmm1, %xmm1
 ; CHECK-NEXT:    subsd %xmm2, %xmm1
 ; CHECK-NEXT:    mulsd %xmm0, %xmm1
-; CHECK-NEXT:    addl $-2, %ebp
+; CHECK-NEXT:    addl $2, %ebp
 ; CHECK-NEXT:    jne .LBB0_5
 ; CHECK-NEXT:  # %bb.6: # %mp_unexp_d2mp.exit29.i
 ; CHECK-NEXT:    movl $0, 0
 ; CHECK-NEXT:    je .LBB0_7
 ; CHECK-NEXT:  # %bb.8: # %mp_sqrt_init.exit
 ; CHECK-NEXT:    xorl %ecx, %ecx
 ; CHECK-NEXT:    movl %edi, %edx
 ; CHECK-NEXT:    calll mp_mul_csqu@PLT

llvm/test/CodeGen/X86/dag-update-nodetomatch.ll

 ; CHECK-NEXT:    .cfi_offset %rbp, -16
 ; CHECK-NEXT:    movq x1@GOTPCREL(%rip), %rax
 ; CHECK-NEXT:    movl (%rax), %ecx
 ; CHECK-NEXT:    andl $511, %ecx # imm = 0x1FF
 ; CHECK-NEXT:    leaq 1(%rcx), %r13
 ; CHECK-NEXT:    movq x4@GOTPCREL(%rip), %rax
 ; CHECK-NEXT:    movl %r13d, (%rax)
 ; CHECK-NEXT:    movq x3@GOTPCREL(%rip), %rax
-; CHECK-NEXT:    movl (%rax), %edx
-; CHECK-NEXT:    testl %edx, %edx
+; CHECK-NEXT:    movl (%rax), %r10d
+; CHECK-NEXT:    testl %r10d, %r10d
 ; CHECK-NEXT:    je .LBB1_18
 ; CHECK-NEXT:  # %bb.1: # %for.cond1thread-pre-split.lr.ph
 ; CHECK-NEXT:    movq x5@GOTPCREL(%rip), %rax
 ; CHECK-NEXT:    movq (%rax), %r12
-; CHECK-NEXT:    movl %edx, %eax
+; CHECK-NEXT:    movl %r10d, %eax
 ; CHECK-NEXT:    notl %eax
 ; CHECK-NEXT:    leaq 8(,%rax,8), %r14
 ; CHECK-NEXT:    imulq %r13, %r14
 ; CHECK-NEXT:    addq %r12, %r14
 ; CHECK-NEXT:    movq x2@GOTPCREL(%rip), %r15
 ; CHECK-NEXT:    movl (%r15), %eax
 ; CHECK-NEXT:    leal 8(,%rcx,8), %ecx
 ; CHECK-NEXT:    movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
 ; CHECK-NEXT:    leaq 8(%r12), %rcx
 ; CHECK-NEXT:    movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
-; CHECK-NEXT:    leaq 32(%r12), %rbx
+; CHECK-NEXT:    leaq 48(%r12), %rbx
 ; CHECK-NEXT:    shlq $3, %r13
 ; CHECK-NEXT:    xorl %esi, %esi
 ; CHECK-NEXT:    movq x0@GOTPCREL(%rip), %rcx
 ; CHECK-NEXT:    movq %r12, %rdi
 ; CHECK-NEXT:    jmp .LBB1_2
 ; CHECK-NEXT:    .p2align 4, 0x90
 ; CHECK-NEXT:  .LBB1_15: # %for.cond1.for.inc3_crit_edge
 ; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
 ; CHECK-NEXT:    movl %eax, (%r15)
 ; CHECK-NEXT:  .LBB1_16: # %for.inc3
 ; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
 ; CHECK-NEXT:    addq %r13, %rdi
 ; CHECK-NEXT:    incq %rsi
 ; CHECK-NEXT:    addq %r13, %rbx
-; CHECK-NEXT:    incl %edx
+; CHECK-NEXT:    incl %r10d
 ; CHECK-NEXT:    je .LBB1_17
 ; CHECK-NEXT:  .LBB1_2: # %for.cond1thread-pre-split
 ; CHECK-NEXT:    # =>This Loop Header: Depth=1
 ; CHECK-NEXT:    # Child Loop BB1_12 Depth 2
 ; CHECK-NEXT:    # Child Loop BB1_14 Depth 2
 ; CHECK-NEXT:    testl %eax, %eax
 ; CHECK-NEXT:    jns .LBB1_16
 ; CHECK-NEXT:  # %bb.3: # %for.body2.preheader
 ; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
 ; CHECK-NEXT:    movslq %eax, %r9
 ; CHECK-NEXT:    testq %r9, %r9
 ; CHECK-NEXT:    movq $-1, %rbp
 ; CHECK-NEXT:    cmovnsq %r9, %rbp
 ; CHECK-NEXT:    subq %r9, %rbp
 ; CHECK-NEXT:    incq %rbp
 ; CHECK-NEXT:    cmpq $4, %rbp
 ; CHECK-NEXT:    jb .LBB1_14
 ; CHECK-NEXT:  # %bb.4: # %min.iters.checked
 ; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
 ; CHECK-NEXT:    movq %rbp, %r8
 ; CHECK-NEXT:    andq $-4, %r8
 ; CHECK-NEXT:    je .LBB1_14
 ; CHECK-NEXT:  # %bb.5: # %vector.memcheck
 ; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
-; CHECK-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload
-; CHECK-NEXT:    imulq %rsi, %r10
-; CHECK-NEXT:    leaq (%r12,%r10), %rax
-; CHECK-NEXT:    leaq (%rax,%r9,8), %rax
+; CHECK-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
+; CHECK-NEXT:    imulq %rsi, %rax
+; CHECK-NEXT:    leaq (%r12,%rax), %rdx
+; CHECK-NEXT:    leaq (%rdx,%r9,8), %r11
 ; CHECK-NEXT:    testq %r9, %r9
-; CHECK-NEXT:    movq $-1, %r11
-; CHECK-NEXT:    cmovnsq %r9, %r11
-; CHECK-NEXT:    cmpq %rcx, %rax
+; CHECK-NEXT:    movq $-1, %rdx
+; CHECK-NEXT:    cmovnsq %r9, %rdx
+; CHECK-NEXT:    cmpq %rcx, %r11
 ; CHECK-NEXT:    jae .LBB1_7
 ; CHECK-NEXT:  # %bb.6: # %vector.memcheck
 ; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
-; CHECK-NEXT:    addq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Folded Reload
-; CHECK-NEXT:    leaq (%r10,%r11,8), %rax
+; CHECK-NEXT:    addq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload
+; CHECK-NEXT:    leaq (%rax,%rdx,8), %rax
 ; CHECK-NEXT:    cmpq %rcx, %rax
 ; CHECK-NEXT:    ja .LBB1_14
 ; CHECK-NEXT:  .LBB1_7: # %vector.body.preheader
 ; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
-; CHECK-NEXT:    leaq -4(%r8), %rax
-; CHECK-NEXT:    movq %rax, %r10
-; CHECK-NEXT:    shrq $2, %r10
-; CHECK-NEXT:    btl $2, %eax
+; CHECK-NEXT:    leaq -4(%r8), %rdx
+; CHECK-NEXT:    movq %rdx, %rax
+; CHECK-NEXT:    shrq $2, %rax
+; CHECK-NEXT:    btl $2, %edx
 ; CHECK-NEXT:    jb .LBB1_8
 ; CHECK-NEXT:  # %bb.9: # %vector.body.prol.preheader
 ; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
 ; CHECK-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
 ; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
 ; CHECK-NEXT:    movdqu %xmm0, (%rdi,%r9,8)
 ; CHECK-NEXT:    movdqu %xmm0, 16(%rdi,%r9,8)
 ; CHECK-NEXT:    movl $4, %r11d
-; CHECK-NEXT:    testq %r10, %r10
+; CHECK-NEXT:    testq %rax, %rax
 ; CHECK-NEXT:    jne .LBB1_11
 ; CHECK-NEXT:    jmp .LBB1_13
 ; CHECK-NEXT:  .LBB1_8: # in Loop: Header=BB1_2 Depth=1
 ; CHECK-NEXT:    xorl %r11d, %r11d
-; CHECK-NEXT:    testq %r10, %r10
+; CHECK-NEXT:    testq %rax, %rax
 ; CHECK-NEXT:    je .LBB1_13
 ; CHECK-NEXT:  .LBB1_11: # %vector.body.preheader.new
 ; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
 ; CHECK-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
 ; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
-; CHECK-NEXT:    movq %r11, %rax
+; CHECK-NEXT:    leaq -4(%r11), %rax
 ; CHECK-NEXT:    subq %r8, %rax
-; CHECK-NEXT:    addq %r9, %r11
-; CHECK-NEXT:    leaq (%rbx,%r11,8), %r11
+; CHECK-NEXT:    addq $4, %rax
+; CHECK-NEXT:    leaq -4(%r11,%r9), %rdx
+; CHECK-NEXT:    leaq (%rbx,%rdx,8), %rdx
 ; CHECK-NEXT:    .p2align 4, 0x90
 ; CHECK-NEXT:  .LBB1_12: # %vector.body
 ; CHECK-NEXT:    # Parent Loop BB1_2 Depth=1
 ; CHECK-NEXT:    # => This Inner Loop Header: Depth=2
-; CHECK-NEXT:    movdqu %xmm0, -32(%r11)
-; CHECK-NEXT:    movdqu %xmm0, -16(%r11)
-; CHECK-NEXT:    movdqu %xmm0, (%r11)
-; CHECK-NEXT:    movdqu %xmm0, 16(%r11)
-; CHECK-NEXT:    addq $64, %r11
+; CHECK-NEXT:    movdqu %xmm0, -16(%rdx)
+; CHECK-NEXT:    movdqu %xmm0, (%rdx)
+; CHECK-NEXT:    movdqu %xmm0, 16(%rdx)
+; CHECK-NEXT:    movdqu %xmm0, 32(%rdx)
+; CHECK-NEXT:    addq $64, %rdx
 ; CHECK-NEXT:    addq $8, %rax
 ; CHECK-NEXT:    jne .LBB1_12
 ; CHECK-NEXT:  .LBB1_13: # %middle.block
 ; CHECK-NEXT:    # in Loop: Header=BB1_2 Depth=1
 ; CHECK-NEXT:    addq %r8, %r9
 ; CHECK-NEXT:    cmpq %r8, %rbp
 ; CHECK-NEXT:    movq %r9, %rax
 ; CHECK-NEXT:    je .LBB1_15

llvm/test/Transforms/IndVarSimplify/lftr-pr20680.ll

 ; CHECK-NEXT:    br label [[FOR_BODY3_LR_PH_SPLIT_US_SPLIT:%.*]]
 ; CHECK:       for.body3.lr.ph.split.us.split.us:
 ; CHECK-NEXT:    br label [[FOR_BODY3_US_US:%.*]]
 ; CHECK:       for.body3.us.us:
 ; CHECK-NEXT:    br i1 true, label [[COND_FALSE_US_US:%.*]], label [[COND_END_US_US:%.*]]
 ; CHECK:       cond.false.us.us:
 ; CHECK-NEXT:    br label [[COND_END_US_US]]
 ; CHECK:       cond.end.us.us:
+; CHECK-NEXT:    [[COND_US_US:%.*]] = phi i32 [ [[DIV]], [[COND_FALSE_US_US]] ], [ [[INDVARS_IV]], [[FOR_BODY3_US_US]] ]
 ; CHECK-NEXT:    [[TMP4:%.*]] = load i32, i32* @b, align 4
 ; CHECK-NEXT:    [[CMP91_US_US:%.*]] = icmp slt i32 [[TMP4]], 1
 ; CHECK-NEXT:    br i1 [[CMP91_US_US]], label [[FOR_INC_LR_PH_US_US:%.*]], label [[FOR_COND2_LOOPEXIT_US_US:%.*]]
 ; CHECK:       for.cond2.loopexit.us.us:
 ; CHECK-NEXT:    br i1 true, label [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_US_LCSSA_US:%.*]], label [[FOR_BODY3_US_US]]
 ; CHECK:       for.inc.lr.ph.us.us:
 ; CHECK-NEXT:    br label [[FOR_INC_US_US:%.*]]
 ; CHECK:       for.cond8.for.cond2.loopexit_crit_edge.us.us:
 ; CHECK-NEXT:    store i32 1, i32* @b, align 4
 ; CHECK-NEXT:    br label [[FOR_COND2_LOOPEXIT_US_US]]
 ; CHECK:       for.inc.us.us:
 ; CHECK-NEXT:    [[TMP5:%.*]] = phi i32 [ [[TMP4]], [[FOR_INC_LR_PH_US_US]] ], [ [[INC_US_US:%.*]], [[FOR_INC_US_US]] ]
 ; CHECK-NEXT:    [[INC_US_US]] = add nsw i32 [[TMP5]], 1
 ; CHECK-NEXT:    [[EXITCOND3:%.*]] = icmp ne i32 [[INC_US_US]], 1
 ; CHECK-NEXT:    br i1 [[EXITCOND3]], label [[FOR_INC_US_US]], label [[FOR_COND8_FOR_COND2_LOOPEXIT_CRIT_EDGE_US_US:%.*]]
 ; CHECK:       for.cond2.for.inc13_crit_edge.us-lcssa.us.us-lcssa.us:
+; CHECK-NEXT:    [[COND_LCSSA_PH_US_PH_US:%.*]] = phi i32 [ [[COND_US_US]], [[FOR_COND2_LOOPEXIT_US_US]] ]
 ; CHECK-NEXT:    br label [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US:%.*]]
 ; CHECK:       for.body3.lr.ph.split.us.split:
 ; CHECK-NEXT:    br label [[FOR_BODY3_US:%.*]]
 ; CHECK:       for.body3.us:
 ; CHECK-NEXT:    br i1 true, label [[COND_FALSE_US:%.*]], label [[COND_END_US:%.*]]
 ; CHECK:       cond.false.us:
 ; CHECK-NEXT:    br label [[COND_END_US]]
 ; CHECK:       cond.end.us:
+; CHECK-NEXT:    [[COND_US:%.*]] = phi i32 [ [[DIV]], [[COND_FALSE_US]] ], [ [[INDVARS_IV]], [[FOR_BODY3_US]] ]
 ; CHECK-NEXT:    [[TMP6:%.*]] = load i32, i32* @b, align 4
 ; CHECK-NEXT:    [[CMP91_US:%.*]] = icmp slt i32 [[TMP6]], 1
 ; CHECK-NEXT:    br i1 [[CMP91_US]], label [[FOR_INC_LR_PH_US:%.*]], label [[FOR_COND2_LOOPEXIT_US:%.*]]
 ; CHECK:       for.inc.us:
 ; CHECK-NEXT:    [[TMP7:%.*]] = phi i32 [ [[TMP6]], [[FOR_INC_LR_PH_US]] ], [ [[INC_US:%.*]], [[FOR_INC_US:%.*]] ]
 ; CHECK-NEXT:    [[INC_US]] = add nsw i32 [[TMP7]], 1
 ; CHECK-NEXT:    [[EXITCOND2:%.*]] = icmp ne i32 [[INC_US]], 1
 ; CHECK-NEXT:    br i1 [[EXITCOND2]], label [[FOR_INC_US]], label [[FOR_COND8_FOR_COND2_LOOPEXIT_CRIT_EDGE_US:%.*]]
 ; CHECK:       for.cond2.loopexit.us:
 ; CHECK-NEXT:    br i1 false, label [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_US_LCSSA:%.*]], label [[FOR_BODY3_US]]
 ; CHECK:       for.inc.lr.ph.us:
 ; CHECK-NEXT:    br label [[FOR_INC_US]]
 ; CHECK:       for.cond8.for.cond2.loopexit_crit_edge.us:
 ; CHECK-NEXT:    store i32 1, i32* @b, align 4
 ; CHECK-NEXT:    br label [[FOR_COND2_LOOPEXIT_US]]
 ; CHECK:       for.cond2.for.inc13_crit_edge.us-lcssa.us.us-lcssa:
+; CHECK-NEXT:    [[COND_LCSSA_PH_US_PH:%.*]] = phi i32 [ [[COND_US]], [[FOR_COND2_LOOPEXIT_US]] ]
 ; CHECK-NEXT:    br label [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US]]
 ; CHECK:       for.cond2.for.inc13_crit_edge.us-lcssa.us:
-; CHECK-NEXT:    [[COND_LCSSA_PH_US:%.*]] = phi i32 [ [[DIV]], [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_US_LCSSA]] ], [ [[DIV]], [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_US_LCSSA_US]] ]
+; CHECK-NEXT:    [[COND_LCSSA_PH_US:%.*]] = phi i32 [ [[COND_LCSSA_PH_US_PH]], [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_US_LCSSA]] ], [ [[COND_LCSSA_PH_US_PH_US]], [[FOR_COND2_FOR_INC13_CRIT_EDGE_US_LCSSA_US_US_LCSSA_US]] ]
 ; CHECK-NEXT:    br label [[FOR_COND2_FOR_INC13_CRIT_EDGE:%.*]]
 ; CHECK:       for.body3.lr.ph.split:
 ; CHECK-NEXT:    br i1 [[TOBOOL]], label [[FOR_BODY3_LR_PH_SPLIT_SPLIT_US:%.*]], label [[FOR_BODY3_LR_PH_SPLIT_FOR_BODY3_LR_PH_SPLIT_SPLIT_CRIT_EDGE:%.*]]
 ; CHECK:       for.body3.lr.ph.split.for.body3.lr.ph.split.split_crit_edge:
 ; CHECK-NEXT:    br label [[FOR_BODY3_LR_PH_SPLIT_SPLIT:%.*]]
 ; CHECK:       for.body3.lr.ph.split.split.us:
 ; CHECK-NEXT:    br label [[FOR_BODY3_US3:%.*]]
 ; CHECK:       for.body3.us3:

polly/test/CodeGen/only_non_affine_error_region.ll

 ; RUN: opt %loadPolly -polly-codegen -S < %s | FileCheck %s
 ;
-; CHECK-NOT: polly.start
+; CHECK: polly.start
 ;
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 ; Function Attrs: nounwind uwtable
 define void @f(i32 %argc, i32* %A) #0 {
 entry:
   br i1 undef, label %for.end, label %for.body
 

polly/test/CodeGen/region_multiexit_partialwrite.ll

bb10:
   br i1 %tmp18, label %bb19, label %bb3
 
 bb19:
   ret void
 }
 
 
 ; CHECK:      polly.stmt.bb10.exit:
-; CHECK-NEXT:   %polly.tmp11 = phi i32 [ %p_tmp8, %polly.stmt.bb7 ], [ undef, %polly.stmt.bb9 ]
+; CHECK-NEXT:   %polly.tmp11 = phi i32 [ %18, %polly.stmt.bb7 ], [ undef, %polly.stmt.bb9 ]
 
 ; CHECK: polly.stmt.bb10.exit.Stmt_bb3__TO__bb10_Write1.partial:
 ; CHECK:   store i32 %polly.tmp11

polly/test/ForwardOpTree/changed-kind.ll

lor.end93:
   %and100 = and i64 %conv95, undef
   %xor101 = xor i64 %and100, %neg79
   %xor103 = xor i64 %0, %conv95
   br label %while.cond.loopexit
 }
 
 
 ; CHECK: Statistics {
-; CHECK:     Reloads: 1
-; CHECK: }
-
-; CHECK: After statements {
-; CHECK:     Stmt_lor_end93
-; CHECK-NEXT:        ReadAccess :=       [Reduction Type: NONE] [Scalar: 1]
-; CHECK-NEXT:            { Stmt_lor_end93[] -> MemRef3[] };
-; CHECK-NEXT:       new: { Stmt_lor_end93[] -> MemRef_c[0] };
+; CHECK:     Reloads: 0
 ; CHECK: }

polly/test/ScheduleOptimizer/SIMDInParallelFor.ll

for.inc95:
   br i1 %cmp54, label %for.cond56.preheader, label %for.inc98
 
 for.inc98:
   %indvars.iv.next214 = add nuw nsw i64 %indvars.iv213, 48
   br label %for.cond51.preheader
 }
 
 ; No parallel loop except the to outermost.
-; CHECK: #pragma omp parallel for
-; CHECK: #pragma omp parallel for
+; CHECK-NOT: #pragma omp parallel for
+; CHECK-NOT: #pragma omp parallel for
 ; CHECK-NOT: #pragma omp parallel for

polly/test/ScopInfo/parameter_with_constant_factor_in_add.ll

 ; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
 ;
 ; Check that the access function of the store is simple and concise
 ;
 ; CHECK: p0: {0,+,(-1 + (sext i32 (-1 * %smax188) to i64))<nsw>}<%for.cond261.preheader>
 ;
 ; CHECK:      MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:   [p_0] -> { Stmt_for_body276[i0] -> MemRef_A[p_0] };
 ;
 ; ModuleID = 'bugpoint-reduced-simplified.bc'
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
+; XFAIL: *
+
 ; Function Attrs: nounwind uwtable
 define void @BPredPartitionCost(i32* %A) #0 {
 entry:
   %curr_blk = alloca [16 x [16 x i32]], align 16
   br label %for.cond261.preheader.lr.ph
 
 for.cond261.preheader.lr.ph:                      ; preds = %entry
   %smax188 = select i1 undef, i32 undef, i32 -9

polly/test/ScopInfo/phi_after_error_block.ll

loop:
    %indvar.next = add i64 %indvar, 1
    %cmp2 = icmp sle i64 %indvar, 1024
    br i1 %cmp2, label %loop, label %exit
 
 exit:
    ret void
 }
 
-; CHECK:      Statements {
-; CHECK-NEXT:   Stmt_ok
-; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [p] -> { Stmt_ok[] : p > 0 };
-; CHECK-NEXT:         Schedule :=
-; CHECK-NEXT:             [p] -> { Stmt_ok[] -> [0, 0] };
-; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK-NEXT:             [p] -> { Stmt_ok[] -> MemRef_phi__phi[] };
-; CHECK-NEXT:   Stmt_merge
+; CHECK:    Statements {
+; CHECK-NEXT:     Stmt_merge
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [p] -> { Stmt_merge[] };
+; CHECK-NEXT:             [p_0, p] -> { Stmt_merge[] };
 ; CHECK-NEXT:         Schedule :=
-; CHECK-NEXT:             [p] -> { Stmt_merge[] -> [1, 0] };
-; CHECK-NEXT:         ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK-NEXT:             [p] -> { Stmt_merge[] -> MemRef_phi__phi[] };
-; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT:             [p] -> { Stmt_merge[] -> MemRef_A[0] };
-; CHECK-NEXT:   Stmt_loop
+; CHECK-NEXT:             [p_0, p] -> { Stmt_merge[] -> [0, 0] };
+; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
+; CHECK-NEXT:             [p_0, p] -> { Stmt_merge[] -> MemRef_A[0] };
+; CHECK-NEXT:     Stmt_loop
 ; CHECK-NEXT:         Domain :=
-; CHECK-NEXT:             [p] -> { Stmt_loop[i0] : p = 1 and 0 <= i0 <= 1025 };
+; CHECK-NEXT:             [p_0, p] -> { Stmt_loop[i0] : p = p_0 and 0 <= i0 <= 1025 };
 ; CHECK-NEXT:         Schedule :=
-; CHECK-NEXT:             [p] -> { Stmt_loop[i0] -> [2, i0] };
-; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT:             [p] -> { Stmt_loop[i0] -> MemRef_A[0] };
+; CHECK-NEXT:             [p_0, p] -> { Stmt_loop[i0] -> [1, i0] };
+; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
+; CHECK-NEXT:             [p_0, p] -> { Stmt_loop[i0] -> MemRef_A[0] };
+; CHECK-NEXT: }
+;
+; CHECK:     Statements {
+; CHECK-NEXT:     Stmt_ok
+; CHECK-NEXT:         Domain :=
+; CHECK-NEXT:             [p] -> { Stmt_ok[] : p > 0 };
+; CHECK-NEXT:         Schedule :=
+; CHECK-NEXT:             [p] -> { Stmt_ok[] -> [] };
+; CHECK-NEXT:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
+; CHECK-NEXT:             [p] -> { Stmt_ok[] -> MemRef_phi[] };
 ; CHECK-NEXT: }