[PowerPC][AIX] Peephole optimization for 64-bit TocData transformation

[sfertile]

Summary

Extends the peephole added for the ADDItoc SDNode in D101470 to the 64-bit ADDItoc8 SDNode.

[sfertile]

Rolled this into the corresponding 32-bit patch.

llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp

case PPC::ADDIdtprelL:
       break;
     case PPC::ADDItlsldL:
       Flags = PPCII::MO_TLSLD_LO;
       break;
     case PPC::ADDItocL:
       Flags = PPCII::MO_TOC_LO;
       break;
     case PPC::ADDItoc:
+    case PPC::ADDItoc8:
       break;
     }
 
     SDValue ImmOpnd = Base.getOperand(1);
 
     // On PPC64, the TOC base pointer is guaranteed by the ABI only to have
     // 8-byte alignment, and so we can only use offsets less than 8 (otherwise,
     // we might have needed different @ha relocation values for the offset
if (ReplaceFlags) {
       } else if (ConstantPoolSDNode *CP =
                  dyn_cast<ConstantPoolSDNode>(ImmOpnd)) {
         const Constant *C = CP->getConstVal();
         ImmOpnd = CurDAG->getTargetConstantPool(C, MVT::i64, CP->getAlign(),
                                                 Offset, Flags);
       }
     }
 
+    auto opcodeIsAIXTocData = [](unsigned Opcode) {
+      return Opcode == PPC::ADDItoc || Opcode == PPC::ADDItoc8;
+    };
+
     if (FirstOp == 1) // Store
-      if (Base.getMachineOpcode() == PPC::ADDItoc)
+      if (opcodeIsAIXTocData(Base.getMachineOpcode()))
         (void)CurDAG->UpdateNodeOperands(N, N->getOperand(0),
                                          Base.getOperand(0), Base.getOperand(1),
                                          N->getOperand(3));
       else
         (void)CurDAG->UpdateNodeOperands(N, N->getOperand(0), ImmOpnd,
                                          Base.getOperand(0), N->getOperand(3));
     else // Load
-      if (Base.getMachineOpcode() == PPC::ADDItoc)
+      if (opcodeIsAIXTocData(Base.getMachineOpcode()))
         (void)CurDAG->UpdateNodeOperands(N, Base.getOperand(0),
                                          Base.getOperand(1), N->getOperand(2));
       else
         (void)CurDAG->UpdateNodeOperands(N, ImmOpnd, Base.getOperand(0),
                                          N->getOperand(2));
 
     if (UpdateHBase)
       (void)CurDAG->UpdateNodeOperands(HBase.getNode(), HBase.getOperand(0),

llvm/test/CodeGen/PowerPC/toc-data-const.ll

 ; RUN: llc -O0 -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s --check-prefixes=CHECK,NOOPT
 ; RUN: llc -O0 -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s --check-prefixes=CHECK,NOOPT
 
 ; RUN llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s --check-prefix=CHECK,OPT
-; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s --check-prefixes=CHECK,NOOPT
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s --check-prefixes=CHECK,OPT
 
 @i1 = external constant i32 #0
 @i2 = constant i32* @i1 #0
 
 define i32 @read() {
   %1  = load i32, i32* @i1, align 4
   ret i32 %1
 }

llvm/test/CodeGen/PowerPC/toc-data.ll

 ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s \
 ; RUN:     -stop-before=ppc-vsx-copy | FileCheck %s --check-prefixes=CHECK32,OPT32
 ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s \
 ; RUN:     -stop-before=ppc-vsx-copy | FileCheck %s --check-prefix CHECK64
 ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefixes=TEST32,ASMOPT32
-; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefix TEST64
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefixes=TEST64,ASMOPT64
 
 ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s \
 ; RUN:     -stop-before=ppc-vsx-copy -O0  | FileCheck %s --check-prefixes=CHECK32,NOOPT32
 ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s \
 ; RUN:     -stop-before=ppc-vsx-copy -O0 | FileCheck %s --check-prefix CHECK64-NOOPT
 ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs -O0 < %s | FileCheck %s --check-prefixes=TEST32,ASMNOOPT32
-; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs -O0 < %s | FileCheck %s --check-prefix TEST64
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs -O0 < %s | FileCheck %s --check-prefixes=TEST64,ASMNOOPT64
 
 @i = dso_local global i32 0, align 4 #0
 @d = dso_local local_unnamed_addr global double 3.141590e+00, align 8
 @f = dso_local local_unnamed_addr global float 0x4005BE76C0000000, align 4 #0
 @ll = dso_local local_unnamed_addr global i64 55, align 8
 @ilocal = internal global i32 0, align 4
 
 define dso_local void @write_int(i32 signext %in) {
   entry:
     store i32 %in, i32* @i, align 4
     ret void
 }
 ; CHECK32: name:            write_int
 ; NOOPT32:      %[[SCRATCH:[0-9]+]]:gprc_and_gprc_nor0 = ADDItoc @i, $r2
 ; NOOPT32-NEXT: STW %{{[0-9]+}}, 0, killed %[[SCRATCH]] :: (store (s32) into @i)
 ; OPT32:        STW %{{[0-9]+}}, @i, $r2 :: (store (s32) into @i)
 
 ; TEST32:           .write_int:
 ; ASMNOOPT32:         la 4, i[TD](2)
 ; ASMNOOPT32-NEXT:    stw 3, 0(4)
 ; ASMOPT32:           stw 3, i[TD](2)
 
 ; CHECK64: name:            write_int
-; CHECK64:      %[[SCRATCH:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @i, $x2
-; CHECK64-NEXT: STW8 %{{[0-9]+}}, 0, killed %[[SCRATCH]] :: (store (s32) into @i)
+; CHECK64:   STW8 %{{[0-9]+}}, @i, $x2  :: (store (s32) into @i)
 
 ; CHECK64-NOOPT:  name: write_int
 ; CHECK64-NOOPT:    %[[SUBREG:[0-9]+]]:gprc = COPY %{{[0-9]}}.sub_32
 ; CHECK64-NOOPT:    %[[ADDR:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @i, $x2 :: (load (s64) from got)
 ; CHECK64-NOOPT:    STW %[[SUBREG]], 0, killed %[[ADDR]] :: (store (s32) into @i)
 
-; TEST64:         .write_int:
-; TEST64:           la 4, i[TD](2)
-; TEST64-NEXT:      stw 3, 0(4)
+; TEST64:             .write_int:
+; ASMNOOPT64:           la 4, i[TD](2)
+; ASMNOOPT64-NEXT:      stw 3, 0(4)
+; ASMOPT64:             stw 3, i[TD](2)
 
 
 define dso_local i64 @read_ll() {
   entry:
     %0 = load i64, i64* @ll, align 8
     ret i64 %0
 }
 ; CHECK32: name:            read_ll

 ; OPT32:   %{{[0-9]+}}:f4rc = LFS @f, $r2 :: (dereferenceable load (s32) from @f)
 
 ; TEST32:           .read_float:
 ; ASMNOOPT32:         la 3, f[TD](2)
 ; ASMNOOPT32-NEXT:    lfs 1, 0(3)
 ; ASMOPT32:            lfs 1, f[TD](2)
 
 ; CHECK64: name:            read_float
-; CHECK64: %[[SCRATCH:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @f, $x2
-; CHECK64: %{{[0-9]+}}:f4rc = LFS 0, killed %[[SCRATCH]] :: (dereferenceable load (s32) from @f)
+; CHECK64:   %{{[0-9]+}}:f4rc = LFS @f, $x2 :: (dereferenceable load (s32) from @f)
+
 
 ; CHECK64-NOOPT: name:            read_float
 ; CHECK64-NOOPT:   %[[SCRATCH:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @f, $x2
 ; CHECK64-NOOPT:   %{{[0-9]+}}:f4rc = LFS 0, killed %[[SCRATCH]]
 
 ; TEST64:       .read_float:
-; TEST64:         la 3, f[TD](2)
-; TEST64-NEXT:    lfs 1, 0(3)
-
+; ASMNOOPT64:         la 3, f[TD](2)
+; ASMNOOPT64-NEXT:    lfs 1, 0(3)
+; ASMOPT64:           lfs 1, f[TD](2)
 
 define dso_local void @write_double(double %in) {
   entry:
     store double %in, double* @d, align 8
     ret void
 }
 ; CHECK32: name:            write_double
 ; CHECK32: LWZtoc @d, $r2 :: (load (s32) from got)