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[mlir][tosa] Handle rescale case where shift > 63
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Authored by rsuderman on Dec 14 2021, 6:33 PM.

Details

Summary

It is possible for the shift value to exceed the number of bits. In these
cases we can just multiply by zero. This is relatively rare occurence but
should be handled.

Diff Detail

Event Timeline

rsuderman created this revision.Dec 14 2021, 6:33 PM
rsuderman requested review of this revision.Dec 14 2021, 6:33 PM
rsuderman updated this revision to Diff 394451.Dec 14 2021, 6:37 PM

Fixed test.

not-jenni accepted this revision.Dec 15 2021, 9:52 AM
This revision is now accepted and ready to land.Dec 15 2021, 9:52 AM
aardeb added a subscriber: aardeb.Dec 16 2021, 1:16 PM
aardeb removed a subscriber: aardeb.
This revision was automatically updated to reflect the committed changes.
mehdi_amini added inline comments.Jan 2 2022, 9:30 PM
mlir/lib/Dialect/Tosa/Utils/QuantUtils.cpp
85

Right shifting by 32-bits is invalid, should you limit to 31 in the min expression?
(flagged by coverity)

mehdi_amini added inline comments.Jan 2 2022, 9:31 PM
mlir/lib/Dialect/Tosa/Utils/QuantUtils.cpp
50

(Same here)

mehdi_amini added inline comments.Jan 11 2022, 4:46 PM
mlir/lib/Dialect/Tosa/Utils/QuantUtils.cpp
85

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