Better codegen is possible for Vector Sum Reduction on Power 9 and up.
This patch adds handling for several vector sum reductions depending
on the type of the vector.
|90 ms||x64 debian > LLVM.Bindings/Go::go.test|
Script: -- : 'RUN: at line 1'; /var/lib/buildkite-agent/builds/llvm-project/build/bin/llvm-go go=/usr/bin/go test llvm.org/llvm/bindings/go/llvm
|1067 ↗||(On Diff #390045)|
This is a more general and orthogonal peephole. Can you please separate this out to another patch and make it more general? This patch can then depend on that one.
|1072 ↗||(On Diff #390045)|
Please make this more general by implementing a separate function called something like isVectorSymmetrical() that will just check whether the two halves of the vector are the same. Then this can be flipped to an early exit condition.
P.S. Keep in mind that it is possible that DefVecReg == nullptr which would cause a crash when you call DefVecReg->getOpcode().
It looks like this portion:
if (VecInput.getOpcode() != ISD::SIGN_EXTEND && VecInput.getOpcode() != ISD::ZERO_EXTEND) return SDValue(); // Check that we are extending from v16i8 to v16i32. if (VecInput.getOperand(0).getSimpleValueType() != MVT::v16i8) return SDValue();
is common in both cases. Does it make sense to pull this part out of the case statements so we don't duplicate it?
I think it would be good to save the opcode first, and then use it in this condition.
There is actually more common code between the two case statements. I think I'm going to merge to two cases but I don't want to pull the if statements out of the switch. The way that I look at this is that anything that is outside the switch should apply to all of the possible types in the switch. Since I cannot guarantee that for those two early exists I will just leave them in the switch.