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Differential D112272

[AIX] Add i128 arg split tests
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Authored by jsji on Oct 21 2021, 2:14 PM.

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hubert.reinterpretcast
lkail
Group Reviewers
Restricted Project
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rG7ea1fbe86d92: [AIX] Add i128 arg split tests
Summary

Address comments in D111078.

Diff Detail

Event Timeline

jsji created this revision.Oct 21 2021, 2:14 PM
Herald added subscribers: kbarton, nemanjai. · View Herald TranscriptOct 21 2021, 2:14 PM
jsji requested review of this revision.Oct 21 2021, 2:14 PM
Herald added a project: Restricted Project. · View Herald TranscriptOct 21 2021, 2:14 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
Harbormaster completed remote builds in B130042: Diff 381393.Oct 21 2021, 3:13 PM
lkail added inline comments.Oct 21 2021, 7:08 PM
llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll
334

I think we should also cover codegen of receiving arguments on stack, i.e., add some IR code using %1282.

jsji updated this revision to Diff 381541.Oct 22 2021, 7:29 AM

Address comments.

jsji marked an inline comment as done.Oct 22 2021, 7:29 AM
Harbormaster completed remote builds in B130137: Diff 381541.Oct 22 2021, 8:07 AM
lkail accepted this revision as: lkail.Oct 22 2021, 8:20 PM

LGTM, thanks.

This revision is now accepted and ready to land.Oct 22 2021, 8:20 PM
hubert.reinterpretcast accepted this revision.Oct 23 2021, 7:36 AM

LGTM; thanks!

Closed by commit rG7ea1fbe86d92: [AIX] Add i128 arg split tests (authored by jsji). · Explain WhyOct 24 2021, 7:41 PM
This revision was automatically updated to reflect the committed changes.
jsji added a commit: rG7ea1fbe86d92: [AIX] Add i128 arg split tests.

Revision Contents

PathSize
llvm/
test/
CodeGen/
PowerPC/
75 lines

Diff 381820

llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll

Show First 20 Lines • Show All 324 Lines • ▼ Show 20 Lines
; CHECK-NOVSX-DAG: ld 3, 0([[P1BASEREG:[0-9]+]]) ; CHECK-NOVSX-DAG: ld 3, 0([[P1BASEREG:[0-9]+]])
; CHECK-NOVSX-DAG: ld 4, 8([[P1BASEREG]]) ; CHECK-NOVSX-DAG: ld 4, 8([[P1BASEREG]])
; CHECK-NOVSX-DAG: ld 5, 0([[P2BASEREG:[0-9]+]]) ; CHECK-NOVSX-DAG: ld 5, 0([[P2BASEREG:[0-9]+]])
; CHECK-NOVSX-DAG: ld 6, 8([[P2BASEREG]]) ; CHECK-NOVSX-DAG: ld 6, 8([[P2BASEREG]])
; CHECK-NOVSX: bl {{.?}}i128_increment_by_val ; CHECK-NOVSX: bl {{.?}}i128_increment_by_val
; CHECK-NOVSX: blr ; CHECK-NOVSX: blr
} }
define i128 @callee_i128_split(i32 %i, i128 %i1280, i32 %i4, i32 %i5,
i32 %i6, i32 %i7, i128 %i1281, i32 %i8, i128 %i1282){
lkailUnsubmitted
Done
ReplyInline Actions

I think we should also cover codegen of receiving arguments on stack, i.e., add some IR code using %1282.

lkail: I think we should also cover codegen of receiving arguments on stack, i.e., add some IR code…
entry:
%tmp = add i128 %i1280, %i1281
%tmp1 = add i128 %tmp, %i1282
ret i128 %tmp1
}
; CHECK-LE-LABEL: @callee_i128_split
; CHECK-LE-DAG: ld [[TMPREG:[0-9]+]], [[OFFSET:[0-9]+]](1)
; CHECK-LE-DAG: addc [[TMPREG2:[0-9]+]], 4, 10
; CHECK-LE-DAG: adde [[TMPREG3:[0-9]+]], 5, [[TMPREG]]
; CHECK-LE-DAG: ld [[TMPREG4:[0-9]+]], [[OFFSET2:[0-9]+]](1)
; CHECK-LE-DAG: ld [[TMPREG5:[0-9]+]], [[OFFSET3:[0-9]+]](1)
; CHECK-LE-DAG: addc 3, [[TMPREG2]], [[TMPREG4]]
; CHECK-LE-DAG: adde 4, [[TMPREG3]], [[TMPREG5]]
; CHECK-BE-LABEL: @callee_i128_split
; CHECK-BE-DAG: ld [[TMPREG:[0-9]+]], [[OFFSET:[0-9]+]](1)
; CHECK-BE-DAG: addc [[TMPREG3:[0-9]+]], 5, [[TMPREG]]
; CHECK-BE-DAG: adde [[TMPREG2:[0-9]+]], 4, 10
; CHECK-BE-DAG: ld [[TMPREG4:[0-9]+]], [[OFFSET2:[0-9]+]](1)
; CHECK-BE-DAG: ld [[TMPREG5:[0-9]+]], [[OFFSET3:[0-9]+]](1)
; CHECK-BE-DAG: addc 4, [[TMPREG3]], [[TMPREG4]]
; CHECK-BE-DAG: adde 3, [[TMPREG2]], [[TMPREG5]]
define i128 @i128_split() {
entry:
%0 = load i128, i128* @a, align 16
%1 = load i128, i128* @b, align 16
%call = tail call i128 @callee_i128_split(i32 1, i128 %0, i32 4, i32 5,
i32 6, i32 7, i128 %1, i32 8, i128 9)
ret i128 %call
}
; CHECK-LE-LABEL: @i128_split
; CHECK-LE-DAG: li 3, 1
; CHECK-LE-DAG: ld 4, 0([[P2BASEREG:[0-9]+]])
; CHECK-LE-DAG: ld 5, 8([[P2BASEREG]])
; CHECK-LE-DAG: li 6, 4
; CHECK-LE-DAG: li 7, 5
; CHECK-LE-DAG: li 8, 6
; CHECK-LE-DAG: li 9, 7
; CHECK-LE-DAG: ld 10, 0([[P7BASEREG:[0-9]+]])
; CHECK-LE-DAG: ld [[TMPREG:[0-9]+]], 8([[P7BASEREG]])
; CHECK-LE-DAG: std [[TMPREG]], [[OFFSET:[0-9]+]](1)
; CHECK-LE: bl callee_i128_split
; CHECK-BE-LABEL: @i128_split
; CHECK-BE-DAG: li 3, 1
; CHECK-BE-DAG: ld 4, 0([[P2BASEREG:[0-9]+]])
; CHECK-BE-DAG: ld 5, 8([[P2BASEREG]])
; CHECK-BE-DAG: li 6, 4
; CHECK-BE-DAG: li 7, 5
; CHECK-BE-DAG: li 8, 6
; CHECK-BE-DAG: li 9, 7
; CHECK-BE-DAG: ld 10, 0([[P7BASEREG:[0-9]+]])
; CHECK-BE-DAG: ld [[TMPREG:[0-9]+]], 8([[P7BASEREG]])
; CHECK-BE-DAG: std [[TMPREG]], [[OFFSET:[0-9]+]](1)
; CHECK-BE: bl {{.?}}callee_i128_split
; CHECK-NOVSX-LABEL: @i128_split
; CHECK-NOVSX-DAG: li 3, 1
; CHECK-NOVSX-DAG: ld 4, 0([[P2BASEREG:[0-9]+]])
; CHECK-NOVSX-DAG: ld 5, 8([[P2BASEREG]])
; CHECK-NOVSX-DAG: li 6, 4
; CHECK-NOVSX-DAG: li 7, 5
; CHECK-NOVSX-DAG: li 8, 6
; CHECK-NOVSX-DAG: li 9, 7
; CHECK-NOVSX-DAG: ld 10, 0([[P7BASEREG:[0-9]+]])
; CHECK-NOVSX-DAG: ld [[TMPREG:[0-9]+]], 8([[P7BASEREG]])
; CHECK-NOVSX-DAG: std [[TMPREG]], [[OFFSET:[0-9]+]](1)
; CHECK-NOVSX: bl {{.?}}callee_i128_split