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Differential D111945

[X86][Costmodel] Load/store i64 Stride=4 VF=16 interleaving costs
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Authored by lebedev.ri on Oct 16 2021, 10:49 AM.

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RKSimon
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rG91373bf12ec6: [X86][Costmodel] Load/store i64 Stride=4 VF=16 interleaving costs
Summary

A few more tuples are being queried after D111546. Might be good to model them,
They all require a lot of manual assembly surgery.

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/9bnKrefcG - for intels Block RThroughput: =40.0; for ryzens, Block RThroughput: =16.0
So could pick cost of 40

For store we have:
https://godbolt.org/z/5s3s14dEY - for intels Block RThroughput: =40.0; for ryzens, Block RThroughput: =16.0
So we could pick cost of 40.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Diff Detail

Event Timeline

lebedev.ri created this revision.Oct 16 2021, 10:49 AM
Herald added subscribers: pengfei, hiraditya. · View Herald TranscriptOct 16 2021, 10:49 AM
lebedev.ri requested review of this revision.Oct 16 2021, 10:49 AM
lebedev.ri added a parent revision: D111944: [X86][Costmodel] Load/store i64 Stride=2 VF=32 interleaving costs.
Harbormaster completed remote builds in B129205: Diff 380202.Oct 16 2021, 11:30 AM
RKSimon accepted this revision.Oct 16 2021, 12:46 PM

LGTM

This revision is now accepted and ready to land.Oct 16 2021, 12:46 PM
This revision was landed with ongoing or failed builds.Oct 17 2021, 7:40 AM
Closed by commit rG91373bf12ec6: [X86][Costmodel] Load/store i64 Stride=4 VF=16 interleaving costs (authored by lebedev.ri). · Explain Why
This revision was automatically updated to reflect the committed changes.
lebedev.ri added a commit: rG91373bf12ec6: [X86][Costmodel] Load/store i64 Stride=4 VF=16 interleaving costs.

Revision Contents

Diff 380202

llvm/lib/Target/X86/X86TargetTransformInfo.cpp

Show First 20 Lines • Show All 5,268 Lines • ▼ Show 20 Lines static const CostTblEntry AVX2InterleavedLoadTbl[] = {
{4, MVT::v2i16, 6}, // (load 8i16 and) deinterleave into 4 x 2i16 {4, MVT::v2i16, 6}, // (load 8i16 and) deinterleave into 4 x 2i16
{4, MVT::v4i16, 17}, // (load 16i16 and) deinterleave into 4 x 4i16 {4, MVT::v4i16, 17}, // (load 16i16 and) deinterleave into 4 x 4i16
{4, MVT::v8i16, 33}, // (load 32i16 and) deinterleave into 4 x 8i16 {4, MVT::v8i16, 33}, // (load 32i16 and) deinterleave into 4 x 8i16
{4, MVT::v16i16, 75}, // (load 64i16 and) deinterleave into 4 x 16i16 {4, MVT::v16i16, 75}, // (load 64i16 and) deinterleave into 4 x 16i16
{4, MVT::v32i16, 150}, // (load 128i16 and) deinterleave into 4 x 32i16 {4, MVT::v32i16, 150}, // (load 128i16 and) deinterleave into 4 x 32i16
{4, MVT::v2i32, 4}, // (load 8i32 and) deinterleave into 4 x 2i32 {4, MVT::v2i32, 4}, // (load 8i32 and) deinterleave into 4 x 2i32
{4, MVT::v4i32, 8}, // (load 16i32 and) deinterleave into 4 x 4i32 {4, MVT::v4i32, 8}, // (load 16i32 and) deinterleave into 4 x 4i32
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-      {4, MVT::v2i64, 6},  // (load 8i64 and) deinterleave into 4 x 2i64
-      {4, MVT::v4i64, 8},  // (load 16i64 and) deinterleave into 4 x 4i64
-      {4, MVT::v8i64, 20}, // (load 32i64 and) deinterleave into 4 x 8i64
+      {4, MVT::v2i64, 6},   // (load 8i64 and) deinterleave into 4 x 2i64
+      {4, MVT::v4i64, 8},   // (load 16i64 and) deinterleave into 4 x 4i64
+      {4, MVT::v8i64, 20},  // (load 32i64 and) deinterleave into 4 x 8i64
Lint: Pre-merge checks: clang-format: please reformat the code ``` - {4, MVT::v2i64, 6}, // (load 8i64 and)…
{4, MVT::v8i32, 16}, // (load 32i32 and) deinterleave into 4 x 8i32 {4, MVT::v8i32, 16}, // (load 32i32 and) deinterleave into 4 x 8i32
{4, MVT::v16i32, 32}, // (load 64i32 and) deinterleave into 4 x 16i32 {4, MVT::v16i32, 32}, // (load 64i32 and) deinterleave into 4 x 16i32
{4, MVT::v32i32, 68}, // (load 128i32 and) deinterleave into 4 x 32i32 {4, MVT::v32i32, 68}, // (load 128i32 and) deinterleave into 4 x 32i32
{4, MVT::v2i64, 6}, // (load 8i64 and) deinterleave into 4 x 2i64 {4, MVT::v2i64, 6}, // (load 8i64 and) deinterleave into 4 x 2i64
{4, MVT::v4i64, 8}, // (load 16i64 and) deinterleave into 4 x 4i64 {4, MVT::v4i64, 8}, // (load 16i64 and) deinterleave into 4 x 4i64
{4, MVT::v8i64, 20}, // (load 32i64 and) deinterleave into 4 x 8i64 {4, MVT::v8i64, 20}, // (load 32i64 and) deinterleave into 4 x 8i64
{4, MVT::v16i64, 40}, // (load 64i64 and) deinterleave into 4 x 16i64
{6, MVT::v2i8, 6}, // (load 12i8 and) deinterleave into 6 x 2i8 {6, MVT::v2i8, 6}, // (load 12i8 and) deinterleave into 6 x 2i8
{6, MVT::v4i8, 14}, // (load 24i8 and) deinterleave into 6 x 4i8 {6, MVT::v4i8, 14}, // (load 24i8 and) deinterleave into 6 x 4i8
{6, MVT::v8i8, 18}, // (load 48i8 and) deinterleave into 6 x 8i8 {6, MVT::v8i8, 18}, // (load 48i8 and) deinterleave into 6 x 8i8
{6, MVT::v16i8, 43}, // (load 96i8 and) deinterleave into 6 x 16i8 {6, MVT::v16i8, 43}, // (load 96i8 and) deinterleave into 6 x 16i8
{6, MVT::v32i8, 82}, // (load 192i8 and) deinterleave into 6 x 32i8 {6, MVT::v32i8, 82}, // (load 192i8 and) deinterleave into 6 x 32i8
{6, MVT::v2i16, 13}, // (load 12i16 and) deinterleave into 6 x 2i16 {6, MVT::v2i16, 13}, // (load 12i16 and) deinterleave into 6 x 2i16
▲ Show 20 Lines • Show All 78 Lines • ▼ Show 20 Lines static const CostTblEntry AVX2InterleavedStoreTbl[] = {
{4, MVT::v4i32, 6}, // interleave 4 x 4i32 into 16i32 (and store) {4, MVT::v4i32, 6}, // interleave 4 x 4i32 into 16i32 (and store)
{4, MVT::v8i32, 16}, // interleave 4 x 8i32 into 32i32 (and store) {4, MVT::v8i32, 16}, // interleave 4 x 8i32 into 32i32 (and store)
{4, MVT::v16i32, 32}, // interleave 4 x 16i32 into 64i32 (and store) {4, MVT::v16i32, 32}, // interleave 4 x 16i32 into 64i32 (and store)
{4, MVT::v32i32, 64}, // interleave 4 x 32i32 into 128i32 (and store) {4, MVT::v32i32, 64}, // interleave 4 x 32i32 into 128i32 (and store)
{4, MVT::v2i64, 6}, // interleave 4 x 2i64 into 8i64 (and store) {4, MVT::v2i64, 6}, // interleave 4 x 2i64 into 8i64 (and store)
{4, MVT::v4i64, 8}, // interleave 4 x 4i64 into 16i64 (and store) {4, MVT::v4i64, 8}, // interleave 4 x 4i64 into 16i64 (and store)
{4, MVT::v8i64, 20}, // interleave 4 x 8i64 into 32i64 (and store) {4, MVT::v8i64, 20}, // interleave 4 x 8i64 into 32i64 (and store)
{4, MVT::v16i64, 40}, // interleave 4 x 16i64 into 64i64 (and store)
{6, MVT::v2i8, 7}, // interleave 6 x 2i8 into 12i8 (and store) {6, MVT::v2i8, 7}, // interleave 6 x 2i8 into 12i8 (and store)
{6, MVT::v4i8, 9}, // interleave 6 x 4i8 into 24i8 (and store) {6, MVT::v4i8, 9}, // interleave 6 x 4i8 into 24i8 (and store)
{6, MVT::v8i8, 16}, // interleave 6 x 8i8 into 48i8 (and store) {6, MVT::v8i8, 16}, // interleave 6 x 8i8 into 48i8 (and store)
{6, MVT::v16i8, 27}, // interleave 6 x 16i8 into 96i8 (and store) {6, MVT::v16i8, 27}, // interleave 6 x 16i8 into 96i8 (and store)
{6, MVT::v32i8, 90}, // interleave 6 x 32i8 into 192i8 (and store) {6, MVT::v32i8, 90}, // interleave 6 x 32i8 into 192i8 (and store)
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-      {4, MVT::v2i64, 6},  // interleave 4 x 2i64 into 8i64 (and store)
-      {4, MVT::v4i64, 8},  // interleave 4 x 4i64 into 16i64 (and store)
-      {4, MVT::v8i64, 20}, // interleave 4 x 8i64 into 32i64 (and store)
+      {4, MVT::v2i64, 6},   // interleave 4 x 2i64 into 8i64 (and store)
+      {4, MVT::v4i64, 8},   // interleave 4 x 4i64 into 16i64 (and store)
+      {4, MVT::v8i64, 20},  // interleave 4 x 8i64 into 32i64 (and store)
Lint: Pre-merge checks: clang-format: please reformat the code ``` - {4, MVT::v2i64, 6}, // interleave 4 x 2i64…
{6, MVT::v2i16, 10}, // interleave 6 x 2i16 into 12i16 (and store) {6, MVT::v2i16, 10}, // interleave 6 x 2i16 into 12i16 (and store)
{6, MVT::v4i16, 15}, // interleave 6 x 4i16 into 24i16 (and store) {6, MVT::v4i16, 15}, // interleave 6 x 4i16 into 24i16 (and store)
{6, MVT::v8i16, 21}, // interleave 6 x 8i16 into 48i16 (and store) {6, MVT::v8i16, 21}, // interleave 6 x 8i16 into 48i16 (and store)
{6, MVT::v16i16, 58}, // interleave 6 x 16i16 into 96i16 (and store) {6, MVT::v16i16, 58}, // interleave 6 x 16i16 into 96i16 (and store)
{6, MVT::v32i16, 90}, // interleave 6 x 32i16 into 192i16 (and store) {6, MVT::v32i16, 90}, // interleave 6 x 32i16 into 192i16 (and store)
{6, MVT::v2i32, 9}, // interleave 6 x 2i32 into 12i32 (and store) {6, MVT::v2i32, 9}, // interleave 6 x 2i32 into 12i32 (and store)
Show All 31 Lines

llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll

Show All 21 Lines
; AVX1: LV: Found an estimated cost of 32 for VF 4 For instruction: %v0 = load double, double* %in0, align 8 ; AVX1: LV: Found an estimated cost of 32 for VF 4 For instruction: %v0 = load double, double* %in0, align 8
; AVX1: LV: Found an estimated cost of 64 for VF 8 For instruction: %v0 = load double, double* %in0, align 8 ; AVX1: LV: Found an estimated cost of 64 for VF 8 For instruction: %v0 = load double, double* %in0, align 8
; AVX1: LV: Found an estimated cost of 128 for VF 16 For instruction: %v0 = load double, double* %in0, align 8 ; AVX1: LV: Found an estimated cost of 128 for VF 16 For instruction: %v0 = load double, double* %in0, align 8
; ;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load double, double* %in0, align 8 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: %v0 = load double, double* %in0, align 8 ; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 12 for VF 4 For instruction: %v0 = load double, double* %in0, align 8 ; AVX2: LV: Found an estimated cost of 12 for VF 4 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 28 for VF 8 For instruction: %v0 = load double, double* %in0, align 8 ; AVX2: LV: Found an estimated cost of 28 for VF 8 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 128 for VF 16 For instruction: %v0 = load double, double* %in0, align 8 ; AVX2: LV: Found an estimated cost of 56 for VF 16 For instruction: %v0 = load double, double* %in0, align 8
; ;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load double, double* %in0, align 8 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load double, double* %in0, align 8
; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction: %v0 = load double, double* %in0, align 8 ; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction: %v0 = load double, double* %in0, align 8
; AVX512: LV: Found an estimated cost of 8 for VF 4 For instruction: %v0 = load double, double* %in0, align 8 ; AVX512: LV: Found an estimated cost of 8 for VF 4 For instruction: %v0 = load double, double* %in0, align 8
; AVX512: LV: Found an estimated cost of 22 for VF 8 For instruction: %v0 = load double, double* %in0, align 8 ; AVX512: LV: Found an estimated cost of 22 for VF 8 For instruction: %v0 = load double, double* %in0, align 8
; AVX512: LV: Found an estimated cost of 80 for VF 16 For instruction: %v0 = load double, double* %in0, align 8 ; AVX512: LV: Found an estimated cost of 80 for VF 16 For instruction: %v0 = load double, double* %in0, align 8
; AVX512: LV: Found an estimated cost of 160 for VF 32 For instruction: %v0 = load double, double* %in0, align 8 ; AVX512: LV: Found an estimated cost of 160 for VF 32 For instruction: %v0 = load double, double* %in0, align 8
; ;
Show All 40 Lines

llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll

Show All 21 Lines
; AVX1: LV: Found an estimated cost of 52 for VF 4 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX1: LV: Found an estimated cost of 52 for VF 4 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX1: LV: Found an estimated cost of 104 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX1: LV: Found an estimated cost of 104 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX1: LV: Found an estimated cost of 208 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX1: LV: Found an estimated cost of 208 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8
; ;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 12 for VF 4 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX2: LV: Found an estimated cost of 12 for VF 4 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 28 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX2: LV: Found an estimated cost of 28 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 208 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX2: LV: Found an estimated cost of 56 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8
; ;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX512: LV: Found an estimated cost of 8 for VF 4 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX512: LV: Found an estimated cost of 8 for VF 4 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX512: LV: Found an estimated cost of 22 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX512: LV: Found an estimated cost of 22 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX512: LV: Found an estimated cost of 80 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX512: LV: Found an estimated cost of 80 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX512: LV: Found an estimated cost of 160 for VF 32 For instruction: %v0 = load i64, i64* %in0, align 8 ; AVX512: LV: Found an estimated cost of 160 for VF 32 For instruction: %v0 = load i64, i64* %in0, align 8
; ;
Show All 40 Lines

llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-4.ll

Show All 21 Lines
; AVX1: LV: Found an estimated cost of 32 for VF 4 For instruction: store double %v3, double* %out3, align 8 ; AVX1: LV: Found an estimated cost of 32 for VF 4 For instruction: store double %v3, double* %out3, align 8
; AVX1: LV: Found an estimated cost of 64 for VF 8 For instruction: store double %v3, double* %out3, align 8 ; AVX1: LV: Found an estimated cost of 64 for VF 8 For instruction: store double %v3, double* %out3, align 8
; AVX1: LV: Found an estimated cost of 128 for VF 16 For instruction: store double %v3, double* %out3, align 8 ; AVX1: LV: Found an estimated cost of 128 for VF 16 For instruction: store double %v3, double* %out3, align 8
; ;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store double %v3, double* %out3, align 8 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store double %v3, double* %out3, align 8
; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: store double %v3, double* %out3, align 8 ; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: store double %v3, double* %out3, align 8
; AVX2: LV: Found an estimated cost of 12 for VF 4 For instruction: store double %v3, double* %out3, align 8 ; AVX2: LV: Found an estimated cost of 12 for VF 4 For instruction: store double %v3, double* %out3, align 8
; AVX2: LV: Found an estimated cost of 28 for VF 8 For instruction: store double %v3, double* %out3, align 8 ; AVX2: LV: Found an estimated cost of 28 for VF 8 For instruction: store double %v3, double* %out3, align 8
; AVX2: LV: Found an estimated cost of 128 for VF 16 For instruction: store double %v3, double* %out3, align 8 ; AVX2: LV: Found an estimated cost of 56 for VF 16 For instruction: store double %v3, double* %out3, align 8
; ;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store double %v3, double* %out3, align 8 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store double %v3, double* %out3, align 8
; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction: store double %v3, double* %out3, align 8 ; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction: store double %v3, double* %out3, align 8
; AVX512: LV: Found an estimated cost of 11 for VF 4 For instruction: store double %v3, double* %out3, align 8 ; AVX512: LV: Found an estimated cost of 11 for VF 4 For instruction: store double %v3, double* %out3, align 8
; AVX512: LV: Found an estimated cost of 22 for VF 8 For instruction: store double %v3, double* %out3, align 8 ; AVX512: LV: Found an estimated cost of 22 for VF 8 For instruction: store double %v3, double* %out3, align 8
; AVX512: LV: Found an estimated cost of 44 for VF 16 For instruction: store double %v3, double* %out3, align 8 ; AVX512: LV: Found an estimated cost of 44 for VF 16 For instruction: store double %v3, double* %out3, align 8
; AVX512: LV: Found an estimated cost of 88 for VF 32 For instruction: store double %v3, double* %out3, align 8 ; AVX512: LV: Found an estimated cost of 88 for VF 32 For instruction: store double %v3, double* %out3, align 8
; ;
▲ Show 20 Lines • Show All 41 Lines • Show Last 20 Lines

llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll

Show All 21 Lines
; AVX1: LV: Found an estimated cost of 52 for VF 4 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX1: LV: Found an estimated cost of 52 for VF 4 For instruction: store i64 %v3, i64* %out3, align 8
; AVX1: LV: Found an estimated cost of 104 for VF 8 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX1: LV: Found an estimated cost of 104 for VF 8 For instruction: store i64 %v3, i64* %out3, align 8
; AVX1: LV: Found an estimated cost of 208 for VF 16 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX1: LV: Found an estimated cost of 208 for VF 16 For instruction: store i64 %v3, i64* %out3, align 8
; ;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i64 %v3, i64* %out3, align 8
; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: store i64 %v3, i64* %out3, align 8
; AVX2: LV: Found an estimated cost of 12 for VF 4 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX2: LV: Found an estimated cost of 12 for VF 4 For instruction: store i64 %v3, i64* %out3, align 8
; AVX2: LV: Found an estimated cost of 28 for VF 8 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX2: LV: Found an estimated cost of 28 for VF 8 For instruction: store i64 %v3, i64* %out3, align 8
; AVX2: LV: Found an estimated cost of 208 for VF 16 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX2: LV: Found an estimated cost of 56 for VF 16 For instruction: store i64 %v3, i64* %out3, align 8
; ;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store i64 %v3, i64* %out3, align 8
; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction: store i64 %v3, i64* %out3, align 8
; AVX512: LV: Found an estimated cost of 11 for VF 4 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX512: LV: Found an estimated cost of 11 for VF 4 For instruction: store i64 %v3, i64* %out3, align 8
; AVX512: LV: Found an estimated cost of 22 for VF 8 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX512: LV: Found an estimated cost of 22 for VF 8 For instruction: store i64 %v3, i64* %out3, align 8
; AVX512: LV: Found an estimated cost of 44 for VF 16 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX512: LV: Found an estimated cost of 44 for VF 16 For instruction: store i64 %v3, i64* %out3, align 8
; AVX512: LV: Found an estimated cost of 88 for VF 32 For instruction: store i64 %v3, i64* %out3, align 8 ; AVX512: LV: Found an estimated cost of 88 for VF 32 For instruction: store i64 %v3, i64* %out3, align 8
; ;
▲ Show 20 Lines • Show All 41 Lines • Show Last 20 Lines