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[X86][Costmodel] Load/store i16 Stride=6 VF=32 interleaving costs
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Authored by lebedev.ri on Oct 16 2021, 9:47 AM.

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Summary

A few more tuples are being queried after D111546. Might be good to model them,
They all require a lot of manual assembly surgery.

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/YTeT9M7fW - for intels Block RThroughput: <=212.0; for ryzens, Block RThroughput: <=64.0
So could pick cost of 212

For store we have:
https://godbolt.org/z/vc954KEGP - for intels Block RThroughput: <=90.0; for ryzens, Block RThroughput: <=24.0
So we could pick cost of 90.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

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