[PHIElimination] Enable machine verification after this pass

[MatzeB]

LGTM

[uabelho]

Hi,

I ran into a verifier error after PHIElimination with this patch.

I saw this for my out-of-tree target, but I think the following mir-testcase exposes the same thing on X86:

llc -verify-machineinstrs -o /dev/null bbi-61405_x86.mir -run-pass=livevars,phi-node-elimination,twoaddressinstruction

Result:

*** Bad machine code: LiveVariables: Block should not be in AliveBlocks ***
- function:    f245
- basic block: %bb.1  (0x7353b68)
Virtual register %6 is not needed live through the block.
LLVM ERROR: Found 1 machine code errors.

It seems to be the undef use of %6 in

dead %2:gr16 = PHI undef %6, %bb.1, undef %3, %bb.5

that trips PHI Elimination over.
Without it, the inserted COPY for the other PHI gets a kill marking on its source (%6), and all is fine.
But with the "undef %6" operand in the second PHI, the kill marking is skipped and then we get the verifier error.

[foad]

Hi @uabelho, can you share the test case?

[uabelho]

In D111006#3055033, @foad wrote:

Hi @uabelho, can you share the test case?

Oh, I forgot that! Here it is!

Thanks!

bbi-61405_x86.mir2 KBDownload

[foad]

D111552 should fix it.

[uabelho]

In D111006#3055193, @foad wrote:

D111552 should fix it.

Yep, thanks!

llvm/lib/CodeGen/TargetPassConfig.cpp

 /// has not be overriden on the command line with '-regalloc=...'
 bool TargetPassConfig::usingDefaultRegAlloc() const {
   return RegAlloc.getNumOccurrences() == 0;
 }
 
 /// Add the minimum set of target-independent passes that are required for
 /// register allocation. No coalescing or scheduling.
 void TargetPassConfig::addFastRegAlloc() {
-  addPass(&PHIEliminationID, false);
+  addPass(&PHIEliminationID);
   addPass(&TwoAddressInstructionPassID, false);
 
   addRegAssignAndRewriteFast();
 }
 
 /// Add standard target-independent passes that are tightly coupled with
 /// optimized register allocation, including coalescing, machine instruction
 /// scheduling, and register allocation itself.
void TargetPassConfig::addOptimizedRegAlloc() {
   // When LiveVariables is removed this has to be removed/moved either.
   // Explicit addition of UnreachableMachineBlockElim allows stopping before or
   // after it with -stop-before/-stop-after.
   addPass(&UnreachableMachineBlockElimID);
   addPass(&LiveVariablesID);
 
   // Edge splitting is smarter with machine loop info.
   addPass(&MachineLoopInfoID);
-  addPass(&PHIEliminationID, false);
+  addPass(&PHIEliminationID);
 
   // Eventually, we want to run LiveIntervals before PHI elimination.
   if (EarlyLiveIntervals)
     addPass(&LiveIntervalsID);
 
   addPass(&TwoAddressInstructionPassID, false);
   addPass(&RegisterCoalescerID);