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Differential D110333

[ARM] Add more MVE intrinsics to sink splats to
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Authored by dmgreen on Sep 23 2021, 7:14 AM.

Details

Reviewers
samtebbs
SjoerdMeijer
simon_tatham
ostannard
Commits
rGf9aa8623fe6d: [ARM] Add more MVE intrinsics to sink splats to
Summary

This adds a few more unpredicated intrinsics to sink splats to, in order to create more qr instruction variants. Notably this includes saddsat/uaddsat but also some of the unpredicated mve intrinsics.

Diff Detail

Event Timeline

dmgreen created this revision.Sep 23 2021, 7:14 AM
Herald added subscribers: hiraditya, kristof.beyls. · View Herald TranscriptSep 23 2021, 7:14 AM
dmgreen requested review of this revision.Sep 23 2021, 7:14 AM
Herald added a project: Restricted Project. · View Herald TranscriptSep 23 2021, 7:14 AM
Harbormaster completed remote builds in B125340: Diff 374535.Sep 23 2021, 7:14 AM
samtebbs accepted this revision.Sep 28 2021, 4:11 AM

Nice one

This revision is now accepted and ready to land.Sep 28 2021, 4:11 AM
This revision was landed with ongoing or failed builds.Sep 30 2021, 6:41 AM
Closed by commit rGf9aa8623fe6d: [ARM] Add more MVE intrinsics to sink splats to (authored by dmgreen). · Explain Why
This revision was automatically updated to reflect the committed changes.
dmgreen added a commit: rGf9aa8623fe6d: [ARM] Add more MVE intrinsics to sink splats to.

Revision Contents

PathSize
llvm/
lib/
Target/
ARM/
9 lines
test/
CodeGen/
Thumb2/
63 lines

Diff 376188

llvm/lib/Target/ARM/ARMISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 18,367 Lines • ▼ Show 20 Lines auto IsSinker = [&](Instruction *I, int Operand) {
case Instruction::LShr: case Instruction::LShr:
case Instruction::AShr: case Instruction::AShr:
return Operand == 1; return Operand == 1;
case Instruction::Call: case Instruction::Call:
if (auto *II = dyn_cast<IntrinsicInst>(I)) { if (auto *II = dyn_cast<IntrinsicInst>(I)) {
switch (II->getIntrinsicID()) { switch (II->getIntrinsicID()) {
case Intrinsic::fma: case Intrinsic::fma:
return !IsFMS(I); return !IsFMS(I);
case Intrinsic::sadd_sat:
case Intrinsic::uadd_sat:
case Intrinsic::arm_mve_add_predicated: case Intrinsic::arm_mve_add_predicated:
case Intrinsic::arm_mve_mul_predicated: case Intrinsic::arm_mve_mul_predicated:
case Intrinsic::arm_mve_qadd_predicated: case Intrinsic::arm_mve_qadd_predicated:
case Intrinsic::arm_mve_vhadd:
case Intrinsic::arm_mve_hadd_predicated: case Intrinsic::arm_mve_hadd_predicated:
case Intrinsic::arm_mve_vqdmull:
case Intrinsic::arm_mve_vqdmull_predicated: case Intrinsic::arm_mve_vqdmull_predicated:
case Intrinsic::arm_mve_vqdmulh:
case Intrinsic::arm_mve_qdmulh_predicated: case Intrinsic::arm_mve_qdmulh_predicated:
case Intrinsic::arm_mve_vqrdmulh:
case Intrinsic::arm_mve_qrdmulh_predicated: case Intrinsic::arm_mve_qrdmulh_predicated:
case Intrinsic::arm_mve_fma_predicated: case Intrinsic::arm_mve_fma_predicated:
return true; return true;
case Intrinsic::ssub_sat:
case Intrinsic::usub_sat:
case Intrinsic::arm_mve_sub_predicated: case Intrinsic::arm_mve_sub_predicated:
case Intrinsic::arm_mve_qsub_predicated: case Intrinsic::arm_mve_qsub_predicated:
case Intrinsic::arm_mve_hsub_predicated: case Intrinsic::arm_mve_hsub_predicated:
case Intrinsic::arm_mve_vhsub:
return Operand == 1; return Operand == 1;
default: default:
return false; return false;
} }
} }
return false; return false;
default: default:
return false; return false;
▲ Show 20 Lines • Show All 2,716 Lines • Show Last 20 Lines

llvm/test/CodeGen/Thumb2/mve-qrintr.ll

Show First 20 Lines • Show All 268 Lines • ▼ Show 20 Lines
; CHECK-LABEL: vqaddq: ; CHECK-LABEL: vqaddq:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r7, lr} ; CHECK-NEXT: .save {r7, lr}
; CHECK-NEXT: push {r7, lr} ; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r2, #1 ; CHECK-NEXT: cmp r2, #1
; CHECK-NEXT: it lt ; CHECK-NEXT: it lt
; CHECK-NEXT: poplt {r7, pc} ; CHECK-NEXT: poplt {r7, pc}
; CHECK-NEXT: .LBB6_1: @ %for.body.preheader ; CHECK-NEXT: .LBB6_1: @ %for.body.preheader
; CHECK-NEXT: vdup.32 q0, r3
; CHECK-NEXT: dlstp.32 lr, r2 ; CHECK-NEXT: dlstp.32 lr, r2
; CHECK-NEXT: .LBB6_2: @ %for.body ; CHECK-NEXT: .LBB6_2: @ %for.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q1, [r0], #16 ; CHECK-NEXT: vldrw.u32 q0, [r0], #16
; CHECK-NEXT: vqadd.s32 q1, q1, q0 ; CHECK-NEXT: vqadd.s32 q0, q0, r3
; CHECK-NEXT: vstrw.32 q1, [r1], #16 ; CHECK-NEXT: vstrw.32 q0, [r1], #16
; CHECK-NEXT: letp lr, .LBB6_2 ; CHECK-NEXT: letp lr, .LBB6_2
; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup ; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup
; CHECK-NEXT: pop {r7, pc} ; CHECK-NEXT: pop {r7, pc}
entry: entry:
%.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0 %.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0
%.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer %.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
%cmp11 = icmp sgt i32 %n, 0 %cmp11 = icmp sgt i32 %n, 0
br i1 %cmp11, label %for.body, label %for.cond.cleanup br i1 %cmp11, label %for.body, label %for.cond.cleanup
Show All 22 Lines
; CHECK-LABEL: vqaddqu: ; CHECK-LABEL: vqaddqu:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r7, lr} ; CHECK-NEXT: .save {r7, lr}
; CHECK-NEXT: push {r7, lr} ; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r2, #1 ; CHECK-NEXT: cmp r2, #1
; CHECK-NEXT: it lt ; CHECK-NEXT: it lt
; CHECK-NEXT: poplt {r7, pc} ; CHECK-NEXT: poplt {r7, pc}
; CHECK-NEXT: .LBB7_1: @ %for.body.preheader ; CHECK-NEXT: .LBB7_1: @ %for.body.preheader
; CHECK-NEXT: vdup.32 q0, r3
; CHECK-NEXT: dlstp.32 lr, r2 ; CHECK-NEXT: dlstp.32 lr, r2
; CHECK-NEXT: .LBB7_2: @ %for.body ; CHECK-NEXT: .LBB7_2: @ %for.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q1, [r0], #16 ; CHECK-NEXT: vldrw.u32 q0, [r0], #16
; CHECK-NEXT: vqadd.u32 q1, q1, q0 ; CHECK-NEXT: vqadd.u32 q0, q0, r3
; CHECK-NEXT: vstrw.32 q1, [r1], #16 ; CHECK-NEXT: vstrw.32 q0, [r1], #16
; CHECK-NEXT: letp lr, .LBB7_2 ; CHECK-NEXT: letp lr, .LBB7_2
; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup ; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup
; CHECK-NEXT: pop {r7, pc} ; CHECK-NEXT: pop {r7, pc}
entry: entry:
%.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0 %.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0
%.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer %.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
%cmp11 = icmp sgt i32 %n, 0 %cmp11 = icmp sgt i32 %n, 0
br i1 %cmp11, label %for.body, label %for.cond.cleanup br i1 %cmp11, label %for.body, label %for.cond.cleanup
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; CHECK-LABEL: vqsubq: ; CHECK-LABEL: vqsubq:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r7, lr} ; CHECK-NEXT: .save {r7, lr}
; CHECK-NEXT: push {r7, lr} ; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r2, #1 ; CHECK-NEXT: cmp r2, #1
; CHECK-NEXT: it lt ; CHECK-NEXT: it lt
; CHECK-NEXT: poplt {r7, pc} ; CHECK-NEXT: poplt {r7, pc}
; CHECK-NEXT: .LBB9_1: @ %for.body.preheader ; CHECK-NEXT: .LBB9_1: @ %for.body.preheader
; CHECK-NEXT: vdup.32 q0, r3
; CHECK-NEXT: dlstp.32 lr, r2 ; CHECK-NEXT: dlstp.32 lr, r2
; CHECK-NEXT: .LBB9_2: @ %for.body ; CHECK-NEXT: .LBB9_2: @ %for.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q1, [r0], #16 ; CHECK-NEXT: vldrw.u32 q0, [r0], #16
; CHECK-NEXT: vqsub.s32 q1, q1, q0 ; CHECK-NEXT: vqsub.s32 q0, q0, r3
; CHECK-NEXT: vstrw.32 q1, [r1], #16 ; CHECK-NEXT: vstrw.32 q0, [r1], #16
; CHECK-NEXT: letp lr, .LBB9_2 ; CHECK-NEXT: letp lr, .LBB9_2
; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup ; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup
; CHECK-NEXT: pop {r7, pc} ; CHECK-NEXT: pop {r7, pc}
entry: entry:
%.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0 %.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0
%.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer %.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
%cmp11 = icmp sgt i32 %n, 0 %cmp11 = icmp sgt i32 %n, 0
br i1 %cmp11, label %for.body, label %for.cond.cleanup br i1 %cmp11, label %for.body, label %for.cond.cleanup
Show All 22 Lines
; CHECK-LABEL: vqsubqu: ; CHECK-LABEL: vqsubqu:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r7, lr} ; CHECK-NEXT: .save {r7, lr}
; CHECK-NEXT: push {r7, lr} ; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r2, #1 ; CHECK-NEXT: cmp r2, #1
; CHECK-NEXT: it lt ; CHECK-NEXT: it lt
; CHECK-NEXT: poplt {r7, pc} ; CHECK-NEXT: poplt {r7, pc}
; CHECK-NEXT: .LBB10_1: @ %for.body.preheader ; CHECK-NEXT: .LBB10_1: @ %for.body.preheader
; CHECK-NEXT: vdup.32 q0, r3
; CHECK-NEXT: dlstp.32 lr, r2 ; CHECK-NEXT: dlstp.32 lr, r2
; CHECK-NEXT: .LBB10_2: @ %for.body ; CHECK-NEXT: .LBB10_2: @ %for.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q1, [r0], #16 ; CHECK-NEXT: vldrw.u32 q0, [r0], #16
; CHECK-NEXT: vqsub.u32 q1, q1, q0 ; CHECK-NEXT: vqsub.u32 q0, q0, r3
; CHECK-NEXT: vstrw.32 q1, [r1], #16 ; CHECK-NEXT: vstrw.32 q0, [r1], #16
; CHECK-NEXT: letp lr, .LBB10_2 ; CHECK-NEXT: letp lr, .LBB10_2
; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup ; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup
; CHECK-NEXT: pop {r7, pc} ; CHECK-NEXT: pop {r7, pc}
entry: entry:
%.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0 %.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0
%.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer %.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
%cmp11 = icmp sgt i32 %n, 0 %cmp11 = icmp sgt i32 %n, 0
br i1 %cmp11, label %for.body, label %for.cond.cleanup br i1 %cmp11, label %for.body, label %for.cond.cleanup
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; CHECK-LABEL: vhaddq: ; CHECK-LABEL: vhaddq:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r7, lr} ; CHECK-NEXT: .save {r7, lr}
; CHECK-NEXT: push {r7, lr} ; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r2, #1 ; CHECK-NEXT: cmp r2, #1
; CHECK-NEXT: it lt ; CHECK-NEXT: it lt
; CHECK-NEXT: poplt {r7, pc} ; CHECK-NEXT: poplt {r7, pc}
; CHECK-NEXT: .LBB12_1: @ %for.body.preheader ; CHECK-NEXT: .LBB12_1: @ %for.body.preheader
; CHECK-NEXT: vdup.32 q0, r3
; CHECK-NEXT: dlstp.32 lr, r2 ; CHECK-NEXT: dlstp.32 lr, r2
; CHECK-NEXT: .LBB12_2: @ %for.body ; CHECK-NEXT: .LBB12_2: @ %for.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q1, [r0], #16 ; CHECK-NEXT: vldrw.u32 q0, [r0], #16
; CHECK-NEXT: vhadd.s32 q1, q1, q0 ; CHECK-NEXT: vhadd.s32 q0, q0, r3
; CHECK-NEXT: vstrw.32 q1, [r1], #16 ; CHECK-NEXT: vstrw.32 q0, [r1], #16
; CHECK-NEXT: letp lr, .LBB12_2 ; CHECK-NEXT: letp lr, .LBB12_2
; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup ; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup
; CHECK-NEXT: pop {r7, pc} ; CHECK-NEXT: pop {r7, pc}
entry: entry:
%.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0 %.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0
%.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer %.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
%cmp11 = icmp sgt i32 %n, 0 %cmp11 = icmp sgt i32 %n, 0
br i1 %cmp11, label %for.body, label %for.cond.cleanup br i1 %cmp11, label %for.body, label %for.cond.cleanup
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; CHECK-LABEL: vhsubq: ; CHECK-LABEL: vhsubq:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r7, lr} ; CHECK-NEXT: .save {r7, lr}
; CHECK-NEXT: push {r7, lr} ; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r2, #1 ; CHECK-NEXT: cmp r2, #1
; CHECK-NEXT: it lt ; CHECK-NEXT: it lt
; CHECK-NEXT: poplt {r7, pc} ; CHECK-NEXT: poplt {r7, pc}
; CHECK-NEXT: .LBB14_1: @ %for.body.preheader ; CHECK-NEXT: .LBB14_1: @ %for.body.preheader
; CHECK-NEXT: vdup.32 q0, r3
; CHECK-NEXT: dlstp.32 lr, r2 ; CHECK-NEXT: dlstp.32 lr, r2
; CHECK-NEXT: .LBB14_2: @ %for.body ; CHECK-NEXT: .LBB14_2: @ %for.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q1, [r0], #16 ; CHECK-NEXT: vldrw.u32 q0, [r0], #16
; CHECK-NEXT: vhsub.s32 q1, q1, q0 ; CHECK-NEXT: vhsub.s32 q0, q0, r3
; CHECK-NEXT: vstrw.32 q1, [r1], #16 ; CHECK-NEXT: vstrw.32 q0, [r1], #16
; CHECK-NEXT: letp lr, .LBB14_2 ; CHECK-NEXT: letp lr, .LBB14_2
; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup ; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup
; CHECK-NEXT: pop {r7, pc} ; CHECK-NEXT: pop {r7, pc}
entry: entry:
%.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0 %.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0
%.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer %.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
%cmp11 = icmp sgt i32 %n, 0 %cmp11 = icmp sgt i32 %n, 0
br i1 %cmp11, label %for.body, label %for.cond.cleanup br i1 %cmp11, label %for.body, label %for.cond.cleanup
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; CHECK-LABEL: vqdmullbq: ; CHECK-LABEL: vqdmullbq:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r7, lr} ; CHECK-NEXT: .save {r7, lr}
; CHECK-NEXT: push {r7, lr} ; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r2, #1 ; CHECK-NEXT: cmp r2, #1
; CHECK-NEXT: it lt ; CHECK-NEXT: it lt
; CHECK-NEXT: poplt {r7, pc} ; CHECK-NEXT: poplt {r7, pc}
; CHECK-NEXT: .LBB16_1: @ %for.body.preheader ; CHECK-NEXT: .LBB16_1: @ %for.body.preheader
; CHECK-NEXT: vdup.32 q0, r3
; CHECK-NEXT: dlstp.32 lr, r2 ; CHECK-NEXT: dlstp.32 lr, r2
; CHECK-NEXT: .LBB16_2: @ %for.body ; CHECK-NEXT: .LBB16_2: @ %for.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q1, [r0], #16 ; CHECK-NEXT: vldrw.u32 q0, [r0], #16
; CHECK-NEXT: vqdmullb.s32 q2, q1, q0 ; CHECK-NEXT: vqdmullb.s32 q1, q0, r3
; CHECK-NEXT: vstrw.32 q2, [r1], #16 ; CHECK-NEXT: vstrw.32 q1, [r1], #16
; CHECK-NEXT: letp lr, .LBB16_2 ; CHECK-NEXT: letp lr, .LBB16_2
; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup ; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup
; CHECK-NEXT: pop {r7, pc} ; CHECK-NEXT: pop {r7, pc}
entry: entry:
%.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0 %.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0
%.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer %.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
%cmp11 = icmp sgt i32 %n, 0 %cmp11 = icmp sgt i32 %n, 0
br i1 %cmp11, label %for.body, label %for.cond.cleanup br i1 %cmp11, label %for.body, label %for.cond.cleanup
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; CHECK-LABEL: vqdmulhq: ; CHECK-LABEL: vqdmulhq:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r7, lr} ; CHECK-NEXT: .save {r7, lr}
; CHECK-NEXT: push {r7, lr} ; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r2, #1 ; CHECK-NEXT: cmp r2, #1
; CHECK-NEXT: it lt ; CHECK-NEXT: it lt
; CHECK-NEXT: poplt {r7, pc} ; CHECK-NEXT: poplt {r7, pc}
; CHECK-NEXT: .LBB18_1: @ %for.body.preheader ; CHECK-NEXT: .LBB18_1: @ %for.body.preheader
; CHECK-NEXT: vdup.32 q0, r3
; CHECK-NEXT: dlstp.32 lr, r2 ; CHECK-NEXT: dlstp.32 lr, r2
; CHECK-NEXT: .LBB18_2: @ %for.body ; CHECK-NEXT: .LBB18_2: @ %for.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q1, [r0], #16 ; CHECK-NEXT: vldrw.u32 q0, [r0], #16
; CHECK-NEXT: vqdmulh.s32 q1, q1, q0 ; CHECK-NEXT: vqdmulh.s32 q0, q0, r3
; CHECK-NEXT: vstrw.32 q1, [r1], #16 ; CHECK-NEXT: vstrw.32 q0, [r1], #16
; CHECK-NEXT: letp lr, .LBB18_2 ; CHECK-NEXT: letp lr, .LBB18_2
; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup ; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup
; CHECK-NEXT: pop {r7, pc} ; CHECK-NEXT: pop {r7, pc}
entry: entry:
%.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0 %.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0
%.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer %.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
%cmp11 = icmp sgt i32 %n, 0 %cmp11 = icmp sgt i32 %n, 0
br i1 %cmp11, label %for.body, label %for.cond.cleanup br i1 %cmp11, label %for.body, label %for.cond.cleanup
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; CHECK-LABEL: vqrdmulhq: ; CHECK-LABEL: vqrdmulhq:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r7, lr} ; CHECK-NEXT: .save {r7, lr}
; CHECK-NEXT: push {r7, lr} ; CHECK-NEXT: push {r7, lr}
; CHECK-NEXT: cmp r2, #1 ; CHECK-NEXT: cmp r2, #1
; CHECK-NEXT: it lt ; CHECK-NEXT: it lt
; CHECK-NEXT: poplt {r7, pc} ; CHECK-NEXT: poplt {r7, pc}
; CHECK-NEXT: .LBB20_1: @ %for.body.preheader ; CHECK-NEXT: .LBB20_1: @ %for.body.preheader
; CHECK-NEXT: vdup.32 q0, r3
; CHECK-NEXT: dlstp.32 lr, r2 ; CHECK-NEXT: dlstp.32 lr, r2
; CHECK-NEXT: .LBB20_2: @ %for.body ; CHECK-NEXT: .LBB20_2: @ %for.body
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vldrw.u32 q1, [r0], #16 ; CHECK-NEXT: vldrw.u32 q0, [r0], #16
; CHECK-NEXT: vqrdmulh.s32 q1, q1, q0 ; CHECK-NEXT: vqrdmulh.s32 q0, q0, r3
; CHECK-NEXT: vstrw.32 q1, [r1], #16 ; CHECK-NEXT: vstrw.32 q0, [r1], #16
; CHECK-NEXT: letp lr, .LBB20_2 ; CHECK-NEXT: letp lr, .LBB20_2
; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup ; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup
; CHECK-NEXT: pop {r7, pc} ; CHECK-NEXT: pop {r7, pc}
entry: entry:
%.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0 %.splatinsert = insertelement <4 x i32> poison, i32 %z, i32 0
%.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer %.splat = shufflevector <4 x i32> %.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer
%cmp11 = icmp sgt i32 %n, 0 %cmp11 = icmp sgt i32 %n, 0
br i1 %cmp11, label %for.body, label %for.cond.cleanup br i1 %cmp11, label %for.body, label %for.cond.cleanup
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