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[SelectionDAG] Add PromoteIntOp_INSERT_SUBVECTOR.
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Authored by sdesmalen on Sep 20 2021, 3:45 AM.

Details

Summary

This is required to codegen something like:

<vscale x 8 x i16> @llvm.experimental.vector.insert(<vscale x 8 x i16> %vec,
                                                    <vscale x 2 x i16> %subvec,
                                                    i64 %idx)

where the output vector is legal, but the input vector needs promoting.

It implements this by performing the whole operation on the promoted type,
and then truncating the result.

Diff Detail

Event Timeline

sdesmalen created this revision.Sep 20 2021, 3:45 AM
sdesmalen requested review of this revision.Sep 20 2021, 3:45 AM
Herald added a project: Restricted Project. · View Herald TranscriptSep 20 2021, 3:45 AM
This revision is now accepted and ready to land.Sep 20 2021, 5:38 AM
craig.topper added inline comments.Sep 20 2021, 4:22 PM
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
5089

I have a bit of distrust for changeVectorElementType. If V0.getValueType() is representable as an MVT, but the promoted type isn't, it will fail. It branches a between an MVT code path and EVT path internally. The MVT path would require an LLVMContext to produce an EVT which it can't get so it will assert.

sdesmalen updated this revision to Diff 373826.Sep 21 2021, 2:57 AM

Use EVT::getVectorVT instead of EVT::changeVectorElementType().

llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
5089

That's a good point, we should probably change the interface by requiring a Context and then calling getVectorVT in it's implementation, which handles the case of 'Simple' vs 'Extended' correctly. However, that is a big change which is separate to this patch, so I'll just use getVectorVT for now.

This revision was landed with ongoing or failed builds.Sep 22 2021, 5:33 AM
This revision was automatically updated to reflect the committed changes.