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Differential D109393

[asan] Changed the label for error reporting code to use GOT instead of PLT.
AbandonedPublic

Authored by kstoimenov on Sep 7 2021, 2:31 PM.

Details

Reviewers
kda
Summary

Switching from PLT to GOT makes following errors go away: "error: 32 bit reloc applied to a field with a different size".

Diff Detail

Unit TestsFailed

TimeTest
20 msx64 debian > Flang.Evaluate::folding28.f90

Event Timeline

kstoimenov created this revision.Sep 7 2021, 2:31 PM
Herald added subscribers: pengfei, hiraditya. · View Herald TranscriptSep 7 2021, 2:31 PM
kstoimenov requested review of this revision.Sep 7 2021, 2:31 PM
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pcc added a subscriber: pcc.Sep 7 2021, 2:40 PM

What's the effect on the relocation types in the object file with this change? I don't think it's valid to have a branch with an @GOT modifier.

kstoimenov added a comment.Sep 7 2021, 2:45 PM
In D109393#2987961, @pcc wrote:

What's the effect on the relocation types in the object file with this change? I don't think it's valid to have a branch with an @GOT modifier.

Moving from PTL to GOT fixed this errors like this: "error: 32 bit reloc applied to a field with a different size". What do you thing should be the right type for this? Not specifying PTL also had problems with linking so living in blank is not an option.

kstoimenov edited the summary of this revision. (Show Details)Sep 7 2021, 2:46 PM
pcc added a comment.Sep 7 2021, 2:57 PM
In D109393#2987973, @kstoimenov wrote:
In D109393#2987961, @pcc wrote:

What's the effect on the relocation types in the object file with this change? I don't think it's valid to have a branch with an @GOT modifier.

Moving from PTL to GOT fixed this errors like this: "error: 32 bit reloc applied to a field with a different size". What do you thing should be the right type for this? Not specifying PTL also had problems with linking so living in blank is not an option.

I mean what's the difference in output of objdump -dr file.o before and after.

Harbormaster completed remote builds in B122951: Diff 371192.Sep 7 2021, 3:26 PM
kstoimenov added a comment.Sep 7 2021, 4:36 PM
In D109393#2988029, @pcc wrote:
In D109393#2987973, @kstoimenov wrote:
In D109393#2987961, @pcc wrote:

What's the effect on the relocation types in the object file with this change? I don't think it's valid to have a branch with an @GOT modifier.

Moving from PTL to GOT fixed this errors like this: "error: 32 bit reloc applied to a field with a different size". What do you thing should be the right type for this? Not specifying PTL also had problems with linking so living in blank is not an option.

I mean what's the difference in output of objdump -dr file.o before and after.

Before it was like this:

28:   e9 00 00 00 00          jmpq   2d <__asan_check_store2_rn53+0x2d>
                      29: R_X86_64_PLT32      __asan_report_store2-0x4

With the new flag it is like this:

28:   e9 00 00 00 00          jmpq   2d <__asan_check_store2_rn53+0x2d>
                      29: R_X86_64_GOTPC32    __asan_report_store2-0x4
pcc added a comment.Sep 7 2021, 5:35 PM

Have you verified that things work at runtime with this change? Because I believe that your change will result in branching to the GOT entry for the runtime functions. Since GOT entries are just addresses and are not executable, I believe that this would result in a segfault.

I believe that R_X86_64_PLT32 is the correct relocation to use in this case. What's unclear to me though is how you're getting that error. That should only be happening if the relocation is being applied to an address of the wrong size. Can you check what the value of Type is in checkIs32 in llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp when the check fails? I suspect that the JMP_1 in your instruction somehow remains a JMP_1 instead of being properly "unrelaxed" to JMP_4.

kstoimenov added a comment.Sep 8 2021, 7:42 AM

Thanks for the review. I think the culprit was that I was using JMP_1 instead of JMP_4. I will drop this patch and send out another one.

kstoimenov abandoned this revision.Sep 8 2021, 7:42 AM

Revision Contents

PathSize
llvm/
lib/
Target/
X86/
2 lines
test/
CodeGen/
X86/
10 lines
10 lines

Diff 371192

llvm/lib/Target/X86/X86MCInstLower.cpp

Show First 20 Lines • Show All 1,520 Lines • ▼ Show 20 Linesvoid X86AsmPrinter::emitAsanReportError(Module &M, unsigned Reg,
MCSymbol *ReportError = OutContext.getOrCreateSymbol( MCSymbol *ReportError = OutContext.getOrCreateSymbol(
"__asan_report_" + Name + utostr(1ULL << AccessInfo.AccessSizeIndex)); "__asan_report_" + Name + utostr(1ULL << AccessInfo.AccessSizeIndex));
OutStreamer->emitInstruction(MCInstBuilder(X86::MOV64rr) OutStreamer->emitInstruction(MCInstBuilder(X86::MOV64rr)
.addReg(X86::RDI) .addReg(X86::RDI)
.addReg(X86::NoRegister + Reg), .addReg(X86::NoRegister + Reg),
STI); STI);
OutStreamer->emitInstruction( OutStreamer->emitInstruction(
MCInstBuilder(X86::JMP_1) MCInstBuilder(X86::JMP_1)
.addExpr(MCSymbolRefExpr::create(ReportError, MCSymbolRefExpr::VK_PLT, .addExpr(MCSymbolRefExpr::create(ReportError, MCSymbolRefExpr::VK_GOT,
OutContext)), OutContext)),
STI); STI);
} }
void X86AsmPrinter::emitAsanMemaccessSymbols(Module &M) { void X86AsmPrinter::emitAsanMemaccessSymbols(Module &M) {
if (AsanMemaccessSymbols.empty()) if (AsanMemaccessSymbols.empty())
return; return;
▲ Show 20 Lines • Show All 1,338 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/asan-check-memaccess-add.ll

Show First 20 Lines • Show All 160 Lines • ▼ Show 20 Lines
; CHECK-NEXT: [[EXTRA]]: ; CHECK-NEXT: [[EXTRA]]:
; CHECK-NEXT: pushq %rcx ; CHECK-NEXT: pushq %rcx
; CHECK-NEXT: movq [[REG]], %rcx ; CHECK-NEXT: movq [[REG]], %rcx
; CHECK-NEXT: andl $7, %ecx ; CHECK-NEXT: andl $7, %ecx
; CHECK-NEXT: cmpl %r8d, %ecx ; CHECK-NEXT: cmpl %r8d, %ecx
; CHECK-NEXT: popq %rcx ; CHECK-NEXT: popq %rcx
; CHECK-NEXT: jl [[RET]] ; CHECK-NEXT: jl [[RET]]
; CHECK-NEXT: movq [[REG:.*]], %rdi ; CHECK-NEXT: movq [[REG:.*]], %rdi
; CHECK-NEXT: jmp __asan_report_store1@PLT ; CHECK-NEXT: jmp __asan_report_store1@GOT
; CHECK: .type __asan_check_store2_rn[[RN2]],@function ; CHECK: .type __asan_check_store2_rn[[RN2]],@function
; CHECK-NEXT: .weak __asan_check_store2_rn[[RN2]] ; CHECK-NEXT: .weak __asan_check_store2_rn[[RN2]]
; CHECK-NEXT: .hidden __asan_check_store2_rn[[RN2]] ; CHECK-NEXT: .hidden __asan_check_store2_rn[[RN2]]
; CHECK-NEXT: __asan_check_store2_rn[[RN2]]: ; CHECK-NEXT: __asan_check_store2_rn[[RN2]]:
; CHECK-NEXT: movq [[REG:.*]], %r8 ; CHECK-NEXT: movq [[REG:.*]], %r8
; CHECK-NEXT: shrq $3, %r8 ; CHECK-NEXT: shrq $3, %r8
; CHECK-NEXT: movsbl 2147450880(%r8), %r8d ; CHECK-NEXT: movsbl 2147450880(%r8), %r8d
; CHECK-NEXT: testl %r8d, %r8d ; CHECK-NEXT: testl %r8d, %r8d
; CHECK-NEXT: jne [[EXTRA:.*]] ; CHECK-NEXT: jne [[EXTRA:.*]]
; CHECK-NEXT: [[RET:.*]]: ; CHECK-NEXT: [[RET:.*]]:
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: [[EXTRA]]: ; CHECK-NEXT: [[EXTRA]]:
; CHECK-NEXT: pushq %rcx ; CHECK-NEXT: pushq %rcx
; CHECK-NEXT: movq [[REG]], %rcx ; CHECK-NEXT: movq [[REG]], %rcx
; CHECK-NEXT: andl $7, %ecx ; CHECK-NEXT: andl $7, %ecx
; CHECK-NEXT: addl $1, %ecx ; CHECK-NEXT: addl $1, %ecx
; CHECK-NEXT: cmpl %r8d, %ecx ; CHECK-NEXT: cmpl %r8d, %ecx
; CHECK-NEXT: popq %rcx ; CHECK-NEXT: popq %rcx
; CHECK-NEXT: jl [[RET]] ; CHECK-NEXT: jl [[RET]]
; CHECK-NEXT: movq [[REG:.*]], %rdi ; CHECK-NEXT: movq [[REG:.*]], %rdi
; CHECK-NEXT: jmp __asan_report_store2@PLT ; CHECK-NEXT: jmp __asan_report_store2@GOT
; CHECK: .type __asan_check_store4_rn[[RN4]],@function ; CHECK: .type __asan_check_store4_rn[[RN4]],@function
; CHECK-NEXT: .weak __asan_check_store4_rn[[RN4]] ; CHECK-NEXT: .weak __asan_check_store4_rn[[RN4]]
; CHECK-NEXT: .hidden __asan_check_store4_rn[[RN4]] ; CHECK-NEXT: .hidden __asan_check_store4_rn[[RN4]]
; CHECK-NEXT: __asan_check_store4_rn[[RN4]]: ; CHECK-NEXT: __asan_check_store4_rn[[RN4]]:
; CHECK-NEXT: movq [[REG:.*]], %r8 ; CHECK-NEXT: movq [[REG:.*]], %r8
; CHECK-NEXT: shrq $3, %r8 ; CHECK-NEXT: shrq $3, %r8
; CHECK-NEXT: movsbl 2147450880(%r8), %r8d ; CHECK-NEXT: movsbl 2147450880(%r8), %r8d
; CHECK-NEXT: testl %r8d, %r8d ; CHECK-NEXT: testl %r8d, %r8d
; CHECK-NEXT: jne [[EXTRA:.*]] ; CHECK-NEXT: jne [[EXTRA:.*]]
; CHECK-NEXT: [[RET:.*]]: ; CHECK-NEXT: [[RET:.*]]:
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: [[EXTRA]]: ; CHECK-NEXT: [[EXTRA]]:
; CHECK-NEXT: pushq %rcx ; CHECK-NEXT: pushq %rcx
; CHECK-NEXT: movq [[REG]], %rcx ; CHECK-NEXT: movq [[REG]], %rcx
; CHECK-NEXT: andl $7, %ecx ; CHECK-NEXT: andl $7, %ecx
; CHECK-NEXT: addl $3, %ecx ; CHECK-NEXT: addl $3, %ecx
; CHECK-NEXT: cmpl %r8d, %ecx ; CHECK-NEXT: cmpl %r8d, %ecx
; CHECK-NEXT: popq %rcx ; CHECK-NEXT: popq %rcx
; CHECK-NEXT: jl [[RET]] ; CHECK-NEXT: jl [[RET]]
; CHECK-NEXT: movq [[REG:.*]], %rdi ; CHECK-NEXT: movq [[REG:.*]], %rdi
; CHECK-NEXT: jmp __asan_report_store4@PLT ; CHECK-NEXT: jmp __asan_report_store4@GOT
; CHECK: .type __asan_check_store8_rn[[RN8]],@function ; CHECK: .type __asan_check_store8_rn[[RN8]],@function
; CHECK-NEXT: .weak __asan_check_store8_rn[[RN8]] ; CHECK-NEXT: .weak __asan_check_store8_rn[[RN8]]
; CHECK-NEXT: .hidden __asan_check_store8_rn[[RN8]] ; CHECK-NEXT: .hidden __asan_check_store8_rn[[RN8]]
; CHECK-NEXT: __asan_check_store8_rn[[RN8]]: ; CHECK-NEXT: __asan_check_store8_rn[[RN8]]:
; CHECK-NEXT: movq [[REG:.*]], %r8 ; CHECK-NEXT: movq [[REG:.*]], %r8
; CHECK-NEXT: shrq $3, %r8 ; CHECK-NEXT: shrq $3, %r8
; CHECK-NEXT: cmpb $0, 2147450880(%r8) ; CHECK-NEXT: cmpb $0, 2147450880(%r8)
; CHECK-NEXT: jne [[FAIL:.*]] ; CHECK-NEXT: jne [[FAIL:.*]]
; CHECK-NEXT: [[RET:.*]]: ; CHECK-NEXT: [[RET:.*]]:
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: [[FAIL]]: ; CHECK-NEXT: [[FAIL]]:
; CHECK-NEXT: movq [[REG:.*]], %rdi ; CHECK-NEXT: movq [[REG:.*]], %rdi
; CHECK-NEXT: jmp __asan_report_store8@PLT ; CHECK-NEXT: jmp __asan_report_store8@GOT
; CHECK: .type __asan_check_store16_rn[[RN16]],@function ; CHECK: .type __asan_check_store16_rn[[RN16]],@function
; CHECK-NEXT: .weak __asan_check_store16_rn[[RN16]] ; CHECK-NEXT: .weak __asan_check_store16_rn[[RN16]]
; CHECK-NEXT: .hidden __asan_check_store16_rn[[RN16]] ; CHECK-NEXT: .hidden __asan_check_store16_rn[[RN16]]
; CHECK-NEXT: __asan_check_store16_rn[[RN16]]: ; CHECK-NEXT: __asan_check_store16_rn[[RN16]]:
; CHECK-NEXT: movq [[REG:.*]], %r8 ; CHECK-NEXT: movq [[REG:.*]], %r8
; CHECK-NEXT: shrq $3, %r8 ; CHECK-NEXT: shrq $3, %r8
; CHECK-NEXT: cmpw $0, 2147450880(%r8) ; CHECK-NEXT: cmpw $0, 2147450880(%r8)
; CHECK-NEXT: jne [[FAIL:.*]] ; CHECK-NEXT: jne [[FAIL:.*]]
; CHECK-NEXT: [[RET:.*]]: ; CHECK-NEXT: [[RET:.*]]:
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: [[FAIL]]: ; CHECK-NEXT: [[FAIL]]:
; CHECK-NEXT: movq [[REG:.*]], %rdi ; CHECK-NEXT: movq [[REG:.*]], %rdi
; CHECK-NEXT: jmp __asan_report_store16@PLT ; CHECK-NEXT: jmp __asan_report_store16@GOT
declare void @llvm.asan.check.memaccess(i8*, i32 immarg) declare void @llvm.asan.check.memaccess(i8*, i32 immarg)

llvm/test/CodeGen/X86/asan-check-memaccess-or.ll

Show First 20 Lines • Show All 166 Lines • ▼ Show 20 Lines
; CHECK-NEXT: [[EXTRA]]: ; CHECK-NEXT: [[EXTRA]]:
; CHECK-NEXT: pushq %rcx ; CHECK-NEXT: pushq %rcx
; CHECK-NEXT: movq [[REG]], %rcx ; CHECK-NEXT: movq [[REG]], %rcx
; CHECK-NEXT: andl $7, %ecx ; CHECK-NEXT: andl $7, %ecx
; CHECK-NEXT: cmpl %r8d, %ecx ; CHECK-NEXT: cmpl %r8d, %ecx
; CHECK-NEXT: popq %rcx ; CHECK-NEXT: popq %rcx
; CHECK-NEXT: jl [[RET]] ; CHECK-NEXT: jl [[RET]]
; CHECK-NEXT: movq [[REG:.*]], %rdi ; CHECK-NEXT: movq [[REG:.*]], %rdi
; CHECK-NEXT: jmp __asan_report_store1@PLT ; CHECK-NEXT: jmp __asan_report_store1@GOT
; CHECK: .type __asan_check_store2_rn[[RN2]],@function ; CHECK: .type __asan_check_store2_rn[[RN2]],@function
; CHECK-NEXT: .weak __asan_check_store2_rn[[RN2]] ; CHECK-NEXT: .weak __asan_check_store2_rn[[RN2]]
; CHECK-NEXT: .hidden __asan_check_store2_rn[[RN2]] ; CHECK-NEXT: .hidden __asan_check_store2_rn[[RN2]]
; CHECK-NEXT: __asan_check_store2_rn[[RN2]]: ; CHECK-NEXT: __asan_check_store2_rn[[RN2]]:
; CHECK-NEXT: movq [[REG:.*]], %r8 ; CHECK-NEXT: movq [[REG:.*]], %r8
; CHECK-NEXT: shrq $3, %r8 ; CHECK-NEXT: shrq $3, %r8
; CHECK-NEXT: orq $17592186044416, %r8 ; CHECK-NEXT: orq $17592186044416, %r8
; CHECK-NEXT: movb (%r8), %r8b ; CHECK-NEXT: movb (%r8), %r8b
; CHECK-NEXT: testb %r8b, %r8b ; CHECK-NEXT: testb %r8b, %r8b
; CHECK-NEXT: jne [[EXTRA:.*]] ; CHECK-NEXT: jne [[EXTRA:.*]]
; CHECK-NEXT: [[RET:.*]]: ; CHECK-NEXT: [[RET:.*]]:
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: [[EXTRA]]: ; CHECK-NEXT: [[EXTRA]]:
; CHECK-NEXT: pushq %rcx ; CHECK-NEXT: pushq %rcx
; CHECK-NEXT: movq [[REG]], %rcx ; CHECK-NEXT: movq [[REG]], %rcx
; CHECK-NEXT: andl $7, %ecx ; CHECK-NEXT: andl $7, %ecx
; CHECK-NEXT: addl $1, %ecx ; CHECK-NEXT: addl $1, %ecx
; CHECK-NEXT: cmpl %r8d, %ecx ; CHECK-NEXT: cmpl %r8d, %ecx
; CHECK-NEXT: popq %rcx ; CHECK-NEXT: popq %rcx
; CHECK-NEXT: jl [[RET]] ; CHECK-NEXT: jl [[RET]]
; CHECK-NEXT: movq [[REG:.*]], %rdi ; CHECK-NEXT: movq [[REG:.*]], %rdi
; CHECK-NEXT: jmp __asan_report_store2@PLT ; CHECK-NEXT: jmp __asan_report_store2@GOT
; CHECK: .type __asan_check_store4_rn[[RN4]],@function ; CHECK: .type __asan_check_store4_rn[[RN4]],@function
; CHECK-NEXT: .weak __asan_check_store4_rn[[RN4]] ; CHECK-NEXT: .weak __asan_check_store4_rn[[RN4]]
; CHECK-NEXT: .hidden __asan_check_store4_rn[[RN4]] ; CHECK-NEXT: .hidden __asan_check_store4_rn[[RN4]]
; CHECK-NEXT: __asan_check_store4_rn[[RN4]]: ; CHECK-NEXT: __asan_check_store4_rn[[RN4]]:
; CHECK-NEXT: movq [[REG:.*]], %r8 ; CHECK-NEXT: movq [[REG:.*]], %r8
; CHECK-NEXT: shrq $3, %r8 ; CHECK-NEXT: shrq $3, %r8
; CHECK-NEXT: orq $17592186044416, %r8 ; CHECK-NEXT: orq $17592186044416, %r8
; CHECK-NEXT: movb (%r8), %r8b ; CHECK-NEXT: movb (%r8), %r8b
; CHECK-NEXT: testb %r8b, %r8b ; CHECK-NEXT: testb %r8b, %r8b
; CHECK-NEXT: jne [[EXTRA:.*]] ; CHECK-NEXT: jne [[EXTRA:.*]]
; CHECK-NEXT: [[RET:.*]]: ; CHECK-NEXT: [[RET:.*]]:
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: [[EXTRA]]: ; CHECK-NEXT: [[EXTRA]]:
; CHECK-NEXT: pushq %rcx ; CHECK-NEXT: pushq %rcx
; CHECK-NEXT: movq [[REG]], %rcx ; CHECK-NEXT: movq [[REG]], %rcx
; CHECK-NEXT: andl $7, %ecx ; CHECK-NEXT: andl $7, %ecx
; CHECK-NEXT: addl $3, %ecx ; CHECK-NEXT: addl $3, %ecx
; CHECK-NEXT: cmpl %r8d, %ecx ; CHECK-NEXT: cmpl %r8d, %ecx
; CHECK-NEXT: popq %rcx ; CHECK-NEXT: popq %rcx
; CHECK-NEXT: jl [[RET]] ; CHECK-NEXT: jl [[RET]]
; CHECK-NEXT: movq [[REG:.*]], %rdi ; CHECK-NEXT: movq [[REG:.*]], %rdi
; CHECK-NEXT: jmp __asan_report_store4@PLT ; CHECK-NEXT: jmp __asan_report_store4@GOT
; CHECK: .type __asan_check_store8_rn[[RN8]],@function ; CHECK: .type __asan_check_store8_rn[[RN8]],@function
; CHECK-NEXT: .weak __asan_check_store8_rn[[RN8]] ; CHECK-NEXT: .weak __asan_check_store8_rn[[RN8]]
; CHECK-NEXT: .hidden __asan_check_store8_rn[[RN8]] ; CHECK-NEXT: .hidden __asan_check_store8_rn[[RN8]]
; CHECK-NEXT: __asan_check_store8_rn[[RN8]]: ; CHECK-NEXT: __asan_check_store8_rn[[RN8]]:
; CHECK-NEXT: movq [[REG:.*]], %r8 ; CHECK-NEXT: movq [[REG:.*]], %r8
; CHECK-NEXT: shrq $3, %r8 ; CHECK-NEXT: shrq $3, %r8
; CHECK-NEXT: orq $17592186044416, %r8{{.*}} ; CHECK-NEXT: orq $17592186044416, %r8{{.*}}
; CHECK-NEXT: cmpb $0, (%r8) ; CHECK-NEXT: cmpb $0, (%r8)
; CHECK-NEXT: jne [[FAIL:.*]] ; CHECK-NEXT: jne [[FAIL:.*]]
; CHECK-NEXT: [[RET:.*]]: ; CHECK-NEXT: [[RET:.*]]:
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: [[FAIL]]: ; CHECK-NEXT: [[FAIL]]:
; CHECK-NEXT: movq [[REG:.*]], %rdi ; CHECK-NEXT: movq [[REG:.*]], %rdi
; CHECK-NEXT: jmp __asan_report_store8@PLT ; CHECK-NEXT: jmp __asan_report_store8@GOT
; CHECK: .type __asan_check_store16_rn[[RN16]],@function ; CHECK: .type __asan_check_store16_rn[[RN16]],@function
; CHECK-NEXT: .weak __asan_check_store16_rn[[RN16]] ; CHECK-NEXT: .weak __asan_check_store16_rn[[RN16]]
; CHECK-NEXT: .hidden __asan_check_store16_rn[[RN16]] ; CHECK-NEXT: .hidden __asan_check_store16_rn[[RN16]]
; CHECK-NEXT: __asan_check_store16_rn[[RN16]]: ; CHECK-NEXT: __asan_check_store16_rn[[RN16]]:
; CHECK-NEXT: movq [[REG:.*]], %r8 ; CHECK-NEXT: movq [[REG:.*]], %r8
; CHECK-NEXT: shrq $3, %r8 ; CHECK-NEXT: shrq $3, %r8
; CHECK-NEXT: orq $17592186044416, %r8{{.*}} ; CHECK-NEXT: orq $17592186044416, %r8{{.*}}
; CHECK-NEXT: cmpw $0, (%r8) ; CHECK-NEXT: cmpw $0, (%r8)
; CHECK-NEXT: jne [[FAIL:.*]] ; CHECK-NEXT: jne [[FAIL:.*]]
; CHECK-NEXT: [[RET:.*]]: ; CHECK-NEXT: [[RET:.*]]:
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: [[FAIL]]: ; CHECK-NEXT: [[FAIL]]:
; CHECK-NEXT: movq [[REG:.*]], %rdi ; CHECK-NEXT: movq [[REG:.*]], %rdi
; CHECK-NEXT: jmp __asan_report_store16@PLT ; CHECK-NEXT: jmp __asan_report_store16@GOT
declare void @llvm.asan.check.memaccess(i8*, i32 immarg) declare void @llvm.asan.check.memaccess(i8*, i32 immarg)