[PowerPC][NFC] Rename P10 builtins vec_clrl, vec_clrr to vec_clr_first and vec_clr_last

[NeHuang]

Summary

This patch renames the vector clear left/right builtins vec_clrl, vec_clrr to vec_clr_first and vec_clr_last to avoid the ambiguities when dealing with endianness.

[lei]

LGTM

[amyk]

We wanted vec_clr_first to translate to vclrrb for LE, and to vclrlb for BE, and the opposite mapping for vec_clr_last, so I think this LGTM.

clang/lib/Headers/altivec.h

_Generic((__a), vector unsigned char                                         \
              vector unsigned short                                             \
            : __builtin_vsx_xxgenpcvhm((__a), (int)(__imm)),                    \
              vector unsigned int                                               \
            : __builtin_vsx_xxgenpcvwm((__a), (int)(__imm)),                    \
              vector unsigned long long                                         \
            : __builtin_vsx_xxgenpcvdm((__a), (int)(__imm)))
 #endif /* __VSX__ */
 
-/* vec_clrl */
+/* vec_clr_first */
 
 static __inline__ vector signed char __ATTRS_o_ai
-vec_clrl(vector signed char __a, unsigned int __n) {
+vec_clr_first(vector signed char __a, unsigned int __n) {
 #ifdef __LITTLE_ENDIAN__
   return __builtin_altivec_vclrrb(__a, __n);
 #else
   return __builtin_altivec_vclrlb( __a, __n);
 #endif
 }
 
 static __inline__ vector unsigned char __ATTRS_o_ai
-vec_clrl(vector unsigned char __a, unsigned int __n) {
+vec_clr_first(vector unsigned char __a, unsigned int __n) {
 #ifdef __LITTLE_ENDIAN__
   return __builtin_altivec_vclrrb((vector signed char)__a, __n);
 #else
   return __builtin_altivec_vclrlb((vector signed char)__a, __n);
 #endif
 }
 
-/* vec_clrr */
+/* vec_clr_last */
 
 static __inline__ vector signed char __ATTRS_o_ai
-vec_clrr(vector signed char __a, unsigned int __n) {
+vec_clr_last(vector signed char __a, unsigned int __n) {
 #ifdef __LITTLE_ENDIAN__
   return __builtin_altivec_vclrlb(__a, __n);
 #else
   return __builtin_altivec_vclrrb( __a, __n);
 #endif
 }
 
 static __inline__ vector unsigned char __ATTRS_o_ai
-vec_clrr(vector unsigned char __a, unsigned int __n) {
+vec_clr_last(vector unsigned char __a, unsigned int __n) {
 #ifdef __LITTLE_ENDIAN__
   return __builtin_altivec_vclrlb((vector signed char)__a, __n);
 #else
   return __builtin_altivec_vclrrb((vector signed char)__a, __n);
 #endif
 }
 
 /* vec_cntlzm */

clang/test/CodeGen/builtins-ppc-p10vector.c

 }
 
 vector unsigned long long test_xxgenpcvdm(void) {
   // CHECK: @llvm.ppc.vsx.xxgenpcvdm(<2 x i64> %{{.+}}, i32
   // CHECK-NEXT: ret <2 x i64>
   return vec_genpcvm(vulla, 0);
 }
 
-vector signed char test_vec_vclrl_sc(void) {
+vector signed char test_vec_clr_first_sc(void) {
   // CHECK-BE: @llvm.ppc.altivec.vclrlb(<16 x i8>
   // CHECK-BE-NEXT: ret <16 x i8>
   // CHECK-LE: @llvm.ppc.altivec.vclrrb(<16 x i8>
   // CHECK-LE-NEXT: ret <16 x i8>
-  return vec_clrl(vsca, uia);
+  return vec_clr_first(vsca, uia);
 }
 
-vector unsigned char test_vec_clrl_uc(void) {
+vector unsigned char test_vec_clr_first_uc(void) {
   // CHECK-BE: @llvm.ppc.altivec.vclrlb(<16 x i8>
   // CHECK-BE-NEXT: ret <16 x i8>
   // CHECK-LE: @llvm.ppc.altivec.vclrrb(<16 x i8>
   // CHECK-LE-NEXT: ret <16 x i8>
-  return vec_clrl(vuca, uia);
+  return vec_clr_first(vuca, uia);
 }
 
-vector signed char test_vec_vclrr_sc(void) {
+vector signed char test_vec_clr_last_sc(void) {
   // CHECK-BE: @llvm.ppc.altivec.vclrrb(<16 x i8>
   // CHECK-BE-NEXT: ret <16 x i8>
   // CHECK-LE: @llvm.ppc.altivec.vclrlb(<16 x i8>
   // CHECK-LE-NEXT: ret <16 x i8>
-  return vec_clrr(vsca, uia);
+  return vec_clr_last(vsca, uia);
 }
 
-vector unsigned char test_vec_clrr_uc(void) {
+vector unsigned char test_vec_clr_last_uc(void) {
   // CHECK-BE: @llvm.ppc.altivec.vclrrb(<16 x i8>
   // CHECK-BE-NEXT: ret <16 x i8>
   // CHECK-LE: @llvm.ppc.altivec.vclrlb(<16 x i8>
   // CHECK-LE-NEXT: ret <16 x i8>
-  return vec_clrr(vuca, uia);
+  return vec_clr_last(vuca, uia);
 }
 
 vector unsigned long long test_vclzdm(void) {
   // CHECK: @llvm.ppc.altivec.vclzdm(<2 x i64>
   // CHECK-NEXT: ret <2 x i64>
   return vec_cntlzm(vulla, vullb);
 }