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Differential D108612

[X86] Building constant vector which element type is half will cause assertion fail.
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Authored by LiuChen3 on Aug 23 2021, 11:03 PM.

Details

Reviewers
pengfei
craig.topper
LuoYuanke
Commits
rGb7795eb6469c: [X86] Building constant vector which element type is half will cause assertion…
Summary

Fix assertion fail when building con constant vector which element type is half.

Diff Detail

Event Timeline

LiuChen3 created this revision.Aug 23 2021, 11:03 PM
Herald added subscribers: pengfei, hiraditya. · View Herald TranscriptAug 23 2021, 11:03 PM
LiuChen3 requested review of this revision.Aug 23 2021, 11:03 PM
Herald added a project: Restricted Project. · View Herald TranscriptAug 23 2021, 11:03 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
LiuChen3 added reviewers: pengfei, craig.topper, LuoYuanke.Aug 23 2021, 11:05 PM
pengfei added inline comments.Aug 23 2021, 11:11 PM
llvm/lib/Target/X86/X86ISelLowering.cpp
9009

Add parentheses to align the format.

llvm/test/CodeGen/X86/build_fp16_constant_vector.ll
2

Maybe we don't need it?

3

ditto.

LiuChen3 updated this revision to Diff 368281.Aug 23 2021, 11:15 PM

Address pengfei's comments.

pengfei accepted this revision.Aug 23 2021, 11:25 PM

LGTM. Thanks Chen.

This revision is now accepted and ready to land.Aug 23 2021, 11:25 PM
This revision was landed with ongoing or failed builds.Aug 23 2021, 11:35 PM
Closed by commit rGb7795eb6469c: [X86] Building constant vector which element type is half will cause assertion… (authored by LiuChen3). · Explain Why
This revision was automatically updated to reflect the committed changes.
LiuChen3 added a commit: rGb7795eb6469c: [X86] Building constant vector which element type is half will cause assertion….
Harbormaster completed remote builds in B120920: Diff 368281.Aug 23 2021, 11:49 PM

Revision Contents

PathSize
llvm/
lib/
Target/
X86/
4 lines
test/
CodeGen/
X86/
30 lines

Diff 368279

llvm/lib/Target/X86/X86ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 9,000 Lines • ▼ Show 20 Linesstatic Constant *getConstantVector(MVT VT, const APInt &SplatValue,
unsigned ScalarSize = VT.getScalarSizeInBits(); unsigned ScalarSize = VT.getScalarSizeInBits();
unsigned NumElm = SplatBitSize / ScalarSize; unsigned NumElm = SplatBitSize / ScalarSize;
SmallVector<Constant *, 32> ConstantVec; SmallVector<Constant *, 32> ConstantVec;
for (unsigned i = 0; i < NumElm; i++) { for (unsigned i = 0; i < NumElm; i++) {
APInt Val = SplatValue.extractBits(ScalarSize, ScalarSize * i); APInt Val = SplatValue.extractBits(ScalarSize, ScalarSize * i);
Constant *Const; Constant *Const;
if (VT.isFloatingPoint()) { if (VT.isFloatingPoint()) {
if (ScalarSize == 32) { if (ScalarSize == 16)
pengfeiUnsubmitted
Not Done
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Add parentheses to align the format.

pengfei: Add parentheses to align the format.
Const = ConstantFP::get(C, APFloat(APFloat::IEEEhalf(), Val));
else if (ScalarSize == 32) {
Const = ConstantFP::get(C, APFloat(APFloat::IEEEsingle(), Val)); Const = ConstantFP::get(C, APFloat(APFloat::IEEEsingle(), Val));
} else { } else {
assert(ScalarSize == 64 && "Unsupported floating point scalar size"); assert(ScalarSize == 64 && "Unsupported floating point scalar size");
Const = ConstantFP::get(C, APFloat(APFloat::IEEEdouble(), Val)); Const = ConstantFP::get(C, APFloat(APFloat::IEEEdouble(), Val));
} }
} else } else
Const = Constant::getIntegerValue(Type::getIntNTy(C, ScalarSize), Val); Const = Constant::getIntegerValue(Type::getIntNTy(C, ScalarSize), Val);
ConstantVec.push_back(Const); ConstantVec.push_back(Const);
▲ Show 20 Lines • Show All 32,759 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/build_fp16_constant_vector.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 | FileCheck %s --check-prefixes=CHECK-32
pengfeiUnsubmitted
Not Done
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Maybe we don't need it?

pengfei: Maybe we don't need it?
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 | FileCheck %s --check-prefixes=CHECK-64
pengfeiUnsubmitted
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ditto.

pengfei: ditto.
define dso_local <32 x half> @foo(<32 x half> %a, <32 x half> %b, <32 x half> %c) {
; CHECK-32-LABEL: foo:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: vbroadcastf64x4 {{.*#+}} zmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]
; CHECK-32-NEXT: # zmm3 = mem[0,1,2,3,0,1,2,3]
; CHECK-32-NEXT: vfmadd213ph %zmm2, %zmm3, %zmm0
; CHECK-32-NEXT: vfmadd213ph %zmm2, %zmm3, %zmm1
; CHECK-32-NEXT: vaddph %zmm1, %zmm0, %zmm0
; CHECK-32-NEXT: retl
;
; CHECK-64-LABEL: foo:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: vbroadcastf64x4 {{.*#+}} zmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0,-1.0E+0]
; CHECK-64-NEXT: # zmm3 = mem[0,1,2,3,0,1,2,3]
; CHECK-64-NEXT: vfmadd213ph %zmm2, %zmm3, %zmm0
; CHECK-64-NEXT: vfmadd213ph %zmm2, %zmm3, %zmm1
; CHECK-64-NEXT: vaddph %zmm1, %zmm0, %zmm0
; CHECK-64-NEXT: retq
entry:
%0 = tail call fast <32 x half> @llvm.fma.v32f16(<32 x half> %a, <32 x half> <half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00>, <32 x half> %c)
%1 = tail call fast <32 x half> @llvm.fma.v32f16(<32 x half> %b, <32 x half> <half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xH3C00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00, half 0xHBC00>, <32 x half> %c)
%2 = fadd <32 x half> %0, %1
ret <32 x half> %2
}
declare <32 x half> @llvm.fma.v32f16(<32 x half>, <32 x half>, <32 x half>)