[NFC] X86: Annotate sibcall test

[urnathan]

Summary

This annotates the current X86/sibcall.ll testcase about why a particular test can be tailcalled or not tailcalled. I've added QOI markers to ones that could be tailcalled, if we were sufficiently smart (eg as pr51000 points out). I also reordered the lit check lines so they are no longer between the function header and the body -- that makes it much easier to follow the llvm ir.

I figured this would be a good start before progressing with D105807 (thanks for the feedback on that)

[efriedma]

I'd prefer to structure the comments in the following form, so it's clear at a glance which transforms are legal/illegal:

; Tailcall legal: caller and callee signatures match
; QOI: we don't currently emit a tailcall on i686 because arguments on stack don't match.

llvm/test/CodeGen/X86/sibcall.ll

68

The callee owns the argument space; we can rewrite it if we need to. We do in fact rewrite it if you use musttail. (Well, the IR verifier doesn't allow musttail for this specific testcase, but in general.)

Yes, making sure we perform the operations in the right order can get a bit hairy, particularly in cases involving byval.

[urnathan]

Thanks, like this?

[xbolva00]

llvm/test/CodeGen/X86/sibcall.ll

9

Looks like it was not regenerated by update_llc_test_checks.py.

[mizvekov]

llvm/test/CodeGen/X86/sibcall.ll

252

I think this one has to do with this: https://github.com/llvm/llvm-project/blob/3bf101f34cd466f103af00c764dc1cddb6eb14a6/llvm/lib/CodeGen/Analysis.cpp#L506

The block must end in a return statement or unreachable.

FIXME: Decline tailcall if it's not guaranteed and if the block ends in
an unreachable, for now. The way tailcall optimization is currently
implemented means it will add an epilogue followed by a jump. That is
not profitable. Also, if the callee is a special function (e.g.
longjmp on x86), it can end up causing miscompilation that has not
been fully understood.

The tail call is not done just because it is not a musttail and the code generated might have worse runtime cost.

So when we say we have a QOI issue, there are two issues conflated here:

• Do we know how to do it profitably purely from a instruction cost perspective?
• Can we figure out the sequence of instructions we actually need to tail call this at all?

[urnathan]

llvm/test/CodeGen/X86/sibcall.ll

9

That seems to be breaking the llvm ir apart around the lit patterns, making them hard to read. What is the rationale for doing that?

252

QOI is always a judgement call. What are you suggesting for this patch?

[mizvekov]

llvm/test/CodeGen/X86/sibcall.ll

252

If we are digging down into the reasons why the sibcall is not performed, even if we do not fully understand why, my suggestion would be to mention if there is a difference in the behavior between musttail or not.

Unless there is other test cases in the suite which already go over this.

[xbolva00]

llvm/test/CodeGen/X86/sibcall.ll

9

Well.. it is a common standard in the LLVM project to make test updates easier for future development.

“Hard to read” is subjective, LLVM devs are familiar with this style of tests.

llvm/test/CodeGen/X86/sibcall.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs < %s -mtriple=i686-linux   -mcpu=core2 -mattr=+sse2 | FileCheck %s --check-prefix=X86
 ; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-linux -mcpu=core2 -mattr=+sse2 | FileCheck %s --check-prefix=X64
 ; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-linux-gnux32 -mcpu=core2 -mattr=+sse2  | FileCheck %s --check-prefix=X32
+; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-win64 -mcpu=core2 -mattr=+sse2 | FileCheck %s --check-prefix=X64
 
+; Tailcall legal: Incomming arg is discarded (and maybe popped by caller)
 define dso_local void @t1(i32 %x) nounwind ssp {
+  tail call void @foo() nounwind
+  ret void
+}
 ; X86-LABEL: t1:
 ; X86:       # %bb.0:
 ; X86-NEXT:    jmp foo # TAILCALL
 ;
 ; X64-LABEL: t1:
 ; X64:       # %bb.0:
 ; X64-NEXT:    jmp foo # TAILCALL
 ;
 ; X32-LABEL: t1:
 ; X32:       # %bb.0:
 ; X32-NEXT:    jmp foo # TAILCALL
-  tail call void @foo() nounwind
-  ret void
-}
 
 declare dso_local void @foo()
 
+; Tailcall legal: Caller and callee return nothing
 define dso_local void @t2() nounwind ssp {
+  %t0 = tail call i32 @foo2() nounwind
+  ret void
+}
 ; X86-LABEL: t2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    jmp foo2 # TAILCALL
 ;
 ; X64-LABEL: t2:
 ; X64:       # %bb.0:
 ; X64-NEXT:    jmp foo2 # TAILCALL
 ;
 ; X32-LABEL: t2:
 ; X32:       # %bb.0:
 ; X32-NEXT:    jmp foo2 # TAILCALL
-  %t0 = tail call i32 @foo2() nounwind
-  ret void
-}
 
 declare dso_local i32 @foo2()
 
+; Tailcall legal: callee's result is discarded
 define dso_local void @t3() nounwind ssp {
+  %t0 = tail call i32 @foo3() nounwind
+  ret void
+}
 ; X86-LABEL: t3:
 ; X86:       # %bb.0:
 ; X86-NEXT:    jmp foo3 # TAILCALL
 ;
 ; X64-LABEL: t3:
 ; X64:       # %bb.0:
 ; X64-NEXT:    jmp foo3 # TAILCALL
 ;
 ; X32-LABEL: t3:
 ; X32:       # %bb.0:
 ; X32-NEXT:    jmp foo3 # TAILCALL
-  %t0 = tail call i32 @foo3() nounwind
-  ret void
-}
 
 declare dso_local i32 @foo3()
 
+; Tailcall legal: nothing special about function pointers
+; QOI: We fail on i686, which passes args on the stack.  We don't
+; consider rewriting that.  (The ABI might specify that the incoming
+; args are not callee-clobberable? And such rewriting can get hairy
+; due to RAW conflicts)
 define dso_local void @t4(void (i32)* nocapture %x) nounwind ssp {
+  tail call void %x(i32 0) nounwind
+  ret void
+}
 ; X86-LABEL: t4:
 ; X86:       # %bb.0:
 ; X86-NEXT:    subl $12, %esp
 ; X86-NEXT:    movl $0, (%esp)
 ; X86-NEXT:    calll *{{[0-9]+}}(%esp)
 ; X86-NEXT:    addl $12, %esp
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t4:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movq %rdi, %rax
 ; X64-NEXT:    xorl %edi, %edi
 ; X64-NEXT:    jmpq *%rax # TAILCALL
 ;
 ; X32-LABEL: t4:
 ; X32:       # %bb.0:
 ; X32-NEXT:    movq %rdi, %rax
 ; X32-NEXT:    xorl %edi, %edi
 ; X32-NEXT:    jmpq *%rax # TAILCALL
-  tail call void %x(i32 0) nounwind
-  ret void
-}
 
+; Tailcall legal: nothing special about function pointers
 define dso_local void @t5(void ()* nocapture %x) nounwind ssp {
+  tail call void %x() nounwind
+  ret void
+}
 ; X86-LABEL: t5:
 ; X86:       # %bb.0:
 ; X86-NEXT:    jmpl *{{[0-9]+}}(%esp) # TAILCALL
 ;
 ; X64-LABEL: t5:
 ; X64:       # %bb.0:
 ; X64-NEXT:    jmpq *%rdi # TAILCALL
 ;
 ; X32-LABEL: t5:
 ; X32:       # %bb.0:
 ; X32-NEXT:    jmpq *%rdi # TAILCALL
+
+; Tailcall legal: basically the same test as t5, except pass the
+; function pointer on the stack for all ABI tested.
+define dso_local void @t5_x64(i32, i32, i32, i32, i32, i32, void ()* nocapture %x) nounwind ssp {
   tail call void %x() nounwind
   ret void
 }
-
-; Basically the same test as t5, except pass the function pointer on the stack
-; for x86_64.
-
-define dso_local void @t5_x64(i32, i32, i32, i32, i32, i32, void ()* nocapture %x) nounwind ssp {
 ; X86-LABEL: t5_x64:
 ; X86:       # %bb.0:
 ; X86-NEXT:    jmpl *{{[0-9]+}}(%esp) # TAILCALL
 ;
 ; X64-LABEL: t5_x64:
 ; X64:       # %bb.0:
 ; X64-NEXT:    jmpq *{{[0-9]+}}(%rsp) # TAILCALL
 ;
 ; X32-LABEL: t5_x64:
 ; X32:       # %bb.0:
 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    jmpq *%rax # TAILCALL
-  tail call void %x() nounwind
-  ret void
-}
-
 
+; Tailcall legal: Both @bar and @t6 can be tailcalled.
+; QOI we don't tailcall @t6 when args are on the stack for the same
+; reason as t4.
 define dso_local i32 @t6(i32 %x) nounwind ssp {
+  %t0 = icmp slt i32 %x, 10
+  br i1 %t0, label %bb, label %bb1
+
+bb:
+  %t1 = add nsw i32 %x, -1
+  %t2 = tail call i32 @t6(i32 %t1) nounwind ssp
+  ret i32 %t2
+
+bb1:
+  %t3 = tail call i32 @bar(i32 %x) nounwind
+  ret i32 %t3
+}
 ; X86-LABEL: t6:
 ; X86:       # %bb.0:
 ; X86-NEXT:    subl $12, %esp
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    cmpl $9, %eax
 ; X86-NEXT:    jg .LBB6_2
 ; X86-NEXT:  # %bb.1: # %bb
 ; X86-NEXT:    decl %eax

 ; X32:       # %bb.0:
 ; X32-NEXT:    cmpl $9, %edi
 ; X32-NEXT:    jg .LBB6_2
 ; X32-NEXT:  # %bb.1: # %bb
 ; X32-NEXT:    decl %edi
 ; X32-NEXT:    jmp t6 # TAILCALL
 ; X32-NEXT:  .LBB6_2: # %bb1
 ; X32-NEXT:    jmp bar # TAILCALL
-  %t0 = icmp slt i32 %x, 10
-  br i1 %t0, label %bb, label %bb1
-
-bb:
-  %t1 = add nsw i32 %x, -1
-  %t2 = tail call i32 @t6(i32 %t1) nounwind ssp
-  ret i32 %t2
-
-bb1:
-  %t3 = tail call i32 @bar(i32 %x) nounwind
-  ret i32 %t3
-}
 
 declare dso_local i32 @bar(i32)
 
+;; Tailcall legal: we're just a forwarding function.
 define dso_local i32 @t7(i32 %a, i32 %b, i32 %c) nounwind ssp {
+  %t0 = tail call i32 @bar2(i32 %a, i32 %b, i32 %c) nounwind
+  ret i32 %t0
+}
 ; X86-LABEL: t7:
 ; X86:       # %bb.0:
 ; X86-NEXT:    jmp bar2 # TAILCALL
 ;
 ; X64-LABEL: t7:
 ; X64:       # %bb.0:
 ; X64-NEXT:    jmp bar2 # TAILCALL
 ;
 ; X32-LABEL: t7:
 ; X32:       # %bb.0:
 ; X32-NEXT:    jmp bar2 # TAILCALL
-  %t0 = tail call i32 @bar2(i32 %a, i32 %b, i32 %c) nounwind
-  ret i32 %t0
-}
 
 declare dso_local i32 @bar2(i32, i32, i32)
 
+; Tailcall legal: still forwarding.
 define signext i16 @t8() nounwind ssp {
+entry:
+  %0 = tail call signext i16 @bar3() nounwind      ; <i16> [#uses=1]
+  ret i16 %0
+}
 ; X86-LABEL: t8:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    jmp bar3 # TAILCALL
 ;
 ; X64-LABEL: t8:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    jmp bar3 # TAILCALL
 ;
 ; X32-LABEL: t8:
 ; X32:       # %bb.0: # %entry
 ; X32-NEXT:    jmp bar3 # TAILCALL
-entry:
-  %0 = tail call signext i16 @bar3() nounwind      ; <i16> [#uses=1]
-  ret i16 %0
-}
 
 declare dso_local signext i16 @bar3()
 
+; Tailcall legal: Caller and callee agree on sign extension.
+; QOI: As with t4, fail to overwrite stack-based arguments
 define signext i16 @t9(i32 (i32)* nocapture %x) nounwind ssp {
+entry:
+  %0 = bitcast i32 (i32)* %x to i16 (i32)*
+  %1 = tail call signext i16 %0(i32 0) nounwind
+  ret i16 %1
+}
 ; X86-LABEL: t9:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    subl $12, %esp
 ; X86-NEXT:    movl $0, (%esp)
 ; X86-NEXT:    calll *{{[0-9]+}}(%esp)
 ; X86-NEXT:    addl $12, %esp
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t9:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    movq %rdi, %rax
 ; X64-NEXT:    xorl %edi, %edi
 ; X64-NEXT:    jmpq *%rax # TAILCALL
 ;
 ; X32-LABEL: t9:
 ; X32:       # %bb.0: # %entry
 ; X32-NEXT:    movq %rdi, %rax
 ; X32-NEXT:    xorl %edi, %edi
 ; X32-NEXT:    jmpq *%rax # TAILCALL
-entry:
-  %0 = bitcast i32 (i32)* %x to i16 (i32)*
-  %1 = tail call signext i16 %0(i32 0) nounwind
-  ret i16 %1
-}
 
+; Tailcall legal: Just forwarding
+; QOI: We choose not to tailcall this: https://github.com/llvm/llvm-project/blob/3bf101f34cd466f103af00c764dc1cddb6eb14a6/llvm/lib/CodeGen/Analysis.cpp#L506
 define dso_local void @t10() nounwind ssp {
+entry:
+  %0 = tail call i32 @foo4() noreturn nounwind
+  unreachable
+}
 ; X86-LABEL: t10:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    subl $12, %esp
 ; X86-NEXT:    calll foo4
 ;
 ; X64-LABEL: t10:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    pushq %rax
 ; X64-NEXT:    callq foo4
 ;
 ; X32-LABEL: t10:
 ; X32:       # %bb.0: # %entry
 ; X32-NEXT:    pushq %rax
 ; X32-NEXT:    callq foo4
-entry:
-  %0 = tail call i32 @foo4() noreturn nounwind
-  unreachable
-}
 
 declare dso_local i32 @foo4()
 
-; In 32-bit mode, it's emitting a bunch of dead loads that are not being
-; eliminated currently.
-
+; Tailcall legal: we're a conditional forwarding function.
 define dso_local i32 @t11(i32 %x, i32 %y, i32 %z.0, i32 %z.1, i32 %z.2) nounwind ssp {
+entry:
+  %0 = icmp eq i32 %x, 0
+  br i1 %0, label %bb6, label %bb
+
+bb:
+  %1 = tail call i32 @foo5(i32 %x, i32 %y, i32 %z.0, i32 %z.1, i32 %z.2) nounwind
+  ret i32 %1
+
+bb6:
+  ret i32 0
+}
 ; X86-LABEL: t11:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
 ; X86-NEXT:    je .LBB11_1
 ; X86-NEXT:  # %bb.2: # %bb
 ; X86-NEXT:    jmp foo5 # TAILCALL
 ; X86-NEXT:  .LBB11_1: # %bb6
 ; X86-NEXT:    xorl %eax, %eax

 ; X32:       # %bb.0: # %entry
 ; X32-NEXT:    testl %edi, %edi
 ; X32-NEXT:    je .LBB11_1
 ; X32-NEXT:  # %bb.2: # %bb
 ; X32-NEXT:    jmp foo5 # TAILCALL
 ; X32-NEXT:  .LBB11_1: # %bb6
 ; X32-NEXT:    xorl %eax, %eax
 ; X32-NEXT:    retq
+
+declare dso_local i32 @foo5(i32, i32, i32, i32, i32)
+
+%struct.t = type { i32, i32, i32, i32, i32 }
+
+; Tailcall legal: still a conditional forwarding function.
+define dso_local i32 @t12(i32 %x, i32 %y, %struct.t* byval(%struct.t) align 4 %z) nounwind ssp {
 entry:
   %0 = icmp eq i32 %x, 0
-  br i1 %0, label %bb6, label %bb
+  br i1 %0, label %bb2, label %bb
 
 bb:
-  %1 = tail call i32 @foo5(i32 %x, i32 %y, i32 %z.0, i32 %z.1, i32 %z.2) nounwind
+  %1 = tail call i32 @foo6(i32 %x, i32 %y, %struct.t* byval(%struct.t) align 4 %z) nounwind
   ret i32 %1
 
-bb6:
+bb2:
   ret i32 0
 }
-
-declare dso_local i32 @foo5(i32, i32, i32, i32, i32)
-
-%struct.t = type { i32, i32, i32, i32, i32 }
-
-define dso_local i32 @t12(i32 %x, i32 %y, %struct.t* byval(%struct.t) align 4 %z) nounwind ssp {
 ; X86-LABEL: t12:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
 ; X86-NEXT:    je .LBB12_1
 ; X86-NEXT:  # %bb.2: # %bb
 ; X86-NEXT:    jmp foo6 # TAILCALL
 ; X86-NEXT:  .LBB12_1: # %bb2
 ; X86-NEXT:    xorl %eax, %eax

 ; X32:       # %bb.0: # %entry
 ; X32-NEXT:    testl %edi, %edi
 ; X32-NEXT:    je .LBB12_1
 ; X32-NEXT:  # %bb.2: # %bb
 ; X32-NEXT:    jmp foo6 # TAILCALL
 ; X32-NEXT:  .LBB12_1: # %bb2
 ; X32-NEXT:    xorl %eax, %eax
 ; X32-NEXT:    retq
-entry:
-  %0 = icmp eq i32 %x, 0
-  br i1 %0, label %bb2, label %bb
-
-bb:
-  %1 = tail call i32 @foo6(i32 %x, i32 %y, %struct.t* byval(%struct.t) align 4 %z) nounwind
-  ret i32 %1
-
-bb2:
-  ret i32 0
-}
 
 declare dso_local i32 @foo6(i32, i32, %struct.t* byval(%struct.t) align 4)
 
 ; rdar://r7717598
 %struct.ns = type { i32, i32 }
 %struct.cp = type { float, float, float, float, float }
 
+; Tailcall not possible: need to copy incoming struct to stack-based
+; outgoing.
 define %struct.ns* @t13(%struct.cp* %yy) nounwind ssp {
+entry:
+  %0 = tail call fastcc %struct.ns* @foo7(%struct.cp* byval(%struct.cp) align 4 %yy, i8 signext 0) nounwind
+  ret %struct.ns* %0
+}
 ; X86-LABEL: t13:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    subl $28, %esp
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl 16(%eax), %ecx
 ; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
 ; X86-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
 ; X86-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero

 ; X32-NEXT:    pushq %rax
 ; X32-NEXT:    pushq %rdx
 ; X32-NEXT:    pushq %rcx
 ; X32-NEXT:    callq foo7
 ; X32-NEXT:    addl $32, %esp
 ; X32-NEXT:    movl %eax, %eax
 ; X32-NEXT:    popq %rcx
 ; X32-NEXT:    retq
-entry:
-  %0 = tail call fastcc %struct.ns* @foo7(%struct.cp* byval(%struct.cp) align 4 %yy, i8 signext 0) nounwind
-  ret %struct.ns* %0
-}
 
+; Tailcall legal:
 ; rdar://6195379
-; llvm can't do sibcall for this in 32-bit mode (yet).
+; QOI: llvm can't do sibcall for this in 32-bit mode (yet). (probably
+; same as t4)
+
 declare dso_local fastcc %struct.ns* @foo7(%struct.cp* byval(%struct.cp) align 4, i8 signext) nounwind ssp
 
 %struct.__block_descriptor = type { i64, i64 }
 %struct.__block_descriptor_withcopydispose = type { i64, i64, i8*, i8* }
 %struct.__block_literal_1 = type { i8*, i32, i32, i8*, %struct.__block_descriptor* }
 %struct.__block_literal_2 = type { i8*, i32, i32, i8*, %struct.__block_descriptor_withcopydispose*, void ()* }
 
 define dso_local void @t14(%struct.__block_literal_2* nocapture %.block_descriptor) nounwind ssp {
+entry:
+  %0 = getelementptr inbounds %struct.__block_literal_2, %struct.__block_literal_2* %.block_descriptor, i64 0, i32 5 ; <void ()**> [#uses=1]
+  %1 = load void ()*, void ()** %0, align 8                 ; <void ()*> [#uses=2]
+  %2 = bitcast void ()* %1 to %struct.__block_literal_1* ; <%struct.__block_literal_1*> [#uses=1]
+  %3 = getelementptr inbounds %struct.__block_literal_1, %struct.__block_literal_1* %2, i64 0, i32 3 ; <i8**> [#uses=1]
+  %4 = load i8*, i8** %3, align 8                      ; <i8*> [#uses=1]
+  %5 = bitcast i8* %4 to void (i8*)*              ; <void (i8*)*> [#uses=1]
+  %6 = bitcast void ()* %1 to i8*                 ; <i8*> [#uses=1]
+  tail call void %5(i8* %6) nounwind
+  ret void
+}
 ; X86-LABEL: t14:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    subl $12, %esp
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl 20(%eax), %eax
 ; X86-NEXT:    movl %eax, (%esp)
 ; X86-NEXT:    calll *12(%eax)
 ; X86-NEXT:    addl $12, %esp
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t14:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    movq 32(%rdi), %rdi
 ; X64-NEXT:    jmpq *16(%rdi) # TAILCALL
 ;
 ; X32-LABEL: t14:
 ; X32:       # %bb.0: # %entry
 ; X32-NEXT:    movl 20(%edi), %edi
 ; X32-NEXT:    movl 12(%edi), %eax
 ; X32-NEXT:    jmpq *%rax # TAILCALL
-entry:
-  %0 = getelementptr inbounds %struct.__block_literal_2, %struct.__block_literal_2* %.block_descriptor, i64 0, i32 5 ; <void ()**> [#uses=1]
-  %1 = load void ()*, void ()** %0, align 8                 ; <void ()*> [#uses=2]
-  %2 = bitcast void ()* %1 to %struct.__block_literal_1* ; <%struct.__block_literal_1*> [#uses=1]
-  %3 = getelementptr inbounds %struct.__block_literal_1, %struct.__block_literal_1* %2, i64 0, i32 3 ; <i8**> [#uses=1]
-  %4 = load i8*, i8** %3, align 8                      ; <i8*> [#uses=1]
-  %5 = bitcast i8* %4 to void (i8*)*              ; <void (i8*)*> [#uses=1]
-  %6 = bitcast void ()* %1 to i8*                 ; <i8*> [#uses=1]
-  tail call void %5(i8* %6) nounwind
-  ret void
-}
 
 ; rdar://7726868
 %struct.foo = type { [4 x i32] }
 
+; Tailcall legal: Forwarding our sret to an sret callee
+; QOI: we don't tailcall due to the sret.
 define dso_local void @t15(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind  {
+  tail call fastcc void @f(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind
+  ret void
+}
 ; X86-LABEL: t15:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    subl $8, %esp
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
 ; X86-NEXT:    movl %esi, %ecx
 ; X86-NEXT:    calll f
 ; X86-NEXT:    movl %esi, %eax

 ; X32-LABEL: t15:
 ; X32:       # %bb.0:
 ; X32-NEXT:    pushq %rbx
 ; X32-NEXT:    movq %rdi, %rbx
 ; X32-NEXT:    callq f
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @f(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind
-  ret void
-}
 
 declare dso_local void @f(%struct.foo* noalias sret(%struct.foo)) nounwind
 
+; Tailcall conditionally legal: Forwarding from void and disregard the
+; callee's result. Except with i686/387 where we need to drop the
+; disregarded result.
 define dso_local void @t16() nounwind ssp {
+entry:
+  %0 = tail call double @bar4() nounwind
+  ret void
+}
 ; X86-LABEL: t16:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    subl $12, %esp
 ; X86-NEXT:    calll bar4
 ; X86-NEXT:    fstp %st(0)
 ; X86-NEXT:    addl $12, %esp
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t16:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    jmp bar4 # TAILCALL
 ;
 ; X32-LABEL: t16:
 ; X32:       # %bb.0: # %entry
 ; X32-NEXT:    jmp bar4 # TAILCALL
-entry:
-  %0 = tail call double @bar4() nounwind
-  ret void
-}
 
 declare dso_local double @bar4()
 
+; Tailcall legal: variadic args all in registers
 ; rdar://6283267
 define dso_local void @t17() nounwind ssp {
+entry:
+  tail call void (...) @bar5() nounwind
+  ret void
+}
 ; X86-LABEL: t17:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    jmp bar5 # TAILCALL
 ;
 ; X64-LABEL: t17:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    xorl %eax, %eax
 ; X64-NEXT:    jmp bar5 # TAILCALL
 ;
 ; X32-LABEL: t17:
 ; X32:       # %bb.0: # %entry
 ; X32-NEXT:    xorl %eax, %eax
 ; X32-NEXT:    jmp bar5 # TAILCALL
-entry:
-  tail call void (...) @bar5() nounwind
-  ret void
-}
 
 declare dso_local void @bar5(...)
 
+; Tailcall conditionally legal: Same as t16, applied to t17.
 ; rdar://7774847
 define dso_local void @t18() nounwind ssp {
+entry:
+  %0 = tail call double (...) @bar6() nounwind
+  ret void
+}
 ; X86-LABEL: t18:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    subl $12, %esp
 ; X86-NEXT:    calll bar6
 ; X86-NEXT:    fstp %st(0)
 ; X86-NEXT:    addl $12, %esp
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t18:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    xorl %eax, %eax
 ; X64-NEXT:    jmp bar6 # TAILCALL
 ;
 ; X32-LABEL: t18:
 ; X32:       # %bb.0: # %entry
 ; X32-NEXT:    xorl %eax, %eax
 ; X32-NEXT:    jmp bar6 # TAILCALL
-entry:
-  %0 = tail call double (...) @bar6() nounwind
-  ret void
-}
 
 declare dso_local double @bar6(...)
 
+; Tailcall disallowed: we realign the stack.
 define dso_local void @t19() alignstack(32) nounwind {
+entry:
+  tail call void @foo() nounwind
+  ret void
+}
 ; X86-LABEL: t19:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    pushl %ebp
 ; X86-NEXT:    movl %esp, %ebp
 ; X86-NEXT:    andl $-32, %esp
 ; X86-NEXT:    subl $32, %esp
 ; X86-NEXT:    calll foo
 ; X86-NEXT:    movl %ebp, %esp

 ; X32-NEXT:    pushq %rbp
 ; X32-NEXT:    movl %esp, %ebp
 ; X32-NEXT:    andl $-32, %esp
 ; X32-NEXT:    subl $32, %esp
 ; X32-NEXT:    callq foo
 ; X32-NEXT:    movl %ebp, %esp
 ; X32-NEXT:    popq %rbp
 ; X32-NEXT:    retq
-entry:
-  tail call void @foo() nounwind
-  ret void
-}
 
 ; If caller / callee calling convention mismatch then check if the return
 ; values are returned in the same registers.
 ; rdar://7874780
 
+; Tailcall conditionally legal: The return value might be done
+; differently across Calling Conventions. Differs on fastcc<->i686/387
 define dso_local double @t20(double %x) nounwind {
+entry:
+  %0 = tail call fastcc double @foo20(double %x) nounwind
+  ret double %0
+}
 ; X86-LABEL: t20:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    subl $12, %esp
 ; X86-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
 ; X86-NEXT:    calll foo20
 ; X86-NEXT:    movsd %xmm0, (%esp)
 ; X86-NEXT:    fldl (%esp)
 ; X86-NEXT:    addl $12, %esp
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t20:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    jmp foo20 # TAILCALL
 ;
 ; X32-LABEL: t20:
 ; X32:       # %bb.0: # %entry
 ; X32-NEXT:    jmp foo20 # TAILCALL
-entry:
-  %0 = tail call fastcc double @foo20(double %x) nounwind
-  ret double %0
-}
 
 declare dso_local fastcc double @foo20(double) nounwind
 
 ; bug 28417
+; Tailcall legal: we're forwarding sret to sret
+; QOI: We fail to determine the sret argument is our sret parameter
 define fastcc void @t21_sret_to_sret(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind  {
+  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind
+  ret void
+}
 ; X86-LABEL: t21_sret_to_sret:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    subl $8, %esp
 ; X86-NEXT:    movl %ecx, %esi
 ; X86-NEXT:    calll t21_f_sret
 ; X86-NEXT:    movl %esi, %eax
 ; X86-NEXT:    addl $8, %esp

 ; X32-LABEL: t21_sret_to_sret:
 ; X32:       # %bb.0:
 ; X32-NEXT:    pushq %rbx
 ; X32-NEXT:    movq %rdi, %rbx
 ; X32-NEXT:    callq t21_f_sret
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind
-  ret void
-}
 
+; Tailcall disallowed: Passing pointer to our stack frame.
+; Note that we never initialize the sret object we're
+; returnining. That is not UB.
 define fastcc void @t21_sret_to_sret_alloca(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind  {
+  %a = alloca %struct.foo, align 8
+  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %a) nounwind
+  ret void
+}
 ; X86-LABEL: t21_sret_to_sret_alloca:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    subl $24, %esp
 ; X86-NEXT:    movl %ecx, %esi
 ; X86-NEXT:    leal {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    calll t21_f_sret
 ; X86-NEXT:    movl %esi, %eax

 ; X32-NEXT:    subl $16, %esp
 ; X32-NEXT:    movq %rdi, %rbx
 ; X32-NEXT:    movl %esp, %edi
 ; X32-NEXT:    callq t21_f_sret
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    addl $16, %esp
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  %a = alloca %struct.foo, align 8
-  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %a) nounwind
-  ret void
-}
 
+; Tailcall legal: We're just forwarding everything.
+; QOI: We fail to track sret propagation to determine callee returns that.
 define fastcc void @t21_sret_to_sret_more_args(%struct.foo* noalias sret(%struct.foo) %agg.result, i32 %a, i32 %b) nounwind  {
+  tail call fastcc void @f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result, i32 %a, i32 %b) nounwind
+  ret void
+}
 ; X86-LABEL: t21_sret_to_sret_more_args:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    subl $8, %esp
 ; X86-NEXT:    movl %ecx, %esi
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl %eax, (%esp)
 ; X86-NEXT:    calll f_sret@PLT

 ; X32-LABEL: t21_sret_to_sret_more_args:
 ; X32:       # %bb.0:
 ; X32-NEXT:    pushq %rbx
 ; X32-NEXT:    movq %rdi, %rbx
 ; X32-NEXT:    callq f_sret@PLT
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result, i32 %a, i32 %b) nounwind
-  ret void
-}
 
+; Tailcall disallowed: callee does not return our sret.
 define fastcc void @t21_sret_to_sret_second_arg_sret(%struct.foo* noalias %agg.result, %struct.foo* noalias sret(%struct.foo) %ret) nounwind  {
+  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %ret) nounwind
+  ret void
+}
 ; X86-LABEL: t21_sret_to_sret_second_arg_sret:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    subl $8, %esp
 ; X86-NEXT:    movl %edx, %esi
 ; X86-NEXT:    movl %edx, %ecx
 ; X86-NEXT:    calll t21_f_sret
 ; X86-NEXT:    movl %esi, %eax

 ; X32:       # %bb.0:
 ; X32-NEXT:    pushq %rbx
 ; X32-NEXT:    movq %rsi, %rbx
 ; X32-NEXT:    movq %rsi, %rdi
 ; X32-NEXT:    callq t21_f_sret
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %ret) nounwind
-  ret void
-}
 
+; Tailcall legal: we're just a forwarding function.
+; QOI: we fail to trace sret propagation.
 define fastcc void @t21_sret_to_sret_more_args2(%struct.foo* noalias sret(%struct.foo) %agg.result, i32 %a, i32 %b) nounwind  {
+  tail call fastcc void @f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result, i32 %b, i32 %a) nounwind
+  ret void
+}
 ; X86-LABEL: t21_sret_to_sret_more_args2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    subl $8, %esp
 ; X86-NEXT:    movl %ecx, %esi
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl %edx, (%esp)
 ; X86-NEXT:    movl %eax, %edx

 ; X32-NEXT:    movl %esi, %eax
 ; X32-NEXT:    movq %rdi, %rbx
 ; X32-NEXT:    movl %edx, %esi
 ; X32-NEXT:    movl %eax, %edx
 ; X32-NEXT:    callq f_sret@PLT
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result, i32 %b, i32 %a) nounwind
-  ret void
-}
-
 
+; Tailcall disallowed: Callee does not return our sret
 define fastcc void @t21_sret_to_sret_args_mismatch(%struct.foo* noalias sret(%struct.foo) %agg.result, %struct.foo* noalias %ret) nounwind  {
+  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %ret) nounwind
+  ret void
+}
 ; X86-LABEL: t21_sret_to_sret_args_mismatch:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    subl $8, %esp
 ; X86-NEXT:    movl %ecx, %esi
 ; X86-NEXT:    movl %edx, %ecx
 ; X86-NEXT:    calll t21_f_sret
 ; X86-NEXT:    movl %esi, %eax

 ; X32:       # %bb.0:
 ; X32-NEXT:    pushq %rbx
 ; X32-NEXT:    movq %rdi, %rbx
 ; X32-NEXT:    movq %rsi, %rdi
 ; X32-NEXT:    callq t21_f_sret
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
+
+; Tailcall disallowed: Callee doesn't return our sret
+define fastcc void @t21_sret_to_sret_args_mismatch2(%struct.foo* noalias sret(%struct.foo) %agg.result, %struct.foo* noalias %ret) nounwind  {
   tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %ret) nounwind
   ret void
 }
-
-define fastcc void @t21_sret_to_sret_args_mismatch2(%struct.foo* noalias sret(%struct.foo) %agg.result, %struct.foo* noalias %ret) nounwind  {
 ; X86-LABEL: t21_sret_to_sret_args_mismatch2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    subl $8, %esp
 ; X86-NEXT:    movl %ecx, %esi
 ; X86-NEXT:    movl %edx, %ecx
 ; X86-NEXT:    calll t21_f_sret
 ; X86-NEXT:    movl %esi, %eax

 ; X32:       # %bb.0:
 ; X32-NEXT:    pushq %rbx
 ; X32-NEXT:    movq %rdi, %rbx
 ; X32-NEXT:    movq %rsi, %rdi
 ; X32-NEXT:    callq t21_f_sret
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %ret) nounwind
-  ret void
-}
 
+; Tailcall disallowed: callee doesn't return our sret.
 define fastcc void @t21_sret_to_sret_arg_mismatch(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind  {
+  %a = call fastcc %struct.foo* @ret_struct()
+  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %a) nounwind
+  ret void
+}
 ; X86-LABEL: t21_sret_to_sret_arg_mismatch:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    subl $8, %esp
 ; X86-NEXT:    movl %ecx, %esi
 ; X86-NEXT:    calll ret_struct@PLT
 ; X86-NEXT:    movl %eax, %ecx
 ; X86-NEXT:    calll t21_f_sret

 ; X32-NEXT:    pushq %rbx
 ; X32-NEXT:    movq %rdi, %rbx
 ; X32-NEXT:    callq ret_struct@PLT
 ; X32-NEXT:    movl %eax, %edi
 ; X32-NEXT:    callq t21_f_sret
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  %a = call fastcc %struct.foo* @ret_struct()
-  tail call fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo) %a) nounwind
-  ret void
-}
 
+; Tailcall disallowed: callee fails to return our sret.
 define fastcc void @t21_sret_to_sret_structs_mismatch(%struct.foo* noalias sret(%struct.foo) %agg.result, %struct.foo* noalias %a) nounwind  {
+  %b = call fastcc %struct.foo* @ret_struct()
+  tail call fastcc void @t21_f_sret2(%struct.foo* noalias sret(%struct.foo) %a, %struct.foo* noalias %b) nounwind
+  ret void
+}
 ; X86-LABEL: t21_sret_to_sret_structs_mismatch:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    pushl %eax
 ; X86-NEXT:    movl %edx, %esi
 ; X86-NEXT:    movl %ecx, %edi
 ; X86-NEXT:    calll ret_struct@PLT

 ; X32-NEXT:    movl %eax, %esi
 ; X32-NEXT:    movq %rbx, %rdi
 ; X32-NEXT:    callq t21_f_sret2
 ; X32-NEXT:    movl %r14d, %eax
 ; X32-NEXT:    addl $8, %esp
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    popq %r14
 ; X32-NEXT:    retq
-  %b = call fastcc %struct.foo* @ret_struct()
-  tail call fastcc void @t21_f_sret2(%struct.foo* noalias sret(%struct.foo) %a, %struct.foo* noalias %b) nounwind
-  ret void
-}
 
 declare ccc %struct.foo* @ret_struct() nounwind
 
-
+; Tailcall disallowed: Callee doesn't return our sret.
 define fastcc void @t21_sret_to_non_sret(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind  {
+  tail call fastcc void @t21_f_non_sret(%struct.foo* %agg.result) nounwind
+  ret void
+}
 ; X86-LABEL: t21_sret_to_non_sret:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    subl $8, %esp
 ; X86-NEXT:    movl %ecx, %esi
 ; X86-NEXT:    calll t21_f_non_sret
 ; X86-NEXT:    movl %esi, %eax
 ; X86-NEXT:    addl $8, %esp

 ; X32-LABEL: t21_sret_to_non_sret:
 ; X32:       # %bb.0:
 ; X32-NEXT:    pushq %rbx
 ; X32-NEXT:    movq %rdi, %rbx
 ; X32-NEXT:    callq t21_f_non_sret
 ; X32-NEXT:    movl %ebx, %eax
 ; X32-NEXT:    popq %rbx
 ; X32-NEXT:    retq
-  tail call fastcc void @t21_f_non_sret(%struct.foo* %agg.result) nounwind
-  ret void
-}
-
 
+; Tailcall legal: We don't have an sret.
+; QOI: We fail to tailcall.
 define ccc void @t22_non_sret_to_sret(%struct.foo* %agg.result) nounwind  {
+  tail call ccc void @t22_f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind
+  ret void
+}
 ; X86-LABEL: t22_non_sret_to_sret:
 ; X86:       # %bb.0:
 ; X86-NEXT:    subl $12, %esp
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl %eax, (%esp)
 ; X86-NEXT:    calll t22_f_sret@PLT
 ; X86-NEXT:    addl $8, %esp
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t22_non_sret_to_sret:
 ; X64:       # %bb.0:
 ; X64-NEXT:    pushq %rax
 ; X64-NEXT:    callq t22_f_sret@PLT
 ; X64-NEXT:    popq %rax
 ; X64-NEXT:    retq
 ;
 ; X32-LABEL: t22_non_sret_to_sret:
 ; X32:       # %bb.0:
 ; X32-NEXT:    pushq %rax
 ; X32-NEXT:    callq t22_f_sret@PLT
 ; X32-NEXT:    popq %rax
 ; X32-NEXT:    retq
-  tail call ccc void @t22_f_sret(%struct.foo* noalias sret(%struct.foo) %agg.result) nounwind
-  ret void
-}
 
 declare dso_local fastcc void @t21_f_sret(%struct.foo* noalias sret(%struct.foo)) nounwind
 declare dso_local fastcc void @t21_f_sret2(%struct.foo* noalias sret(%struct.foo), %struct.foo* noalias) nounwind
 declare dso_local fastcc void @t21_f_non_sret(%struct.foo*) nounwind
 
 declare ccc void @t22_f_sret(%struct.foo* noalias sret(%struct.foo)) nounwind
 
 declare ccc void @f_sret(%struct.foo* noalias sret(%struct.foo), i32, i32) nounwind