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Differential D105424

[DAGCombiner] Pre-commit test to demonstrate mulhi const folding
ClosedPublic

Authored by dstuttard on Jul 5 2021, 3:24 AM.

Details

Reviewers
RKSimon
foad
Commits
rG4b125b23ba95: [DAGCombiner] Pre-commit test to demonstrate mulhi const folding
Summary

D103323 will fold this

Diff Detail

Event Timeline

dstuttard created this revision.Jul 5 2021, 3:24 AM
Herald added subscribers: kerbowa, nhaehnle, jvesely. · View Herald TranscriptJul 5 2021, 3:24 AM
dstuttard requested review of this revision.Jul 5 2021, 3:24 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 5 2021, 3:24 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
dstuttard added reviewers: RKSimon, foad.Jul 5 2021, 3:26 AM
dstuttard mentioned this in D103323: [DAGCombiner] Add support for mulhi const folding in DAGCombiner.Jul 5 2021, 3:27 AM
foad accepted this revision.Jul 5 2021, 3:31 AM
This revision is now accepted and ready to land.Jul 5 2021, 3:31 AM
This revision was landed with ongoing or failed builds.Jul 5 2021, 3:35 AM
Closed by commit rG4b125b23ba95: [DAGCombiner] Pre-commit test to demonstrate mulhi const folding (authored by dstuttard). · Explain Why
This revision was automatically updated to reflect the committed changes.
dstuttard added a commit: rG4b125b23ba95: [DAGCombiner] Pre-commit test to demonstrate mulhi const folding.
Harbormaster completed remote builds in B112421: Diff 356462.Jul 5 2021, 4:00 AM

Revision Contents

PathSize
llvm/
test/
CodeGen/
AMDGPU/
15 lines

Diff 356466

llvm/test/CodeGen/AMDGPU/udiv.ll

Show First 20 Lines • Show All 194 Lines • ▼ Show 20 Linesbb:
%tmp2 = getelementptr inbounds i8, i8 addrspace(1)* %arg, i64 undef %tmp2 = getelementptr inbounds i8, i8 addrspace(1)* %arg, i64 undef
%tmp3 = load i8, i8 addrspace(1)* %tmp2, align 1 %tmp3 = load i8, i8 addrspace(1)* %tmp2, align 1
%tmp4 = sext i8 %tmp3 to i32 %tmp4 = sext i8 %tmp3 to i32
%tmp5 = sdiv i32 %tmp1, %tmp4 %tmp5 = sdiv i32 %tmp1, %tmp4
%tmp6 = trunc i32 %tmp5 to i8 %tmp6 = trunc i32 %tmp5 to i8
store i8 %tmp6, i8 addrspace(1)* null, align 1 store i8 %tmp6, i8 addrspace(1)* null, align 1
ret void ret void
} }
define i64 @v_test_udiv64_mulhi_fold(i64 %arg) {
; GCN-LABEL: v_test_udiv64_mulhi_fold
; GFX1030: s_mov_b32 [[VAL1:s[0-9]+]], 0xa9000000
; GFX1030: s_brev_b32 [[VAL2:s[0-9]+]], 6
; GFX1030: s_movk_i32 [[VAL3:s[0-9]+]], 0x500
; GFX1030: s_mul_hi_u32 s7, [[VAL1]], [[VAL2]]
; GFX1030: s_mov_b32 [[VAL4:s[0-9]+]], 0xa7c5
; GFX1030: s_mul_hi_u32 s8, [[VAL1]], [[VAL3]]
; GFX1030: s_mul_hi_u32 s5, [[VAL4]], [[VAL2]]
; GFX1030: s_mul_hi_u32 s6, [[VAL4]], [[VAL3]]
; GFX1030: v_add_co_u32 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
%d = udiv i64 %arg, 100000
ret i64 %d
}