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Differential D102553

[X86] Use Skylake Server model for x86-64-v4 so we have full instruction coveage
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Authored by RKSimon on May 15 2021, 6:33 AM.

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Reviewers
pengfei
craig.topper
lebedev.ri
Commits
rG99c0f16ea406: [X86] Use Skylake Server model for x86-64-v4 so we have full instruction…
Summary

The x86-64-v4 generic cpu arch supports AVX512BW/DQ/CD/VLX which isn't covered by the Haswell model, use the SkylakeServer model instead which is a lot closer to what the arch represents.

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Event Timeline

RKSimon created this revision.May 15 2021, 6:33 AM
Herald added a subscriber: hiraditya. · View Herald TranscriptMay 15 2021, 6:33 AM
RKSimon requested review of this revision.May 15 2021, 6:33 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 15 2021, 6:33 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
Harbormaster completed remote builds in B104652: Diff 345632.May 15 2021, 7:06 AM
craig.topper accepted this revision.May 17 2021, 11:15 AM

LGTM

This revision is now accepted and ready to land.May 17 2021, 11:15 AM
Closed by commit rG99c0f16ea406: [X86] Use Skylake Server model for x86-64-v4 so we have full instruction… (authored by RKSimon). · Explain WhyMay 18 2021, 10:07 AM
This revision was automatically updated to reflect the committed changes.
RKSimon added a commit: rG99c0f16ea406: [X86] Use Skylake Server model for x86-64-v4 so we have full instruction….

Revision Contents

PathSize
llvm/
lib/
Target/
X86/
2 lines

Diff 346205

llvm/lib/Target/X86/X86.td

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// x86-64 micro-architecture levels. // x86-64 micro-architecture levels.
def : ProcModel<"x86-64-v2", SandyBridgeModel, ProcessorFeatures.X86_64V2Features, def : ProcModel<"x86-64-v2", SandyBridgeModel, ProcessorFeatures.X86_64V2Features,
ProcessorFeatures.SNBTuning>; ProcessorFeatures.SNBTuning>;
// Close to Haswell. // Close to Haswell.
def : ProcModel<"x86-64-v3", HaswellModel, ProcessorFeatures.X86_64V3Features, def : ProcModel<"x86-64-v3", HaswellModel, ProcessorFeatures.X86_64V3Features,
ProcessorFeatures.HSWTuning>; ProcessorFeatures.HSWTuning>;
// Close to the AVX-512 level implemented by Xeon Scalable Processors. // Close to the AVX-512 level implemented by Xeon Scalable Processors.
def : ProcModel<"x86-64-v4", HaswellModel, ProcessorFeatures.X86_64V4Features, def : ProcModel<"x86-64-v4", SkylakeServerModel, ProcessorFeatures.X86_64V4Features,
ProcessorFeatures.SKXTuning>; ProcessorFeatures.SKXTuning>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Calling Conventions // Calling Conventions
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
include "X86CallingConv.td" include "X86CallingConv.td"
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