[InstCombine] cttz(sext(x)) -> cttz(zext(x))

[xbolva00]

Summary

----------------------------------------
define i32 @src(i16 %x, i1 %b) {
%0:
  %z = sext i16 %x to i32
  %p = cttz i32 %z, %b
  ret i32 %p
}
=>
define i32 @tgt(i16 %x, i1 %b) {
%0:
  %z = zext i16 %x to i32
  %p = cttz i32 %z, %b
  ret i32 %p
}
Transformation seems to be correct!

https://alive2.llvm.org/ce/z/evomeg

[craig.topper]

That alive proof only proves cttz(sext(x)) -> cttz(zext(x))

[xbolva00]

In D101764#2733616, @craig.topper wrote:

That alive proof only proves cttz(sext(x)) -> cttz(zext(x))

I meant this one basically as cttz(sext(x)) -> cttz(zext(x)) and cttz(zext(x)) -> zext(cttz(x)) if the 'ZeroIsUndef' parameter is 'true' gives us what we want: cttz(sext(x)) -> zext(cttz(x)) if the 'ZeroIsUndef' parameter is 'true'

Thanks, updated.

[spatel]

LGTM

llvm/test/Transforms/InstCombine/cttz.ll

82

Best to fix the test typo as a pre-commit.

llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp

if (match(Op0, m_BitReverse(m_Value(X)))) {
     return CallInst::Create(F, {X, II.getArgOperand(1)});
   }
 
   if (IsTZ) {
     // cttz(-x) -> cttz(x)
     if (match(Op0, m_Neg(m_Value(X))))
       return IC.replaceOperand(II, 0, X);
 
+    // cttz(sext(x)) -> cttz(zext(x))
+    if (match(Op0, m_OneUse(m_SExt(m_Value(X))))) {
+      auto *Zext = IC.Builder.CreateZExt(X, II.getType());
+      auto *CttzZext =
+          IC.Builder.CreateBinaryIntrinsic(Intrinsic::cttz, Zext, Op1);
+      return IC.replaceInstUsesWith(II, CttzZext);
+    }
+
     // Zext doesn't change the number of trailing zeros, so narrow:
     // cttz(zext(x)) -> zext(cttz(x)) if the 'ZeroIsUndef' parameter is 'true'.
     if (match(Op0, m_OneUse(m_ZExt(m_Value(X)))) && match(Op1, m_One())) {
       auto *Cttz = IC.Builder.CreateBinaryIntrinsic(Intrinsic::cttz, X,
                                                     IC.Builder.getTrue());
       auto *ZextCttz = IC.Builder.CreateZExt(Cttz, II.getType());
       return IC.replaceInstUsesWith(II, ZextCttz);
     }

llvm/test/Transforms/InstCombine/cttz.ll

 ;
   %z = zext <2 x i32> %x to <2 x i64>
   %tz = tail call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %z, i1 false)
   ret <2 x i64> %tz
 }
 
 define i32 @cttz_sext_zero_undef(i16 %x) {
 ; CHECK-LABEL: @cttz_sext_zero_undef(
-; CHECK-NEXT:    [[S:%.*]] = sext i16 [[X:%.*]] to i32
-; CHECK-NEXT:    [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[S]], i1 true), !range [[RNG1]]
-; CHECK-NEXT:    ret i32 [[TZ]]
+; CHECK-NEXT:    [[TMP1:%.*]] = call i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i16 [[TMP1]] to i32
+; CHECK-NEXT:    ret i32 [[TMP2]]
 ;
   %s = sext i16 %x to i32
   %tz = call i32 @llvm.cttz.i32(i32 %s, i1 true)
   ret i32 %tz
 }
 
 define i32 @cttz_sext_zero_def(i16 %x) {
 ; CHECK-LABEL: @cttz_sext_zero_def(
-; CHECK-NEXT:    [[S:%.*]] = zext i16 [[X:%.*]] to i32
-; CHECK-NEXT:    [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[S]], i1 false), !range [[RNG1]]
-; CHECK-NEXT:    ret i32 [[TZ]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i16 [[X:%.*]] to i32
+; CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP1]], i1 false), !range [[RNG1]]
+; CHECK-NEXT:    ret i32 [[TMP2]]
 ;
-  %s = zext i16 %x to i32
+  %s = sext i16 %x to i32
   %tz = call i32 @llvm.cttz.i32(i32 %s, i1 false)
   ret i32 %tz
 }
 
 define i32 @cttz_sext_zero_undef_extra_use(i16 %x) {
 ; CHECK-LABEL: @cttz_sext_zero_undef_extra_use(
 ; CHECK-NEXT:    [[S:%.*]] = sext i16 [[X:%.*]] to i32
 ; CHECK-NEXT:    call void @use(i32 [[S]])
 ; CHECK-NEXT:    [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[S]], i1 true), !range [[RNG1]]
 ; CHECK-NEXT:    ret i32 [[TZ]]
 ;
   %s = sext i16 %x to i32
   call void @use(i32 %s)
   %tz = call i32 @llvm.cttz.i32(i32 %s, i1 true)
   ret i32 %tz
 }
 
 define <2 x i64> @cttz_sext_zero_undef_vec(<2 x i32> %x) {
 ; CHECK-LABEL: @cttz_sext_zero_undef_vec(
-; CHECK-NEXT:    [[S:%.*]] = sext <2 x i32> [[X:%.*]] to <2 x i64>
-; CHECK-NEXT:    [[TZ:%.*]] = tail call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[S]], i1 true)
-; CHECK-NEXT:    ret <2 x i64> [[TZ]]
+; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 true)
+; CHECK-NEXT:    [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>
+; CHECK-NEXT:    ret <2 x i64> [[TMP2]]
 ;
   %s = sext <2 x i32> %x to <2 x i64>
   %tz = tail call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %s, i1 true)
   ret <2 x i64> %tz
 }
 
 define <2 x i64> @cttz_sext_zero_def_vec(<2 x i32> %x) {
 ; CHECK-LABEL: @cttz_sext_zero_def_vec(
-; CHECK-NEXT:    [[S:%.*]] = sext <2 x i32> [[X:%.*]] to <2 x i64>
-; CHECK-NEXT:    [[TZ:%.*]] = tail call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[S]], i1 false)
-; CHECK-NEXT:    ret <2 x i64> [[TZ]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext <2 x i32> [[X:%.*]] to <2 x i64>
+; CHECK-NEXT:    [[TMP2:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[TMP1]], i1 false)
+; CHECK-NEXT:    ret <2 x i64> [[TMP2]]
 ;
   %s = sext <2 x i32> %x to <2 x i64>
   %tz = tail call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %s, i1 false)
   ret <2 x i64> %tz
 }