[SystemZ][z/OS] Enforce prefix-less registers in SystemZAsmParser for the HLASM dialect.

[anirudhp]

Summary

• Previously, https://reviews.llvm.org/D101308 removed prefixes from register while printing them out. This was especially needed for inline asm statements which used input/output operands.
• However, the backend SystemZAsmParser, accepts both prefixed registers and prefix-less registers as part of its implementation
• This patch aims to change that by ensuring that prefixed registers are only allowed for the ATT dialect.

[uweigand]

LGTM, thanks!

llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp

case AR32Reg:
     Group = RegAR;
     break;
   case CR64Reg:
     Group = RegCR;
     break;
   }
 
   // Handle register names of the form %<prefix><number>
-  if (Parser.getTok().is(AsmToken::Percent)) {
+  if (isParsingATT() && Parser.getTok().is(AsmToken::Percent)) {
     if (parseRegister(Reg))
       return MatchOperand_ParseFail;
 
     // Check the parsed register group "Reg.Group" with the expected "Group"
     // Have to error out if user specified wrong prefix.
     switch (Group) {
     case RegGR:
     case RegFP:
if (Parser.getTok().is(AsmToken::Integer)) {
     }
 
     SMLoc EndLoc =
       SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
 
     Operands.push_back(SystemZOperand::createImm(Register, StartLoc, EndLoc));
   }
   else {
+    if (isParsingHLASM())
+      return MatchOperand_NoMatch;
+
     Register Reg;
     if (parseRegister(Reg))
       return MatchOperand_ParseFail;
 
     if (Reg.Num > 15) {
       Error(StartLoc, "invalid register");
       return MatchOperand_ParseFail;
     }
bool SystemZAsmParser::parseAddress(bool &HaveReg1, Register &Reg1,
   // The restriction only applies to the first Register (i.e. Reg1). Reg2 is
   // always a general register. Reg1 should be of group RegV if "HasVectorIndex"
   // (i.e. insn is of type BDVMem) is true.
   RegisterGroup RegGroup = HasVectorIndex ? RegV : RegGR;
 
   if (getLexer().is(AsmToken::LParen)) {
     Parser.Lex();
 
-    if (getLexer().is(AsmToken::Percent)) {
+    if (isParsingATT() && getLexer().is(AsmToken::Percent)) {
       // Parse the first register.
       HaveReg1 = true;
       if (parseRegister(Reg1))
         return true;
     }
     // So if we have an integer as the first token in ([tok1], ..), it could:
     // 1. Refer to a "Register" (i.e X,R,V fields in BD[X|R|V]Mem type of
     // instructions)
if (getLexer().is(AsmToken::LParen)) {
     if (getLexer().is(AsmToken::Comma)) {
       Parser.Lex();
       HaveReg2 = true;
 
       if (getLexer().is(AsmToken::Integer)) {
         if (parseIntegerRegister(Reg2, RegGR))
           return true;
       } else {
-        if (parseRegister(Reg2))
+        if (isParsingATT() && parseRegister(Reg2))
           return true;
       }
     }
 
     // Consume the closing bracket.
     if (getLexer().isNot(AsmToken::RParen))
       return Error(Parser.getTok().getLoc(), "unexpected token in address");
     Parser.Lex();
bool SystemZAsmParser::parseOperand(OperandVector &Operands,
   // the operand parsing failed.
   if (ResTy == MatchOperand_ParseFail)
     return true;
 
   // Check for a register.  All real register operands should have used
   // a context-dependent parse routine, which gives the required register
   // class.  The code is here to mop up other cases, like those where
   // the instruction isn't recognized.
-  if (Parser.getTok().is(AsmToken::Percent)) {
+  if (isParsingATT() && Parser.getTok().is(AsmToken::Percent)) {
     Register Reg;
     if (parseRegister(Reg))
       return true;
     Operands.push_back(SystemZOperand::createInvalid(Reg.StartLoc, Reg.EndLoc));
     return false;
   }
 
   // The only other type of operand is an immediate or address.  As above,