[AMDGPU] Skip promote-alloca for insertelement/insertvalue users

[cdevadas]

Summary

It is difficult to track the users of vector and aggregate types.

[arsenm]

llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp

611

s/instructions of vector type/aggregate instructions/?

613–614

I would move this below the other more common instruction cases

llvm/test/CodeGen/AMDGPU/skip-promote-alloca-vector-users.ll

12

Don't use a volatile store, if we did analyze the users this would have been skipped anyway

23

Ditto

34

Ditto

[cdevadas]

Patch updated.

llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp

 
 bool AMDGPUPromoteAllocaImpl::collectUsesWithPtrTypes(
     Value *BaseAlloca, Value *Val, std::vector<Value *> &WorkList) const {
 
   for (User *User : Val->users()) {
     if (is_contained(WorkList, User))
       continue;
 
+    // Do not promote instructions of vector type. It is hard to track their
+    // users.
+    if (isa<InsertValueInst>(User) || isa<InsertElementInst>(User))
+      return false;
+
     if (CallInst *CI = dyn_cast<CallInst>(User)) {
       if (!isCallPromotable(CI))
         return false;
 
       WorkList.push_back(User);
       continue;
     }
 

llvm/test/CodeGen/AMDGPU/skip-promote-alloca-vector-users.ll

+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-promote-alloca < %s | FileCheck %s
+
+; Do not promote an alloca with users of vector/aggregate type.
+
+; CHECK-LABEL: @test_insertelement(
+; CHECK:  %alloca = alloca i16
+; CHECK-NEXT:  insertelement <2 x i16*> undef, i16* %alloca, i32 0
+define amdgpu_kernel void @test_insertelement() #0 {
+entry:
+  %alloca = alloca i16, align 4
+  %in = insertelement <2 x i16*> undef, i16* %alloca, i32 0
+  store volatile <2 x i16*> %in, <2 x i16*>* undef, align 4
+  ret void
+}
+
+; CHECK-LABEL: @test_insertvalue(
+; CHECK:  %alloca = alloca i16
+; CHECK-NEXT:  insertvalue { i16* } undef, i16* %alloca, 0
+define amdgpu_kernel void @test_insertvalue() #0 {
+entry:
+  %alloca = alloca i16, align 4
+  %in = insertvalue { i16* } undef, i16* %alloca, 0
+  store volatile { i16* } %in, { i16* }* undef, align 4
+  ret void
+}
+
+; CHECK-LABEL: @test_insertvalue_array(
+; CHECK:  %alloca = alloca i16
+; CHECK-NEXT:  insertvalue [2 x i16*] undef, i16* %alloca, 0
+define amdgpu_kernel void @test_insertvalue_array() #0 {
+entry:
+  %alloca = alloca i16, align 4
+  %in = insertvalue [2 x i16*] undef, i16* %alloca, 0
+  store volatile [2 x i16*] %in, [2 x i16*]* undef, align 4
+  ret void
+}
+
+attributes #0 = { nounwind }