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[mlir] Handle strided 1D vector transfer ops in ProgressiveVectorToSCF
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Authored by springerm on Apr 21 2021, 5:20 AM.

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Summary

Strided 1D vector transfer ops are 1D transfers operating on a memref dimension different from the last one. Such transfer ops do not accesses contiguous memory blocks (vectors), but access memory in a strided fashion. In the absence of a mask, strided 1D vector transfer ops can also be lowered using matrix.column.major.* LLVM instructions (in a later commit).

Subsequent commits will extend the pass to handle the remaining missing permutation maps (broadcasts, transposes, etc.).

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Event Timeline

springerm created this revision.Apr 21 2021, 5:20 AM
springerm requested review of this revision.Apr 21 2021, 5:20 AM
Herald added a project: Restricted Project. · View Herald TranscriptApr 21 2021, 5:20 AM
springerm updated this revision to Diff 339415.Apr 21 2021, 3:46 PM

A few smaller changes.

springerm updated this revision to Diff 339422.Apr 21 2021, 4:06 PM

Added some comments.

springerm updated this revision to Diff 339437.Apr 21 2021, 6:39 PM

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springerm updated this revision to Diff 339447.Apr 21 2021, 7:32 PM

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springerm updated this revision to Diff 339869.Apr 22 2021, 9:31 PM

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This revision is now accepted and ready to land.Apr 23 2021, 12:35 AM
springerm updated this revision to Diff 339928.Apr 23 2021, 1:18 AM

(new export)

This revision was landed with ongoing or failed builds.Apr 23 2021, 1:20 AM
This revision was automatically updated to reflect the committed changes.