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Differential D100126

AMDGPU: Add gfx90c support to code object v2 for backwards compatibility
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Authored by kzhuravl on Apr 8 2021, 10:05 AM.

Details

Reviewers
t-tye
Commits
rG4fae63c612a7: AMDGPU: Add gfx90c support to code object v2 for backwards compatibility

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Unit TestsFailed

TimeTest
2,040 msx64 debian > libFuzzer.libFuzzer::fuzzer-leak.test

Event Timeline

kzhuravl created this revision.Apr 8 2021, 10:05 AM
Herald added subscribers: kerbowa, hiraditya, tpr and 5 others. · View Herald TranscriptApr 8 2021, 10:05 AM
kzhuravl requested review of this revision.Apr 8 2021, 10:05 AM
Herald added a project: Restricted Project. · View Herald TranscriptApr 8 2021, 10:05 AM
Herald added subscribers: llvm-commits, wdng. · View Herald Transcript
Harbormaster completed remote builds in B97771: Diff 336156.Apr 8 2021, 11:20 AM
t-tye requested changes to this revision.Apr 8 2021, 11:35 AM
t-tye added inline comments.
llvm/docs/AMDGPUUsage.rst
1363
``AMD:AMDGPU:9:0:12`` ``gfx90c:xnack-``
This revision now requires changes to proceed.Apr 8 2021, 11:35 AM
kzhuravl updated this revision to Diff 336188.Apr 8 2021, 12:06 PM
kzhuravl marked an inline comment as done.

Address review feedback.

t-tye accepted this revision.Apr 8 2021, 12:31 PM

LGTM

This revision is now accepted and ready to land.Apr 8 2021, 12:31 PM
Harbormaster completed remote builds in B97792: Diff 336188.Apr 8 2021, 12:37 PM
This revision was landed with ongoing or failed builds.Apr 8 2021, 1:55 PM
Closed by commit rG4fae63c612a7: AMDGPU: Add gfx90c support to code object v2 for backwards compatibility (authored by kzhuravl). · Explain Why
This revision was automatically updated to reflect the committed changes.
kzhuravl added a commit: rG4fae63c612a7: AMDGPU: Add gfx90c support to code object v2 for backwards compatibility.

Revision Contents

PathSize
llvm/
docs/
57 lines
lib/
Target/
AMDGPU/
Utils/
8 lines
test/
CodeGen/
AMDGPU/
6 lines

Diff 336188

llvm/docs/AMDGPUUsage.rst

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 1,354 Lines • ▼ Show 20 Lines``NT_AMD_HSA_METADATA``
[HSA]_ compatible runtimes (see :ref:`amdgpu-os`). It is required when the [HSA]_ compatible runtimes (see :ref:`amdgpu-os`). It is required when the
target triple OS is ``amdhsa`` (see :ref:`amdgpu-target-triples`). See target triple OS is ``amdhsa`` (see :ref:`amdgpu-target-triples`). See
:ref:`amdgpu-amdhsa-code-object-metadata-v2` for the syntax of the code object :ref:`amdgpu-amdhsa-code-object-metadata-v2` for the syntax of the code object
metadata string. metadata string.
.. table:: AMDGPU Code Object V2 Supported Processors and Fixed Target Feature Settings .. table:: AMDGPU Code Object V2 Supported Processors and Fixed Target Feature Settings
:name: amdgpu-elf-note-record-supported_processors-v2-table :name: amdgpu-elf-note-record-supported_processors-v2-table
==================== ========================== ===================== ==========================
t-tyeUnsubmitted
Done
ReplyInline Actions
``AMD:AMDGPU:9:0:12`` ``gfx90c:xnack-``
t-tye: ``AMD:AMDGPU:9:0:12`` ``gfx90c:xnack-``
Note Record ISA Name Target ID Note Record ISA Name Target ID
==================== ========================== ===================== ==========================
``AMD:AMDGPU:6:0:0`` ``gfx600`` ``AMD:AMDGPU:6:0:0`` ``gfx600``
``AMD:AMDGPU:6:0:1`` ``gfx601`` ``AMD:AMDGPU:6:0:1`` ``gfx601``
``AMD:AMDGPU:6:0:2`` ``gfx602`` ``AMD:AMDGPU:6:0:2`` ``gfx602``
``AMD:AMDGPU:7:0:0`` ``gfx700`` ``AMD:AMDGPU:7:0:0`` ``gfx700``
``AMD:AMDGPU:7:0:1`` ``gfx701`` ``AMD:AMDGPU:7:0:1`` ``gfx701``
``AMD:AMDGPU:7:0:2`` ``gfx702`` ``AMD:AMDGPU:7:0:2`` ``gfx702``
``AMD:AMDGPU:7:0:3`` ``gfx703`` ``AMD:AMDGPU:7:0:3`` ``gfx703``
``AMD:AMDGPU:7:0:4`` ``gfx704`` ``AMD:AMDGPU:7:0:4`` ``gfx704``
``AMD:AMDGPU:7:0:5`` ``gfx705`` ``AMD:AMDGPU:7:0:5`` ``gfx705``
``AMD:AMDGPU:8:0:0`` ``gfx802`` ``AMD:AMDGPU:8:0:0`` ``gfx802``
``AMD:AMDGPU:8:0:1`` ``gfx801:xnack+`` ``AMD:AMDGPU:8:0:1`` ``gfx801:xnack+``
``AMD:AMDGPU:8:0:2`` ``gfx802`` ``AMD:AMDGPU:8:0:2`` ``gfx802``
``AMD:AMDGPU:8:0:3`` ``gfx803`` ``AMD:AMDGPU:8:0:3`` ``gfx803``
``AMD:AMDGPU:8:0:4`` ``gfx803`` ``AMD:AMDGPU:8:0:4`` ``gfx803``
``AMD:AMDGPU:8:0:5`` ``gfx805`` ``AMD:AMDGPU:8:0:5`` ``gfx805``
``AMD:AMDGPU:8:1:0`` ``gfx810:xnack+`` ``AMD:AMDGPU:8:1:0`` ``gfx810:xnack+``
``AMD:AMDGPU:9:0:0`` ``gfx900:xnack-`` ``AMD:AMDGPU:9:0:0`` ``gfx900:xnack-``
``AMD:AMDGPU:9:0:1`` ``gfx900:xnack+`` ``AMD:AMDGPU:9:0:1`` ``gfx900:xnack+``
``AMD:AMDGPU:9:0:2`` ``gfx902:xnack-`` ``AMD:AMDGPU:9:0:2`` ``gfx902:xnack-``
``AMD:AMDGPU:9:0:3`` ``gfx902:xnack+`` ``AMD:AMDGPU:9:0:3`` ``gfx902:xnack+``
``AMD:AMDGPU:9:0:4`` ``gfx904:xnack-`` ``AMD:AMDGPU:9:0:4`` ``gfx904:xnack-``
``AMD:AMDGPU:9:0:5`` ``gfx904:xnack+`` ``AMD:AMDGPU:9:0:5`` ``gfx904:xnack+``
``AMD:AMDGPU:9:0:6`` ``gfx906:sramecc-:xnack-`` ``AMD:AMDGPU:9:0:6`` ``gfx906:sramecc-:xnack-``
``AMD:AMDGPU:9:0:7`` ``gfx906:sramecc-:xnack+`` ``AMD:AMDGPU:9:0:7`` ``gfx906:sramecc-:xnack+``
==================== ========================== ``AMD:AMDGPU:9:0:12`` ``gfx90c:xnack-``
===================== ==========================
.. _amdgpu-note-records-v3-v4: .. _amdgpu-note-records-v3-v4:
Code Object V3 to V4 Note Records Code Object V3 to V4 Note Records
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The AMDGPU backend code object uses the following ELF note record in the The AMDGPU backend code object uses the following ELF note record in the
``.note`` section when compiling for code object V3 to V4. ``.note`` section when compiling for code object V3 to V4.
▲ Show 20 Lines • Show All 10,735 Lines • Show Last 20 Lines

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

Show First 20 Lines • Show All 432 Lines • ▼ Show 20 Lines case ELF::ELFABIVERSION_AMDGPU_HSA_V2:
if (isXnackOnOrAny()) if (isXnackOnOrAny())
Processor = "gfx903"; Processor = "gfx903";
} else if (Processor == "gfx904") { } else if (Processor == "gfx904") {
if (isXnackOnOrAny()) if (isXnackOnOrAny())
Processor = "gfx905"; Processor = "gfx905";
} else if (Processor == "gfx906") { } else if (Processor == "gfx906") {
if (isXnackOnOrAny()) if (isXnackOnOrAny())
Processor = "gfx907"; Processor = "gfx907";
} else { } else if (Processor == "gfx90c") {
if (isXnackOnOrAny())
report_fatal_error(
"AMD GPU code object V2 does not support processor " + Processor +
" with XNACK being ON or ANY");
}
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-      }
-      else {
+      } else {
Lint: Pre-merge checks: clang-format: please reformat the code ``` - } - else { + } else { ```
else {
report_fatal_error( report_fatal_error(
"AMD GPU code object V2 does not support processor " + Processor); "AMD GPU code object V2 does not support processor " + Processor);
} }
break; break;
case ELF::ELFABIVERSION_AMDGPU_HSA_V3: case ELF::ELFABIVERSION_AMDGPU_HSA_V3:
// xnack. // xnack.
if (isXnackOnOrAny()) if (isXnackOnOrAny())
Features += "+xnack"; Features += "+xnack";
▲ Show 20 Lines • Show All 1,525 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/tid-code-object-v2-backwards-compatibility.ll

  • This file was added.
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90c -mattr=-xnack --amdhsa-code-object-version=2 < %s 2>&1 | FileCheck --check-prefix=GFX90C-VALID %s
; RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90c --amdhsa-code-object-version=2 < %s 2>&1 | FileCheck --check-prefix=GFX90C-ERROR %s
; GFX90C-VALID: .hsa_code_object_isa 9,0,12,"AMD","AMDGPU"
; GFX90C-VALID: .amd_amdgpu_isa "amdgcn-amd-amdhsa--gfx90c"
; GFX90C-ERROR: LLVM ERROR: AMD GPU code object V2 does not support processor gfx90c with XNACK being ON or ANY