[PowerPC] fixup killed flags for ri + addi to ri transformation

[shchenz]

Summary

Fixup killed flags if DefMI and MI are not in the same basic blocks.

We may still get some verify errors if DefMI and MI are not in same basic blocks. For example, if the killed flag is not in the DefMI, instead it is in another instruction which is in the same BB with DefMI but not in the same BB with MI. This patch is just to fix one of them. That's why we keep the FIXME near the changes.

[nemanjai]

LGTM. Thanks for the quick fix.

llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

bool PPCInstrInfo::transformToNewImmFormFedByAdd(
 
   // Do the transform
   LLVM_DEBUG(dbgs() << "Replacing instruction:\n");
   LLVM_DEBUG(MI.dump());
   LLVM_DEBUG(dbgs() << "Fed by:\n");
   LLVM_DEBUG(DefMI.dump());
 
   MI.getOperand(III.OpNoForForwarding).setReg(RegMO->getReg());
-  MI.getOperand(III.OpNoForForwarding).setIsKill(RegMO->isKill());
+  if (RegMO->isKill()) {
+    MI.getOperand(III.OpNoForForwarding).setIsKill(true);
+    // Clear the killed flag in RegMO. Doing this here can handle some cases
+    // that DefMI and MI are not in same basic block.
+    RegMO->setIsKill(false);
+  }
   MI.getOperand(III.ImmOpNo).setImm(Imm);
 
   // FIXME: fix kill/dead flag if MI and DefMI are not in same basic block.
   if (DefMI.getParent() == MI.getParent()) {
     // Check if reg is killed between MI and DefMI.
     auto IsKilledFor = [&](unsigned Reg) {
       MachineBasicBlock::const_reverse_iterator It = MI;
       MachineBasicBlock::const_reverse_iterator E = DefMI;

llvm/test/CodeGen/PowerPC/convert-ri-addi-to-ri.mir

body:             |
   %2:g8rc = LI8 1
   ; CHECK: SUBFIC8 killed %1, 1, implicit-def $carry
   %3:g8rc = SUBFC8 killed %1:g8rc, %2:g8rc, implicit-def $carry
   %4:g8rc = SUBFE8 %2:g8rc, %2:g8rc, implicit-def dead $carry, implicit $carry
   %5:g8rc = NEG8 killed %4:g8rc
   $x3 = COPY %5:g8rc
   BLR8 implicit $lr8, implicit $rm, implicit $x3
 ...
+---
+name: killFlagSameBlock
+#CHECK : name : killFlagSameBlock
+tracksRegLiveness: true
+body: |
+  bb.0.entry:
+  liveins: $x3
+    %0:g8rc_and_g8rc_nox0 = COPY $x3
+    %1:g8rc_and_g8rc_nox0 = ADDI8 killed %0:g8rc_and_g8rc_nox0, -8
+    ; CHECK: %1:g8rc_and_g8rc_nox0 = ADDI8 %0, -8
+    %2:g8rc = LI8 0
+    ; CHECK: STD killed %2, 8, killed %0
+    STD killed %2:g8rc, 16, %1:g8rc_and_g8rc_nox0
+    BLR8 implicit $lr8, implicit $rm
+...
+---
+name: killFlagDifferentBlocks
+#CHECK : name : killFlagDifferentBlocks
+tracksRegLiveness: true
+body: |
+  bb.0.entry:
+  liveins: $x3
+    %0:g8rc_and_g8rc_nox0 = COPY $x3
+    ; CHECK: %1:g8rc_and_g8rc_nox0 = ADDI8 %0, -8
+    %1:g8rc_and_g8rc_nox0 = ADDI8 killed %0:g8rc_and_g8rc_nox0, -8
+
+  bb.1:
+    %2:g8rc = LI8 0
+    ; CHECK: STD killed %2, 8, killed %0
+    STD killed %2:g8rc, 16, %1:g8rc_and_g8rc_nox0
+    BLR8 implicit $lr8, implicit $rm
+...