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Differential D99583

[test, LoopVectorize] Fix use of var defined in CHECK-NOT
ClosedPublic

Authored by thopre on Mar 30 2021, 5:54 AM.

Details

Reviewers
dorit
Ayal
hsaito
dcaballe
fhahn
Commits
rG8b5b03c279be: [test, LoopVectorize] Fix use of var defined in CHECK-NOT
Summary

LLVM test Transforms/LoopVectorize/X86/x86-pr39099.ll tries to check for
the absence of a sequence of instructions with several CHECK-NOT with
one of those directives using a variable defined in another. However
CHECK-NOT are checked independently so that is using a variable defined
in a pattern that should not occur in the input.

This commit only checks for the absence of a widened load which rules
out the presence of the whole sequence and does not involve an undefined
variable.

Diff Detail

Event Timeline

thopre created this revision.Mar 30 2021, 5:54 AM
Herald added a subscriber: pengfei. · View Herald TranscriptMar 30 2021, 5:54 AM
thopre requested review of this revision.Mar 30 2021, 5:54 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 30 2021, 5:54 AM
Harbormaster completed remote builds in B96295: Diff 334125.Mar 30 2021, 6:32 AM
thopre mentioned this in D86222: Fix PR46880: Fail CHECK-NOT with undefined variable.Mar 30 2021, 6:40 AM
fhahn accepted this revision.Mar 30 2021, 7:05 AM

LGTM, thanks!

This revision is now accepted and ready to land.Mar 30 2021, 7:05 AM
Closed by commit rG8b5b03c279be: [test, LoopVectorize] Fix use of var defined in CHECK-NOT (authored by thopre). · Explain WhyMar 30 2021, 7:32 AM
This revision was automatically updated to reflect the committed changes.
thopre added a commit: rG8b5b03c279be: [test, LoopVectorize] Fix use of var defined in CHECK-NOT.

Revision Contents

PathSize
llvm/
test/
Transforms/
LoopVectorize/
X86/
3 lines

Diff 334162

llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll

Show All 23 Lines
;CHECK-LABEL: @masked_strided( ;CHECK-LABEL: @masked_strided(
;CHECK: vector.body: ;CHECK: vector.body:
;CHECK-NEXT: %index = phi i32 ;CHECK-NEXT: %index = phi i32
;CHECK-NEXT: %[[VECIND:.+]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> ;CHECK-NEXT: %[[VECIND:.+]] = phi <8 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
;CHECK-NEXT: %[[VMASK:.+]] = icmp ugt <8 x i32> %[[VECIND]], %{{broadcast.splat*}} ;CHECK-NEXT: %[[VMASK:.+]] = icmp ugt <8 x i32> %[[VECIND]], %{{broadcast.splat*}}
;CHECK-NEXT: %{{.*}} = shl nuw nsw <8 x i32> %[[VECIND]], <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> ;CHECK-NEXT: %{{.*}} = shl nuw nsw <8 x i32> %[[VECIND]], <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
;CHECK-NEXT: %[[M:.+]] = extractelement <8 x i1> %[[VMASK]], i32 0 ;CHECK-NEXT: %[[M:.+]] = extractelement <8 x i1> %[[VMASK]], i32 0
;CHECK-NEXT: br i1 %[[M]], label %pred.load.if, label %pred.load.continue ;CHECK-NEXT: br i1 %[[M]], label %pred.load.if, label %pred.load.continue
;CHECK-NOT: %[[WIDEVEC:.+]] = load <16 x i8>, <16 x i8>* %{{.*}}, align 1 ;CHECK-NOT: %{{.+}} = load <16 x i8>, <16 x i8>* %{{.*}}, align 1
;CHECK-NOT: %{{.*}} = shufflevector <16 x i8> %[[WIDEVEC]], <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
define dso_local void @masked_strided(i8* noalias nocapture readonly %p, i8* noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr { define dso_local void @masked_strided(i8* noalias nocapture readonly %p, i8* noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr {
entry: entry:
%conv = zext i8 %guard to i32 %conv = zext i8 %guard to i32
br label %for.body br label %for.body
for.body: for.body:
%ix.09 = phi i32 [ 0, %entry ], [ %inc, %for.inc ] %ix.09 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
Show All 19 Lines