[X86] add dwarf annotation for inline stack probe

[YangKeao]

Summary

While probing stack, the stack register is moved without dwarf
information, which could cause panic if unwind the backtrace.
This commit only add annotation for the inline stack probe case.
Dwarf information for the loop case should be done in another
patch and need further discussion.

[YangKeao]

@nagisa This is the inline part of D98789 😋 .

[YangKeao]

I installed clang-format later, and nothing found (there is no lint message). How could I update this patch and remove the "clang-format not found in user's PATH; not linting file." warning? (or just left it here 😋 )

[nagisa]

You can remove these notices by running arc diff again with clang-format in your PATH. It is also fine to just leave these messages in – CI will verify the formatting as well and fail if its not correct. Only then it is strictly necessary to rediff your code.

Do you have ability to commit this yourself, or would you need somebody to do it for you?

[YangKeao]

Do you have ability to commit this yourself, or would you need somebody to do it for you?

Yes. I do need somebody to help me commit this patch.(Actually, this is my first patch to llvm🎉). Can you do this for me? Thank you🥺.

[nagisa]

Landed this, thank you!

[YangKeao]

In D99579#2662517, @nagisa wrote:

Landed this, thank you!

Thanks 🍻 .

llvm/lib/Target/X86/X86FrameLowering.h

public:
 
   Register getInitialCFARegister(const MachineFunction &MF) const override;
 
   /// Return true if the function has a redzone (accessible bytes past the
   /// frame of the top of stack function) as part of it's ABI.
   bool has128ByteRedZone(const MachineFunction& MF) const;
 
 private:
+  bool isWin64Prologue(const MachineFunction &MF) const;
+
+  bool needsDwarfCFI(const MachineFunction &MF) const;
+
   uint64_t calculateMaxStackAlign(const MachineFunction &MF) const;
 
   /// Emit target stack probe as a call to a helper function
   void emitStackProbeCall(MachineFunction &MF, MachineBasicBlock &MBB,
                           MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
                           bool InProlog) const;
 
   /// Emit target stack probe as an inline sequence.

llvm/lib/Target/X86/X86FrameLowering.cpp

void X86FrameLowering::emitStackProbeInlineGeneric(
   }
 }
 
 void X86FrameLowering::emitStackProbeInlineGenericBlock(
     MachineFunction &MF, MachineBasicBlock &MBB,
     MachineBasicBlock::iterator MBBI, const DebugLoc &DL, uint64_t Offset,
     uint64_t AlignOffset) const {
 
+  const bool NeedsDwarfCFI = needsDwarfCFI(MF);
+  const bool HasFP = hasFP(MF);
   const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
   const X86TargetLowering &TLI = *STI.getTargetLowering();
   const unsigned Opc = getSUBriOpcode(Uses64BitFramePtr, Offset);
   const unsigned MovMIOpc = Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;
   const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
 
   uint64_t CurrentOffset = 0;
 
   assert(AlignOffset < StackProbeSize);
 
   // If the offset is so small it fits within a page, there's nothing to do.
   if (StackProbeSize < Offset + AlignOffset) {
 
     MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
                            .addReg(StackPtr)
                            .addImm(StackProbeSize - AlignOffset)
                            .setMIFlag(MachineInstr::FrameSetup);
+    if (!HasFP && NeedsDwarfCFI) {
+      BuildCFI(MBB, MBBI, DL,
+               MCCFIInstruction::createAdjustCfaOffset(
+                   nullptr, StackProbeSize - AlignOffset));
+    }
     MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
 
     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MovMIOpc))
                      .setMIFlag(MachineInstr::FrameSetup),
                  StackPtr, false, 0)
         .addImm(0)
         .setMIFlag(MachineInstr::FrameSetup);
     NumFrameExtraProbe++;
     CurrentOffset = StackProbeSize - AlignOffset;
   }
 
   // For the next N - 1 pages, just probe. I tried to take advantage of
   // natural probes but it implies much more logic and there was very few
   // interesting natural probes to interleave.
   while (CurrentOffset + StackProbeSize < Offset) {
     MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
                            .addReg(StackPtr)
                            .addImm(StackProbeSize)
                            .setMIFlag(MachineInstr::FrameSetup);
     MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
 
-
+    if (!HasFP && NeedsDwarfCFI) {
+      BuildCFI(
+          MBB, MBBI, DL,
+          MCCFIInstruction::createAdjustCfaOffset(nullptr, StackProbeSize));
+    }
     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MovMIOpc))
                      .setMIFlag(MachineInstr::FrameSetup),
                  StackPtr, false, 0)
         .addImm(0)
         .setMIFlag(MachineInstr::FrameSetup);
     NumFrameExtraProbe++;
     CurrentOffset += StackProbeSize;
   }
 
   // No need to probe the tail, it is smaller than a Page.
   uint64_t ChunkSize = Offset - CurrentOffset;
   MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
                          .addReg(StackPtr)
                          .addImm(ChunkSize)
                          .setMIFlag(MachineInstr::FrameSetup);
+  // No need to adjust Dwarf CFA offset here, the last position of the stack has
+  // been defined
   MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
 }
 
 void X86FrameLowering::emitStackProbeInlineGenericLoop(
     MachineFunction &MF, MachineBasicBlock &MBB,
     MachineBasicBlock::iterator MBBI, const DebugLoc &DL, uint64_t Offset,
     uint64_t AlignOffset) const {
   assert(Offset && "null offset");
bool X86FrameLowering::has128ByteRedZone(const MachineFunction& MF) const {
   // clobbered by any interrupt handler.
   assert(&STI == &MF.getSubtarget<X86Subtarget>() &&
          "MF used frame lowering for wrong subtarget");
   const Function &Fn = MF.getFunction();
   const bool IsWin64CC = STI.isCallingConvWin64(Fn.getCallingConv());
   return Is64Bit && !IsWin64CC && !Fn.hasFnAttribute(Attribute::NoRedZone);
 }
 
+bool X86FrameLowering::isWin64Prologue(const MachineFunction &MF) const {
+  return MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
+}
+
+bool X86FrameLowering::needsDwarfCFI(const MachineFunction &MF) const {
+  return !isWin64Prologue(MF) && MF.needsFrameMoves();
+}
 
 /// emitPrologue - Push callee-saved registers onto the stack, which
 /// automatically adjust the stack pointer. Adjust the stack pointer to allocate
 /// space for local variables. Also emit labels used by the exception handler to
 /// generate the exception handling frames.
 
 /*
   Here's a gist of what gets emitted:
void X86FrameLowering::emitPrologue(MachineFunction &MF,
   bool IsFunclet = MBB.isEHFuncletEntry();
   EHPersonality Personality = EHPersonality::Unknown;
   if (Fn.hasPersonalityFn())
     Personality = classifyEHPersonality(Fn.getPersonalityFn());
   bool FnHasClrFunclet =
       MF.hasEHFunclets() && Personality == EHPersonality::CoreCLR;
   bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
   bool HasFP = hasFP(MF);
-  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
+  bool IsWin64Prologue = isWin64Prologue(MF);
   bool NeedsWin64CFI = IsWin64Prologue && Fn.needsUnwindTableEntry();
   // FIXME: Emit FPO data for EH funclets.
   bool NeedsWinFPO =
       !IsFunclet && STI.isTargetWin32() && MMI.getModule()->getCodeViewFlag();
   bool NeedsWinCFI = NeedsWin64CFI || NeedsWinFPO;
-  bool NeedsDwarfCFI = !IsWin64Prologue && MF.needsFrameMoves();
+  bool NeedsDwarfCFI = needsDwarfCFI(MF);
   Register FramePtr = TRI->getFrameRegister(MF);
   const Register MachineFramePtr =
       STI.isTarget64BitILP32()
           ? Register(getX86SubSuperRegister(FramePtr, 64)) : FramePtr;
   Register BasePtr = TRI->getBaseRegister();
   bool HasWinCFI = false;
 
   // Debug location must be unknown since the first debug location is used

llvm/test/CodeGen/X86/stack-clash-medium-natural-probes-mutliple-objects.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
 ; RUN: llc < %s | FileCheck %s
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 define i32 @foo() local_unnamed_addr #0 {
 ; CHECK-LABEL: foo:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    subq $4096, %rsp # imm = 0x1000
+; CHECK-NEXT:    .cfi_adjust_cfa_offset 4096
 ; CHECK-NEXT:    movq $0, (%rsp)
 ; CHECK-NEXT:    subq $1784, %rsp # imm = 0x6F8
 ; CHECK-NEXT:    .cfi_def_cfa_offset 5888
 ; CHECK-NEXT:    movl $1, 3872(%rsp)
 ; CHECK-NEXT:    movl $2, 672(%rsp)
 ; CHECK-NEXT:    movl 1872(%rsp), %eax
 ; CHECK-NEXT:    addq $5880, %rsp # imm = 0x16F8
 ; CHECK-NEXT:    .cfi_def_cfa_offset 8

llvm/test/CodeGen/X86/stack-clash-medium-natural-probes.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
 ; RUN: llc < %s | FileCheck %s
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 define i32 @foo() local_unnamed_addr #0 {
 ; CHECK-LABEL: foo:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    subq $4096, %rsp # imm = 0x1000
+; CHECK-NEXT:    .cfi_adjust_cfa_offset 4096
 ; CHECK-NEXT:    movq $0, (%rsp)
 ; CHECK-NEXT:    subq $3784, %rsp # imm = 0xEC8
 ; CHECK-NEXT:    .cfi_def_cfa_offset 7888
 ; CHECK-NEXT:    movl $1, 264(%rsp)
 ; CHECK-NEXT:    movl $1, 4664(%rsp)
 ; CHECK-NEXT:    movl -128(%rsp), %eax
 ; CHECK-NEXT:    addq $7880, %rsp # imm = 0x1EC8
 ; CHECK-NEXT:    .cfi_def_cfa_offset 8

llvm/test/CodeGen/X86/stack-clash-medium.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
 ; RUN: llc -mtriple=x86_64-linux-android < %s | FileCheck -check-prefix=CHECK-X86-64 %s
 ; RUN: llc -mtriple=i686-linux-android < %s | FileCheck -check-prefix=CHECK-X86-32 %s
 
 define i32 @foo() local_unnamed_addr #0 {
 ; CHECK-X86-64-LABEL: foo:
 ; CHECK-X86-64:       # %bb.0:
 ; CHECK-X86-64-NEXT:    subq $4096, %rsp # imm = 0x1000
+; CHECK-X86-64-NEXT:    .cfi_adjust_cfa_offset 4096
 ; CHECK-X86-64-NEXT:    movq $0, (%rsp)
 ; CHECK-X86-64-NEXT:    subq $3784, %rsp # imm = 0xEC8
 ; CHECK-X86-64-NEXT:    .cfi_def_cfa_offset 7888
 ; CHECK-X86-64-NEXT:    movl $1, 672(%rsp)
 ; CHECK-X86-64-NEXT:    movl -128(%rsp), %eax
 ; CHECK-X86-64-NEXT:    addq $7880, %rsp # imm = 0x1EC8
 ; CHECK-X86-64-NEXT:    .cfi_def_cfa_offset 8
 ; CHECK-X86-64-NEXT:    retq
 ;
 ; CHECK-X86-32-LABEL: foo:
 ; CHECK-X86-32:       # %bb.0:
 ; CHECK-X86-32-NEXT:    subl $4096, %esp # imm = 0x1000
+; CHECK-X86-32-NEXT:    .cfi_adjust_cfa_offset 4096
 ; CHECK-X86-32-NEXT:    movl $0, (%esp)
 ; CHECK-X86-32-NEXT:    subl $3916, %esp # imm = 0xF4C
 ; CHECK-X86-32-NEXT:    .cfi_def_cfa_offset 8016
 ; CHECK-X86-32-NEXT:    movl $1, 800(%esp)
 ; CHECK-X86-32-NEXT:    movl (%esp), %eax
 ; CHECK-X86-32-NEXT:    addl $8012, %esp # imm = 0x1F4C
 ; CHECK-X86-32-NEXT:    .cfi_def_cfa_offset 4
 ; CHECK-X86-32-NEXT:    retl
   %a = alloca i32, i64 2000, align 16
   %b = getelementptr inbounds i32, i32* %a, i64 200
   store volatile i32 1, i32* %b
   %c = load volatile i32, i32* %a
   ret i32 %c
 }
 
 attributes #0 =  {"probe-stack"="inline-asm"}

llvm/test/CodeGen/X86/stack-clash-unknown-call.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
 ; RUN: llc < %s | FileCheck %s
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg);
 
 ; it's important that we don't use the call as a probe here
 define void @foo() local_unnamed_addr #0 {
 ; CHECK-LABEL: foo:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    subq $4096, %rsp # imm = 0x1000
+; CHECK-NEXT:    .cfi_adjust_cfa_offset 4096
 ; CHECK-NEXT:    movq $0, (%rsp)
 ; CHECK-NEXT:    subq $3912, %rsp # imm = 0xF48
 ; CHECK-NEXT:    .cfi_def_cfa_offset 8016
 ; CHECK-NEXT:    movq %rsp, %rdi
 ; CHECK-NEXT:    movl $8000, %edx # imm = 0x1F40
 ; CHECK-NEXT:    xorl %esi, %esi
 ; CHECK-NEXT:    callq memset@PLT
 ; CHECK-NEXT:    addq $8008, %rsp # imm = 0x1F48
 ; CHECK-NEXT:    .cfi_def_cfa_offset 8
 ; CHECK-NEXT:    retq
   %a = alloca i8, i64 8000, align 16
   call void @llvm.memset.p0i8.i64(i8* align 16 %a, i8 0, i64 8000, i1 false)
   ret void
 }
 
 attributes #0 =  {"probe-stack"="inline-asm"}