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Differential D98229

[AMDGPU] Remove unused function opcodeEmitsNoInsts()
ClosedPublic

Authored by ruiling on Mar 8 2021, 6:19 PM.

Details

Reviewers
critson
Commits
rG67a05f4e09f0: [AMDGPU] Remove unused function opcodeEmitsNoInsts()
Summary

This was missed in the patch D97545, and cause buildbot failure.

Diff Detail

Event Timeline

ruiling created this revision.Mar 8 2021, 6:19 PM
Herald added subscribers: kerbowa, hiraditya, t-tye and 7 others. · View Herald TranscriptMar 8 2021, 6:19 PM
ruiling requested review of this revision.Mar 8 2021, 6:19 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 8 2021, 6:19 PM
Herald added subscribers: llvm-commits, wdng. · View Herald Transcript
critson accepted this revision.Mar 8 2021, 6:38 PM
critson added a subscriber: critson.

LGTM

This revision is now accepted and ready to land.Mar 8 2021, 6:38 PM
This revision was landed with ongoing or failed builds.Mar 8 2021, 6:51 PM
Closed by commit rG67a05f4e09f0: [AMDGPU] Remove unused function opcodeEmitsNoInsts() (authored by ruiling). · Explain Why
This revision was automatically updated to reflect the committed changes.
ruiling added a commit: rG67a05f4e09f0: [AMDGPU] Remove unused function opcodeEmitsNoInsts().
Harbormaster completed remote builds in B92776: Diff 329182.Mar 9 2021, 1:59 AM

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
7 lines

Diff 329188

llvm/lib/Target/AMDGPU/SIInsertSkips.cpp

Show First 20 Lines • Show All 64 Lines • ▼ Show 20 Lines
INITIALIZE_PASS_BEGIN(SIInsertSkips, DEBUG_TYPE, INITIALIZE_PASS_BEGIN(SIInsertSkips, DEBUG_TYPE,
"SI insert s_cbranch_execz instructions", false, false) "SI insert s_cbranch_execz instructions", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
INITIALIZE_PASS_END(SIInsertSkips, DEBUG_TYPE, INITIALIZE_PASS_END(SIInsertSkips, DEBUG_TYPE,
"SI insert s_cbranch_execz instructions", false, false) "SI insert s_cbranch_execz instructions", false, false)
char &llvm::SIInsertSkipsPassID = SIInsertSkips::ID; char &llvm::SIInsertSkipsPassID = SIInsertSkips::ID;
static bool opcodeEmitsNoInsts(const MachineInstr &MI) {
if (MI.isMetaInstruction())
return true;
return false;
}
static void generateEndPgm(MachineBasicBlock &MBB, static void generateEndPgm(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I, DebugLoc DL, MachineBasicBlock::iterator I, DebugLoc DL,
const SIInstrInfo *TII, bool IsPS) { const SIInstrInfo *TII, bool IsPS) {
// "null export" // "null export"
if (IsPS) { if (IsPS) {
BuildMI(MBB, I, DL, TII->get(AMDGPU::EXP_DONE)) BuildMI(MBB, I, DL, TII->get(AMDGPU::EXP_DONE))
.addImm(AMDGPU::Exp::ET_NULL) .addImm(AMDGPU::Exp::ET_NULL)
.addReg(AMDGPU::VGPR0, RegState::Undef) .addReg(AMDGPU::VGPR0, RegState::Undef)
▲ Show 20 Lines • Show All 114 Lines • Show Last 20 Lines